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From: "Wang, Zhi A" <zhi.a.wang@intel.com>
To: Rikard Falkeborn <rikard.falkeborn@gmail.com>,
	Zhenyu Wang <zhenyuw@linux.intel.com>,
	Jani Nikula <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Vivi, Rodrigo" <rodrigo.vivi@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: "intel-gvt-dev@lists.freedesktop.org" 
	<intel-gvt-dev@lists.freedesktop.org>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/9] drm/i915/gvt: Constify intel_gvt_irq_ops
Date: Fri, 10 Dec 2021 08:11:37 +0000	[thread overview]
Message-ID: <fa39dbb5-3e88-3536-d22d-f748861a8268@intel.com> (raw)
In-Reply-To: <20211204105527.15741-4-rikard.falkeborn@gmail.com>

On 12/4/2021 12:55 PM, Rikard Falkeborn wrote:
> These are never modified, so make them const to allow the compiler to
> put them in read-only memory.
>
> Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
> ---
>   drivers/gpu/drm/i915/gvt/interrupt.c | 10 +++++-----
>   drivers/gpu/drm/i915/gvt/interrupt.h |  2 +-
>   2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/interrupt.c b/drivers/gpu/drm/i915/gvt/interrupt.c
> index 614b951d919f..9ccc6b1ecc28 100644
> --- a/drivers/gpu/drm/i915/gvt/interrupt.c
> +++ b/drivers/gpu/drm/i915/gvt/interrupt.c
> @@ -176,7 +176,7 @@ int intel_vgpu_reg_imr_handler(struct intel_vgpu *vgpu,
>   	unsigned int reg, void *p_data, unsigned int bytes)
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	u32 imr = *(u32 *)p_data;
>   
>   	trace_write_ir(vgpu->id, "IMR", reg, imr, vgpu_vreg(vgpu, reg),
> @@ -206,7 +206,7 @@ int intel_vgpu_reg_master_irq_handler(struct intel_vgpu *vgpu,
>   	unsigned int reg, void *p_data, unsigned int bytes)
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	u32 ier = *(u32 *)p_data;
>   	u32 virtual_ier = vgpu_vreg(vgpu, reg);
>   
> @@ -246,7 +246,7 @@ int intel_vgpu_reg_ier_handler(struct intel_vgpu *vgpu,
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
>   	struct drm_i915_private *i915 = gvt->gt->i915;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	struct intel_gvt_irq_info *info;
>   	u32 ier = *(u32 *)p_data;
>   
> @@ -604,7 +604,7 @@ static void gen8_init_irq(
>   	SET_BIT_INFO(irq, 25, PCU_PCODE2DRIVER_MAILBOX, INTEL_GVT_IRQ_INFO_PCU);
>   }
>   
> -static struct intel_gvt_irq_ops gen8_irq_ops = {
> +static const struct intel_gvt_irq_ops gen8_irq_ops = {
>   	.init_irq = gen8_init_irq,
>   	.check_pending_irq = gen8_check_pending_irq,
>   };
> @@ -626,7 +626,7 @@ void intel_vgpu_trigger_virtual_event(struct intel_vgpu *vgpu,
>   	struct intel_gvt *gvt = vgpu->gvt;
>   	struct intel_gvt_irq *irq = &gvt->irq;
>   	gvt_event_virt_handler_t handler;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   
>   	handler = get_event_virt_handler(irq, event);
>   	drm_WARN_ON(&i915->drm, !handler);
> diff --git a/drivers/gpu/drm/i915/gvt/interrupt.h b/drivers/gpu/drm/i915/gvt/interrupt.h
> index 6c47d3e33161..0989e180ed54 100644
> --- a/drivers/gpu/drm/i915/gvt/interrupt.h
> +++ b/drivers/gpu/drm/i915/gvt/interrupt.h
> @@ -203,7 +203,7 @@ struct intel_gvt_irq_map {
>   
>   /* structure containing device specific IRQ state */
>   struct intel_gvt_irq {
> -	struct intel_gvt_irq_ops *ops;
> +	const struct intel_gvt_irq_ops *ops;
>   	struct intel_gvt_irq_info *info[INTEL_GVT_IRQ_INFO_MAX];
>   	DECLARE_BITMAP(irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX);
>   	struct intel_gvt_event_info events[INTEL_GVT_EVENT_MAX];

Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>


WARNING: multiple messages have this Message-ID (diff)
From: "Wang, Zhi A" <zhi.a.wang@intel.com>
To: Rikard Falkeborn <rikard.falkeborn@gmail.com>,
	Zhenyu Wang <zhenyuw@linux.intel.com>,
	Jani Nikula <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Vivi, Rodrigo" <rodrigo.vivi@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"intel-gvt-dev@lists.freedesktop.org"
	<intel-gvt-dev@lists.freedesktop.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH 3/9] drm/i915/gvt: Constify intel_gvt_irq_ops
Date: Fri, 10 Dec 2021 08:11:37 +0000	[thread overview]
Message-ID: <fa39dbb5-3e88-3536-d22d-f748861a8268@intel.com> (raw)
In-Reply-To: <20211204105527.15741-4-rikard.falkeborn@gmail.com>

On 12/4/2021 12:55 PM, Rikard Falkeborn wrote:
> These are never modified, so make them const to allow the compiler to
> put them in read-only memory.
>
> Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
> ---
>   drivers/gpu/drm/i915/gvt/interrupt.c | 10 +++++-----
>   drivers/gpu/drm/i915/gvt/interrupt.h |  2 +-
>   2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/interrupt.c b/drivers/gpu/drm/i915/gvt/interrupt.c
> index 614b951d919f..9ccc6b1ecc28 100644
> --- a/drivers/gpu/drm/i915/gvt/interrupt.c
> +++ b/drivers/gpu/drm/i915/gvt/interrupt.c
> @@ -176,7 +176,7 @@ int intel_vgpu_reg_imr_handler(struct intel_vgpu *vgpu,
>   	unsigned int reg, void *p_data, unsigned int bytes)
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	u32 imr = *(u32 *)p_data;
>   
>   	trace_write_ir(vgpu->id, "IMR", reg, imr, vgpu_vreg(vgpu, reg),
> @@ -206,7 +206,7 @@ int intel_vgpu_reg_master_irq_handler(struct intel_vgpu *vgpu,
>   	unsigned int reg, void *p_data, unsigned int bytes)
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	u32 ier = *(u32 *)p_data;
>   	u32 virtual_ier = vgpu_vreg(vgpu, reg);
>   
> @@ -246,7 +246,7 @@ int intel_vgpu_reg_ier_handler(struct intel_vgpu *vgpu,
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
>   	struct drm_i915_private *i915 = gvt->gt->i915;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	struct intel_gvt_irq_info *info;
>   	u32 ier = *(u32 *)p_data;
>   
> @@ -604,7 +604,7 @@ static void gen8_init_irq(
>   	SET_BIT_INFO(irq, 25, PCU_PCODE2DRIVER_MAILBOX, INTEL_GVT_IRQ_INFO_PCU);
>   }
>   
> -static struct intel_gvt_irq_ops gen8_irq_ops = {
> +static const struct intel_gvt_irq_ops gen8_irq_ops = {
>   	.init_irq = gen8_init_irq,
>   	.check_pending_irq = gen8_check_pending_irq,
>   };
> @@ -626,7 +626,7 @@ void intel_vgpu_trigger_virtual_event(struct intel_vgpu *vgpu,
>   	struct intel_gvt *gvt = vgpu->gvt;
>   	struct intel_gvt_irq *irq = &gvt->irq;
>   	gvt_event_virt_handler_t handler;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   
>   	handler = get_event_virt_handler(irq, event);
>   	drm_WARN_ON(&i915->drm, !handler);
> diff --git a/drivers/gpu/drm/i915/gvt/interrupt.h b/drivers/gpu/drm/i915/gvt/interrupt.h
> index 6c47d3e33161..0989e180ed54 100644
> --- a/drivers/gpu/drm/i915/gvt/interrupt.h
> +++ b/drivers/gpu/drm/i915/gvt/interrupt.h
> @@ -203,7 +203,7 @@ struct intel_gvt_irq_map {
>   
>   /* structure containing device specific IRQ state */
>   struct intel_gvt_irq {
> -	struct intel_gvt_irq_ops *ops;
> +	const struct intel_gvt_irq_ops *ops;
>   	struct intel_gvt_irq_info *info[INTEL_GVT_IRQ_INFO_MAX];
>   	DECLARE_BITMAP(irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX);
>   	struct intel_gvt_event_info events[INTEL_GVT_EVENT_MAX];

Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>


WARNING: multiple messages have this Message-ID (diff)
From: "Wang, Zhi A" <zhi.a.wang@intel.com>
To: Rikard Falkeborn <rikard.falkeborn@gmail.com>,
	Zhenyu Wang <zhenyuw@linux.intel.com>,
	Jani Nikula <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Vivi, Rodrigo" <rodrigo.vivi@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"intel-gvt-dev@lists.freedesktop.org"
	<intel-gvt-dev@lists.freedesktop.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 3/9] drm/i915/gvt: Constify intel_gvt_irq_ops
Date: Fri, 10 Dec 2021 08:11:37 +0000	[thread overview]
Message-ID: <fa39dbb5-3e88-3536-d22d-f748861a8268@intel.com> (raw)
In-Reply-To: <20211204105527.15741-4-rikard.falkeborn@gmail.com>

On 12/4/2021 12:55 PM, Rikard Falkeborn wrote:
> These are never modified, so make them const to allow the compiler to
> put them in read-only memory.
>
> Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
> ---
>   drivers/gpu/drm/i915/gvt/interrupt.c | 10 +++++-----
>   drivers/gpu/drm/i915/gvt/interrupt.h |  2 +-
>   2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/interrupt.c b/drivers/gpu/drm/i915/gvt/interrupt.c
> index 614b951d919f..9ccc6b1ecc28 100644
> --- a/drivers/gpu/drm/i915/gvt/interrupt.c
> +++ b/drivers/gpu/drm/i915/gvt/interrupt.c
> @@ -176,7 +176,7 @@ int intel_vgpu_reg_imr_handler(struct intel_vgpu *vgpu,
>   	unsigned int reg, void *p_data, unsigned int bytes)
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	u32 imr = *(u32 *)p_data;
>   
>   	trace_write_ir(vgpu->id, "IMR", reg, imr, vgpu_vreg(vgpu, reg),
> @@ -206,7 +206,7 @@ int intel_vgpu_reg_master_irq_handler(struct intel_vgpu *vgpu,
>   	unsigned int reg, void *p_data, unsigned int bytes)
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	u32 ier = *(u32 *)p_data;
>   	u32 virtual_ier = vgpu_vreg(vgpu, reg);
>   
> @@ -246,7 +246,7 @@ int intel_vgpu_reg_ier_handler(struct intel_vgpu *vgpu,
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
>   	struct drm_i915_private *i915 = gvt->gt->i915;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   	struct intel_gvt_irq_info *info;
>   	u32 ier = *(u32 *)p_data;
>   
> @@ -604,7 +604,7 @@ static void gen8_init_irq(
>   	SET_BIT_INFO(irq, 25, PCU_PCODE2DRIVER_MAILBOX, INTEL_GVT_IRQ_INFO_PCU);
>   }
>   
> -static struct intel_gvt_irq_ops gen8_irq_ops = {
> +static const struct intel_gvt_irq_ops gen8_irq_ops = {
>   	.init_irq = gen8_init_irq,
>   	.check_pending_irq = gen8_check_pending_irq,
>   };
> @@ -626,7 +626,7 @@ void intel_vgpu_trigger_virtual_event(struct intel_vgpu *vgpu,
>   	struct intel_gvt *gvt = vgpu->gvt;
>   	struct intel_gvt_irq *irq = &gvt->irq;
>   	gvt_event_virt_handler_t handler;
> -	struct intel_gvt_irq_ops *ops = gvt->irq.ops;
> +	const struct intel_gvt_irq_ops *ops = gvt->irq.ops;
>   
>   	handler = get_event_virt_handler(irq, event);
>   	drm_WARN_ON(&i915->drm, !handler);
> diff --git a/drivers/gpu/drm/i915/gvt/interrupt.h b/drivers/gpu/drm/i915/gvt/interrupt.h
> index 6c47d3e33161..0989e180ed54 100644
> --- a/drivers/gpu/drm/i915/gvt/interrupt.h
> +++ b/drivers/gpu/drm/i915/gvt/interrupt.h
> @@ -203,7 +203,7 @@ struct intel_gvt_irq_map {
>   
>   /* structure containing device specific IRQ state */
>   struct intel_gvt_irq {
> -	struct intel_gvt_irq_ops *ops;
> +	const struct intel_gvt_irq_ops *ops;
>   	struct intel_gvt_irq_info *info[INTEL_GVT_IRQ_INFO_MAX];
>   	DECLARE_BITMAP(irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX);
>   	struct intel_gvt_event_info events[INTEL_GVT_EVENT_MAX];

Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>


  reply	other threads:[~2021-12-10  8:11 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-04 10:55 [PATCH 0/9] drm/i915/gvt: Constify static structs Rikard Falkeborn
2021-12-04 10:55 ` [Intel-gfx] " Rikard Falkeborn
2021-12-04 10:55 ` Rikard Falkeborn
2021-12-04 10:55 ` [PATCH 1/9] drm/i915/gvt: Constify intel_gvt_gtt_pte_ops Rikard Falkeborn
2021-12-04 10:55   ` [Intel-gfx] " Rikard Falkeborn
2021-12-04 10:55   ` Rikard Falkeborn
2021-12-10  8:59   ` Wang, Zhi A
2021-12-10  8:59     ` [Intel-gfx] " Wang, Zhi A
2021-12-10  8:59     ` Wang, Zhi A
2021-12-04 10:55 ` [PATCH 2/9] " Rikard Falkeborn
2021-12-04 10:55   ` [Intel-gfx] " Rikard Falkeborn
2021-12-04 10:55   ` Rikard Falkeborn
2021-12-10  8:11   ` Wang, Zhi A
2021-12-10  8:11     ` Wang, Zhi A
2021-12-10  8:11     ` [Intel-gfx] " Wang, Zhi A
2021-12-04 10:55 ` [PATCH 3/9] drm/i915/gvt: Constify intel_gvt_irq_ops Rikard Falkeborn
2021-12-04 10:55   ` [Intel-gfx] " Rikard Falkeborn
2021-12-04 10:55   ` Rikard Falkeborn
2021-12-10  8:11   ` Wang, Zhi A [this message]
2021-12-10  8:11     ` [Intel-gfx] " Wang, Zhi A
2021-12-10  8:11     ` Wang, Zhi A
2021-12-04 10:55 ` [PATCH 4/9] drm/i915/gvt: Constify intel_gvt_sched_policy_ops Rikard Falkeborn
2021-12-04 10:55   ` [Intel-gfx] " Rikard Falkeborn
2021-12-04 10:55   ` Rikard Falkeborn
2021-12-10  8:11   ` Wang, Zhi A
2021-12-10  8:11     ` [Intel-gfx] " Wang, Zhi A
2021-12-10  8:11     ` Wang, Zhi A
2021-12-04 10:55 ` [PATCH 5/9] drm/i915/gvt: Constify gvt_mmio_block Rikard Falkeborn
2021-12-04 10:55   ` [Intel-gfx] " Rikard Falkeborn
2021-12-04 10:55   ` Rikard Falkeborn
2021-12-10  8:12   ` Wang, Zhi A
2021-12-10  8:12     ` [Intel-gfx] " Wang, Zhi A
2021-12-10  8:12     ` Wang, Zhi A
2021-12-04 10:55 ` [PATCH 6/9] drm/i915/gvt: Constify cmd_interrupt_events Rikard Falkeborn
2021-12-04 10:55   ` [Intel-gfx] " Rikard Falkeborn
2021-12-04 10:55   ` Rikard Falkeborn
2021-12-10  8:12   ` Wang, Zhi A
2021-12-10  8:12     ` Wang, Zhi A
2021-12-10  8:12     ` [Intel-gfx] " Wang, Zhi A
2021-12-04 10:55 ` [PATCH 7/9] drm/i915/gvt: Constify formats Rikard Falkeborn
2021-12-04 10:55   ` [Intel-gfx] " Rikard Falkeborn
2021-12-04 10:55   ` Rikard Falkeborn
2021-12-10  8:20   ` Wang, Zhi A
2021-12-10  8:20     ` [Intel-gfx] " Wang, Zhi A
2021-12-10  8:20     ` Wang, Zhi A
2021-12-12 13:21     ` Rikard Falkeborn
2021-12-12 13:21       ` [Intel-gfx] " Rikard Falkeborn
2021-12-12 13:21       ` Rikard Falkeborn
2021-12-04 10:55 ` [PATCH 8/9] drm/i915/gvt: Constify gtt_type_table_entry Rikard Falkeborn
2021-12-04 10:55   ` [Intel-gfx] " Rikard Falkeborn
2021-12-04 10:55   ` Rikard Falkeborn
2021-12-10  8:20   ` Wang, Zhi A
2021-12-10  8:20     ` Wang, Zhi A
2021-12-10  8:20     ` [Intel-gfx] " Wang, Zhi A
2021-12-04 10:55 ` [PATCH 9/9] drm/i915/gvt: Constify vgpu_types Rikard Falkeborn
2021-12-04 10:55   ` [Intel-gfx] " Rikard Falkeborn
2021-12-04 10:55   ` Rikard Falkeborn
2021-12-10  8:20   ` Wang, Zhi A
2021-12-10  8:20     ` [Intel-gfx] " Wang, Zhi A
2021-12-10  8:20     ` Wang, Zhi A
2021-12-06 13:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gvt: Constify static structs Patchwork
2021-12-06 14:19 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-12-10  9:00 ` [PATCH 0/9] " Wang, Zhi A
2021-12-10  9:00   ` [Intel-gfx] " Wang, Zhi A
2021-12-10  9:00   ` Wang, Zhi A
2021-12-12 13:25   ` Rikard Falkeborn
2021-12-12 13:25     ` [Intel-gfx] " Rikard Falkeborn
2021-12-12 13:25     ` Rikard Falkeborn
2021-12-16 19:21     ` Wang, Zhi A
2021-12-16 19:21       ` [Intel-gfx] " Wang, Zhi A
2021-12-16 19:21       ` Wang, Zhi A

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