From: Marek Vasut <marek.vasut@gmail.com>
To: Vignesh R <vigneshr@ti.com>,
Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Cc: David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Rob Herring <robh+dt@kernel.org>,
linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support
Date: Sun, 24 Sep 2017 15:12:37 +0200 [thread overview]
Message-ID: <fa700cdf-f0b5-779b-4f38-3138a7612cc2@gmail.com> (raw)
In-Reply-To: <4ee69ea4-14cc-4305-bf3f-8fe76d43bf6b@ti.com>
On 09/24/2017 03:08 PM, Vignesh R wrote:
>
>
> On 9/24/2017 5:31 PM, Marek Vasut wrote:
>> On 09/24/2017 12:59 PM, Vignesh R wrote:
>>> Add pm_runtime* calls to cadence-quadspi driver. This is required to
>>> switch on QSPI power domain on TI 66AK2G SoC during probe.
>>>
>>> Signed-off-by: Vignesh R <vigneshr@ti.com>
>>
>> Are you planning to add some more fine-grained PM control later?
>
> Yes, I will need to add fine-grained PM control at some point. But, for
> now SoC does not really support low power mode or runtime power saving
> option.
> The fact that driver still uses clk_prepare_*() calls to enable/disable
> clocks instead of pm_*() calls makes it a bit tricky though.
>
> Just figured out I forgot to add cleanup code in error handling path of
> probe(). Will fix that and send a v4.
OK, fine. Cleanups are welcome. The SoCFPGA doesn't do much runtime PM
either, so it's fine for now.
--
Best regards,
Marek Vasut
WARNING: multiple messages have this Message-ID (diff)
From: Marek Vasut <marek.vasut-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Vignesh R <vigneshr-l0cyMroinI0@public.gmane.org>,
Cyrille Pitchen
<cyrille.pitchen-yU5RGvR974pGWvitb5QawA@public.gmane.org>
Cc: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
Brian Norris
<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Boris Brezillon
<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support
Date: Sun, 24 Sep 2017 15:12:37 +0200 [thread overview]
Message-ID: <fa700cdf-f0b5-779b-4f38-3138a7612cc2@gmail.com> (raw)
In-Reply-To: <4ee69ea4-14cc-4305-bf3f-8fe76d43bf6b-l0cyMroinI0@public.gmane.org>
On 09/24/2017 03:08 PM, Vignesh R wrote:
>
>
> On 9/24/2017 5:31 PM, Marek Vasut wrote:
>> On 09/24/2017 12:59 PM, Vignesh R wrote:
>>> Add pm_runtime* calls to cadence-quadspi driver. This is required to
>>> switch on QSPI power domain on TI 66AK2G SoC during probe.
>>>
>>> Signed-off-by: Vignesh R <vigneshr-l0cyMroinI0@public.gmane.org>
>>
>> Are you planning to add some more fine-grained PM control later?
>
> Yes, I will need to add fine-grained PM control at some point. But, for
> now SoC does not really support low power mode or runtime power saving
> option.
> The fact that driver still uses clk_prepare_*() calls to enable/disable
> clocks instead of pm_*() calls makes it a bit tricky though.
>
> Just figured out I forgot to add cleanup code in error handling path of
> probe(). Will fix that and send a v4.
OK, fine. Cleanups are welcome. The SoCFPGA doesn't do much runtime PM
either, so it's fine for now.
--
Best regards,
Marek Vasut
--
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WARNING: multiple messages have this Message-ID (diff)
From: marek.vasut@gmail.com (Marek Vasut)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support
Date: Sun, 24 Sep 2017 15:12:37 +0200 [thread overview]
Message-ID: <fa700cdf-f0b5-779b-4f38-3138a7612cc2@gmail.com> (raw)
In-Reply-To: <4ee69ea4-14cc-4305-bf3f-8fe76d43bf6b@ti.com>
On 09/24/2017 03:08 PM, Vignesh R wrote:
>
>
> On 9/24/2017 5:31 PM, Marek Vasut wrote:
>> On 09/24/2017 12:59 PM, Vignesh R wrote:
>>> Add pm_runtime* calls to cadence-quadspi driver. This is required to
>>> switch on QSPI power domain on TI 66AK2G SoC during probe.
>>>
>>> Signed-off-by: Vignesh R <vigneshr@ti.com>
>>
>> Are you planning to add some more fine-grained PM control later?
>
> Yes, I will need to add fine-grained PM control at some point. But, for
> now SoC does not really support low power mode or runtime power saving
> option.
> The fact that driver still uses clk_prepare_*() calls to enable/disable
> clocks instead of pm_*() calls makes it a bit tricky though.
>
> Just figured out I forgot to add cleanup code in error handling path of
> probe(). Will fix that and send a v4.
OK, fine. Cleanups are welcome. The SoCFPGA doesn't do much runtime PM
either, so it's fine for now.
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2017-09-24 13:12 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-24 10:59 [PATCH v3 0/5] K2G: Add QSPI support Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 10:59 ` [PATCH v3 1/5] mtd: spi-nor: cadence-quadspi: Add TI 66AK2G SoC specific compatible Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 10:59 ` [PATCH v3 2/5] mtd: spi-nor: cadence-quadspi: add a delay in write sequence Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 11:59 ` Marek Vasut
2017-09-24 11:59 ` Marek Vasut
2017-09-24 12:33 ` Vignesh R
2017-09-24 12:33 ` Vignesh R
2017-09-24 12:33 ` Vignesh R
2017-09-24 13:13 ` Marek Vasut
2017-09-24 13:13 ` Marek Vasut
2017-09-24 13:13 ` Marek Vasut
2017-10-02 12:46 ` Vignesh R
2017-10-02 12:46 ` Vignesh R
2017-10-02 12:46 ` Vignesh R
2017-09-24 10:59 ` [PATCH v3 3/5] mtd: spi-nor: cadence-quadspi: Add new binding to enable loop-back circuit Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 10:59 ` [PATCH v3 4/5] mtd: spi-nor: cadence-quadspi: Add support to enable loop-back clock circuit Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 10:59 ` [PATCH v3 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 10:59 ` Vignesh R
2017-09-24 12:01 ` Marek Vasut
2017-09-24 12:01 ` Marek Vasut
2017-09-24 13:08 ` Vignesh R
2017-09-24 13:08 ` Vignesh R
2017-09-24 13:08 ` Vignesh R
2017-09-24 13:12 ` Marek Vasut [this message]
2017-09-24 13:12 ` Marek Vasut
2017-09-24 13:12 ` Marek Vasut
2017-09-24 13:27 ` Vignesh R
2017-09-24 13:27 ` Vignesh R
2017-09-24 13:27 ` Vignesh R
2017-09-24 13:51 ` Marek Vasut
2017-09-24 13:51 ` Marek Vasut
2017-09-25 22:41 ` matthew.gerlach
2017-09-25 22:41 ` matthew.gerlach at linux.intel.com
2017-09-25 22:41 ` matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
2017-09-25 23:49 ` Marek Vasut
2017-09-25 23:49 ` Marek Vasut
2017-09-25 23:49 ` Marek Vasut
2017-09-27 10:48 ` Vignesh R
2017-09-27 10:48 ` Vignesh R
2017-09-27 10:48 ` Vignesh R
2017-09-28 15:01 ` matthew.gerlach
2017-09-28 15:01 ` matthew.gerlach at linux.intel.com
2017-10-02 12:28 ` Vignesh R
2017-10-02 12:28 ` Vignesh R
2017-10-02 12:28 ` Vignesh R
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