* [PATCH 0/3] Add support for Hardkernel's Odroid HC1 board [not found] <CGME20170929113313eucas1p285173d5410c7d0b07f209c76f0ffaeaf@eucas1p2.samsung.com> @ 2017-09-29 11:33 ` Marek Szyprowski [not found] ` <CGME20170929113314eucas1p12d4668bccf9a42acefc32d572e24301f@eucas1p1.samsung.com> ` (2 more replies) 0 siblings, 3 replies; 14+ messages in thread From: Marek Szyprowski @ 2017-09-29 11:33 UTC (permalink / raw) To: linux-samsung-soc Cc: Marek Szyprowski, Krzysztof Kozlowski, Bartlomiej Zolnierkiewicz Hi! This patchset add support for Exynos5422 based Hardkernel's Odroid HC1 board. Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI, no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO button. USB3.0 ports are used for build-in JMicron USB to SATA bridge and Gigabit R8152 ethernet chips. HC1 uses only passive cooling. This patchset is based on current Krzysztof's next/dt branch. Best regards Marek Szyprowski Samsung R&D Institute Poland Patch summary: Marek Szyprowski (3): ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board ARM: exynos_defconfig: Enable UAS support for Odroid HC1 board arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 443 +++++++++++++++++++++ arch/arm/boot/dts/exynos5422-odroidhc1.dts | 217 ++++++++++ arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi | 13 + arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 440 +------------------- arch/arm/configs/exynos_defconfig | 2 +- 6 files changed, 676 insertions(+), 440 deletions(-) create mode 100644 arch/arm/boot/dts/exynos5422-odroid-core.dtsi create mode 100644 arch/arm/boot/dts/exynos5422-odroidhc1.dts -- 1.9.1 ^ permalink raw reply [flat|nested] 14+ messages in thread
[parent not found: <CGME20170929113314eucas1p12d4668bccf9a42acefc32d572e24301f@eucas1p1.samsung.com>]
* [PATCH 1/3] ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi [not found] ` <CGME20170929113314eucas1p12d4668bccf9a42acefc32d572e24301f@eucas1p1.samsung.com> @ 2017-09-29 11:33 ` Marek Szyprowski [not found] ` <CGME20170929123353eucas1p164a4d125cf71345f98dc27d5eb8d1e3d@eucas1p1.samsung.com> 0 siblings, 1 reply; 14+ messages in thread From: Marek Szyprowski @ 2017-09-29 11:33 UTC (permalink / raw) To: linux-samsung-soc Cc: Marek Szyprowski, Krzysztof Kozlowski, Bartlomiej Zolnierkiewicz Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> --- arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi | 13 +++++++++++++ arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 12 ------------ 2 files changed, 13 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi index c0b85981c6bf..da3141a307d5 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi @@ -11,6 +11,8 @@ * published by the Free Software Foundation. */ +#include <dt-bindings/sound/samsung-i2s.h> + / { sound: sound { compatible = "simple-audio-card"; @@ -43,6 +45,17 @@ }; }; +&clock_audss { + assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_MOUT_I2S>, + <&clock_audss EXYNOS_DOUT_AUD_BUS>; + assigned-clock-parents = <&clock CLK_FIN_PLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>; + assigned-clock-rates = <0>, + <0>, + <19200000>; +}; + &hsi2c_5 { status = "okay"; max98090: max98090@10 { diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 305c2a2b728c..4478a089353a 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -16,7 +16,6 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/sound/samsung-i2s.h> #include "exynos5800.dtsi" #include "exynos5422-cpus.dtsi" @@ -455,17 +454,6 @@ status = "okay"; }; -&clock_audss { - assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, - <&clock_audss EXYNOS_MOUT_I2S>, - <&clock_audss EXYNOS_DOUT_AUD_BUS>; - assigned-clock-parents = <&clock CLK_FIN_PLL>, - <&clock_audss EXYNOS_MOUT_AUDSS>; - assigned-clock-rates = <0>, - <0>, - <19200000>; -}; - &cpu0 { cpu-supply = <&buck6_reg>; }; -- 1.9.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
[parent not found: <CGME20170929123353eucas1p164a4d125cf71345f98dc27d5eb8d1e3d@eucas1p1.samsung.com>]
* [PATCH 1/3 RESEND] ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi [not found] ` <CGME20170929123353eucas1p164a4d125cf71345f98dc27d5eb8d1e3d@eucas1p1.samsung.com> @ 2017-09-29 12:33 ` Marek Szyprowski 2017-09-29 12:54 ` Sylwester Nawrocki 2017-09-30 17:14 ` Krzysztof Kozlowski 0 siblings, 2 replies; 14+ messages in thread From: Marek Szyprowski @ 2017-09-29 12:33 UTC (permalink / raw) To: linux-samsung-soc Cc: Marek Szyprowski, Krzysztof Kozlowski, Bartlomiej Zolnierkiewicz Audio subsystem clocks configuration is a part of audio block, so there it should be moved to exynos5422-odroidxu3-audio.dtsi to avoid it on Odroid XU4, which has no audio codec. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> --- Resend reason: added missing patch description --- arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi | 13 +++++++++++++ arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 12 ------------ 2 files changed, 13 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi index c0b85981c6bf..da3141a307d5 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi @@ -11,6 +11,8 @@ * published by the Free Software Foundation. */ +#include <dt-bindings/sound/samsung-i2s.h> + / { sound: sound { compatible = "simple-audio-card"; @@ -43,6 +45,17 @@ }; }; +&clock_audss { + assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_MOUT_I2S>, + <&clock_audss EXYNOS_DOUT_AUD_BUS>; + assigned-clock-parents = <&clock CLK_FIN_PLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>; + assigned-clock-rates = <0>, + <0>, + <19200000>; +}; + &hsi2c_5 { status = "okay"; max98090: max98090@10 { diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 305c2a2b728c..4478a089353a 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -16,7 +16,6 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/sound/samsung-i2s.h> #include "exynos5800.dtsi" #include "exynos5422-cpus.dtsi" @@ -455,17 +454,6 @@ status = "okay"; }; -&clock_audss { - assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, - <&clock_audss EXYNOS_MOUT_I2S>, - <&clock_audss EXYNOS_DOUT_AUD_BUS>; - assigned-clock-parents = <&clock CLK_FIN_PLL>, - <&clock_audss EXYNOS_MOUT_AUDSS>; - assigned-clock-rates = <0>, - <0>, - <19200000>; -}; - &cpu0 { cpu-supply = <&buck6_reg>; }; -- 1.9.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3 RESEND] ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi 2017-09-29 12:33 ` [PATCH 1/3 RESEND] " Marek Szyprowski @ 2017-09-29 12:54 ` Sylwester Nawrocki 2017-09-30 17:14 ` Krzysztof Kozlowski 1 sibling, 0 replies; 14+ messages in thread From: Sylwester Nawrocki @ 2017-09-29 12:54 UTC (permalink / raw) To: Marek Szyprowski Cc: linux-samsung-soc, Krzysztof Kozlowski, Bartlomiej Zolnierkiewicz On 09/29/2017 02:33 PM, Marek Szyprowski wrote: > Audio subsystem clocks configuration is a part of audio block, > so there it should be moved to exynos5422-odroidxu3-audio.dtsi > to avoid it on Odroid XU4, which has no audio codec. > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3 RESEND] ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi 2017-09-29 12:33 ` [PATCH 1/3 RESEND] " Marek Szyprowski 2017-09-29 12:54 ` Sylwester Nawrocki @ 2017-09-30 17:14 ` Krzysztof Kozlowski 1 sibling, 0 replies; 14+ messages in thread From: Krzysztof Kozlowski @ 2017-09-30 17:14 UTC (permalink / raw) To: Marek Szyprowski; +Cc: linux-samsung-soc, Bartlomiej Zolnierkiewicz On Fri, Sep 29, 2017 at 02:33:25PM +0200, Marek Szyprowski wrote: > Audio subsystem clocks configuration is a part of audio block, > so there it should be moved to exynos5422-odroidxu3-audio.dtsi > to avoid it on Odroid XU4, which has no audio codec. > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > Resend reason: added missing patch description > --- > arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi | 13 +++++++++++++ > arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 12 ------------ > 2 files changed, 13 insertions(+), 12 deletions(-) > Thanks, applied. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 14+ messages in thread
[parent not found: <CGME20170929113314eucas1p250037030204ab9d0f936afa6f660923f@eucas1p2.samsung.com>]
* [PATCH 2/3] ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board [not found] ` <CGME20170929113314eucas1p250037030204ab9d0f936afa6f660923f@eucas1p2.samsung.com> @ 2017-09-29 11:33 ` Marek Szyprowski 2017-09-30 17:23 ` Krzysztof Kozlowski 2017-10-01 5:17 ` Anand Moon 0 siblings, 2 replies; 14+ messages in thread From: Marek Szyprowski @ 2017-09-29 11:33 UTC (permalink / raw) To: linux-samsung-soc Cc: Marek Szyprowski, Krzysztof Kozlowski, Bartlomiej Zolnierkiewicz Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI, no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO button. USB3.0 ports are used for build-in JMicron USB to SATA bridge and Gigabit R8152 ethernet chips. HC1 uses only passive cooling. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 443 +++++++++++++++++++++ arch/arm/boot/dts/exynos5422-odroidhc1.dts | 217 ++++++++++ arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 428 +------------------- 4 files changed, 662 insertions(+), 427 deletions(-) create mode 100644 arch/arm/boot/dts/exynos5422-odroid-core.dtsi create mode 100644 arch/arm/boot/dts/exynos5422-odroidhc1.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9cf688d404b8..54b06a576551 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -176,6 +176,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \ exynos5420-arndale-octa.dtb \ exynos5420-peach-pit.dtb \ exynos5420-smdk5420.dtb \ + exynos5422-odroidhc1.dtb \ exynos5422-odroidxu3.dtb \ exynos5422-odroidxu3-lite.dtb \ exynos5422-odroidxu4.dtb \ diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi new file mode 100644 index 000000000000..a5b8d0f0877e --- /dev/null +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -0,0 +1,443 @@ +/* + * Hardkernel Odroid XU3/XU4/HC1 boards core device tree source + * + * Copyright (c) 2017 Marek Szyprowski + * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <dt-bindings/clock/samsung,s2mps11.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> +#include "exynos5800.dtsi" +#include "exynos5422-cpus.dtsi" + +/ { + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x7EA00000>; + }; + + chosen { + stdout-path = "serial2:115200n8"; + }; + + firmware@02073000 { + compatible = "samsung,secure-firmware"; + reg = <0x02073000 0x1000>; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; + }; +}; + +&bus_wcore { + devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>, + <&nocp_mem1_0>, <&nocp_mem1_1>; + vdd-supply = <&buck3_reg>; + exynos,saturation-ratio = <100>; + status = "okay"; +}; + +&bus_noc { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_fsys_apb { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_fsys { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_fsys2 { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_mfc { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_gen { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_peri { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_g2d { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_g2d_acp { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_jpeg { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_jpeg_apb { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_disp1_fimd { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_disp1 { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_gscl_scaler { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_mscl { + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&buck6_reg>; +}; + +&cpu4 { + cpu-supply = <&buck2_reg>; +}; + +&hsi2c_4 { + status = "okay"; + + s2mps11_pmic@66 { + compatible = "samsung,s2mps11-pmic"; + reg = <0x66>; + samsung,s2mps11-acokb-ground; + + interrupt-parent = <&gpx0>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&s2mps11_irq>; + + s2mps11_osc: clocks { + #clock-cells = <1>; + clock-output-names = "s2mps11_ap", + "s2mps11_cp", "s2mps11_bt"; + }; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "vdd_ldo1"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "vddq_mmc0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo4_reg: LDO4 { + regulator-name = "vdd_adc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo5_reg: LDO5 { + regulator-name = "vdd_ldo5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo6_reg: LDO6 { + regulator-name = "vdd_ldo6"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + regulator-name = "vdd_ldo7"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo8_reg: LDO8 { + regulator-name = "vdd_ldo8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo9_reg: LDO9 { + regulator-name = "vdd_ldo9"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + ldo10_reg: LDO10 { + regulator-name = "vdd_ldo10"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo11_reg: LDO11 { + regulator-name = "vdd_ldo11"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo12_reg: LDO12 { + regulator-name = "vdd_ldo12"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo13_reg: LDO13 { + regulator-name = "vddq_mmc2"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo15_reg: LDO15 { + regulator-name = "vdd_ldo15"; + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + regulator-always-on; + }; + + ldo16_reg: LDO16 { + regulator-name = "vdd_ldo16"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + regulator-always-on; + }; + + ldo17_reg: LDO17 { + regulator-name = "tsp_avdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo18_reg: LDO18 { + regulator-name = "vdd_emmc_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo19_reg: LDO19 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo24_reg: LDO24 { + regulator-name = "tsp_io"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo26_reg: LDO26 { + regulator-name = "vdd_ldo26"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2_reg: BUCK2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3_reg: BUCK3 { + regulator-name = "vdd_int"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck4_reg: BUCK4 { + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck5_reg: BUCK5 { + regulator-name = "vdd_mem"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck6_reg: BUCK6 { + regulator-name = "vdd_kfc"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck7_reg: BUCK7 { + regulator-name = "vdd_1.0v_ldo"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck8_reg: BUCK8 { + regulator-name = "vdd_1.8v_ldo"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck9_reg: BUCK9 { + regulator-name = "vdd_2.8v_ldo"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3750000>; + regulator-always-on; + regulator-boot-on; + }; + + buck10_reg: BUCK10 { + regulator-name = "vdd_vmem"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; +}; + +&mmc_2 { + status = "okay"; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; + bus-width = <4>; + cap-sd-highspeed; + vmmc-supply = <&ldo19_reg>; + vqmmc-supply = <&ldo13_reg>; +}; + +&nocp_mem0_0 { + status = "okay"; +}; + +&nocp_mem0_1 { + status = "okay"; +}; + +&nocp_mem1_0 { + status = "okay"; +}; + +&nocp_mem1_1 { + status = "okay"; +}; + +&pinctrl_0 { + s2mps11_irq: s2mps11-irq { + samsung,pins = "gpx0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&tmu_cpu0 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_cpu1 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_cpu2 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_cpu3 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_gpu { + vtmu-supply = <&ldo7_reg>; +}; + +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; + clock-names = "rtc", "rtc_src"; +}; + +&usbdrd_dwc3_0 { + dr_mode = "host"; +}; + +/* usbdrd_dwc3_1 mode customized in each board */ + +&usbdrd3_0 { + vdd33-supply = <&ldo9_reg>; + vdd10-supply = <&ldo11_reg>; +}; + +&usbdrd3_1 { + vdd33-supply = <&ldo9_reg>; + vdd10-supply = <&ldo11_reg>; +}; diff --git a/arch/arm/boot/dts/exynos5422-odroidhc1.dts b/arch/arm/boot/dts/exynos5422-odroidhc1.dts new file mode 100644 index 000000000000..2b3bd3cac5c1 --- /dev/null +++ b/arch/arm/boot/dts/exynos5422-odroidhc1.dts @@ -0,0 +1,217 @@ +/* + * Hardkernel Odroid HC1 board device tree source + * + * Copyright (c) 2017 Marek Szyprowski + * Copyright (c) 2017 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos5422-odroid-core.dtsi" + +/ { + model = "Hardkernel Odroid HC1"; + compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \ + "samsung,exynos5"; + + pwmleds { + compatible = "pwm-leds"; + + blueled { + label = "blue:heartbeat"; + pwms = <&pwm 2 2000000 0>; + pwm-names = "pwm2"; + max_brightness = <255>; + linux,default-trigger = "heartbeat"; + }; + }; + + thermal-zones { + cpu0_thermal: cpu0-thermal { + thermal-sensors = <&tmu_cpu0 0>; + trips { + cpu0_alert0: cpu-alert-1 { + temperature = <70000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "active"; + }; + cpu0_alert1: cpu-alert-1 { + temperature = <85000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "active"; + }; + cpu0_crit0: cpu-crit-0 { + temperature = <120000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + /* + * When reaching cpu0_alert0, reduce CPU + * by 2 steps. On Exynos5422/5800 that would + * be: 1600 MHz and 1100 MHz. + */ + map0 { + trip = <&cpu0_alert0>; + cooling-device = <&cpu0 0 2>; + }; + map1 { + trip = <&cpu0_alert0>; + cooling-device = <&cpu4 0 2>; + }; + /* + * When reaching cpu0_alert1, reduce CPU + * further, down to 600 MHz (12 steps for big, + * 7 steps for LITTLE). + */ + map2 { + trip = <&cpu0_alert1>; + cooling-device = <&cpu0 3 7>; + }; + map3 { + trip = <&cpu0_alert1>; + cooling-device = <&cpu4 3 12>; + }; + }; + }; + cpu1_thermal: cpu1-thermal { + thermal-sensors = <&tmu_cpu1 0>; + trips { + cpu1_alert0: cpu-alert-0 { + temperature = <70000>; + hysteresis = <10000>; + type = "active"; + }; + cpu1_alert1: cpu-alert-1 { + temperature = <85000>; + hysteresis = <10000>; + type = "active"; + }; + cpu1_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu1_alert0>; + cooling-device = <&cpu0 0 2>; + }; + map1 { + trip = <&cpu1_alert0>; + cooling-device = <&cpu4 0 2>; + }; + map2 { + trip = <&cpu1_alert1>; + cooling-device = <&cpu0 3 7>; + }; + map3 { + trip = <&cpu1_alert1>; + cooling-device = <&cpu4 3 12>; + }; + }; + }; + cpu2_thermal: cpu2-thermal { + thermal-sensors = <&tmu_cpu2 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu2_alert0: cpu-alert-0 { + temperature = <70000>; + hysteresis = <10000>; + type = "active"; + }; + cpu2_alert1: cpu-alert-1 { + temperature = <85000>; + hysteresis = <10000>; + type = "active"; + }; + cpu2_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu2_alert0>; + cooling-device = <&cpu0 0 2>; + }; + map1 { + trip = <&cpu2_alert0>; + cooling-device = <&cpu4 0 2>; + }; + map2 { + trip = <&cpu2_alert1>; + cooling-device = <&cpu0 3 7>; + }; + map3 { + trip = <&cpu2_alert1>; + cooling-device = <&cpu4 3 12>; + }; + }; + }; + cpu3_thermal: cpu3-thermal { + thermal-sensors = <&tmu_cpu3 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu3_alert0: cpu-alert-1 { + temperature = <70000>; + hysteresis = <10000>; + type = "active"; + }; + cpu3_alert1: cpu-alert-1 { + temperature = <85000>; + hysteresis = <10000>; + type = "active"; + }; + cpu3_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu3_alert0>; + cooling-device = <&cpu0 0 2>; + }; + map1 { + trip = <&cpu3_alert0>; + cooling-device = <&cpu4 0 2>; + }; + map2 { + trip = <&cpu3_alert1>; + cooling-device = <&cpu0 3 7>; + }; + map3 { + trip = <&cpu3_alert1>; + cooling-device = <&cpu4 3 12>; + }; + }; + }; + }; + +}; + +&pwm { + /* + * PWM 2 -- Blue LED + */ + pinctrl-0 = <&pwm2_out>; + pinctrl-names = "default"; + samsung,pwm-outputs = <2>; + status = "okay"; +}; + +&usbdrd_dwc3_1 { + dr_mode = "host"; +}; diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 4478a089353a..445c6c5a1300 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -12,35 +12,10 @@ * published by the Free Software Foundation. */ -#include <dt-bindings/clock/samsung,s2mps11.h> #include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/gpio/gpio.h> -#include "exynos5800.dtsi" -#include "exynos5422-cpus.dtsi" +#include "exynos5422-odroid-core.dtsi" / { - memory@40000000 { - device_type = "memory"; - reg = <0x40000000 0x7EA00000>; - }; - - chosen { - stdout-path = "serial2:115200n8"; - }; - - firmware@02073000 { - compatible = "samsung,secure-firmware"; - reg = <0x02073000 0x1000>; - }; - - fixed-rate-clocks { - oscclk { - compatible = "samsung,exynos5420-oscclk"; - clock-frequency = <24000000>; - }; - }; - gpio_keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -371,97 +346,6 @@ status = "okay"; }; -&bus_wcore { - devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>, - <&nocp_mem1_0>, <&nocp_mem1_1>; - vdd-supply = <&buck3_reg>; - exynos,saturation-ratio = <100>; - status = "okay"; -}; - -&bus_noc { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_fsys_apb { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_fsys { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_fsys2 { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_mfc { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_gen { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_peri { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_g2d { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_g2d_acp { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_jpeg { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_jpeg_apb { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_disp1_fimd { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_disp1 { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_gscl_scaler { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&bus_mscl { - devfreq = <&bus_wcore>; - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&buck6_reg>; -}; - -&cpu4 { - cpu-supply = <&buck2_reg>; -}; - &hdmi { status = "okay"; ddc = <&i2c_2>; @@ -479,237 +363,6 @@ needs-hpd; }; -&hsi2c_4 { - status = "okay"; - - s2mps11_pmic@66 { - compatible = "samsung,s2mps11-pmic"; - reg = <0x66>; - samsung,s2mps11-acokb-ground; - - interrupt-parent = <&gpx0>; - interrupts = <4 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&s2mps11_irq>; - - s2mps11_osc: clocks { - #clock-cells = <1>; - clock-output-names = "s2mps11_ap", - "s2mps11_cp", "s2mps11_bt"; - }; - - regulators { - ldo1_reg: LDO1 { - regulator-name = "vdd_ldo1"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo3_reg: LDO3 { - regulator-name = "vddq_mmc0"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - ldo4_reg: LDO4 { - regulator-name = "vdd_adc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - ldo5_reg: LDO5 { - regulator-name = "vdd_ldo5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo6_reg: LDO6 { - regulator-name = "vdd_ldo6"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo7_reg: LDO7 { - regulator-name = "vdd_ldo7"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo8_reg: LDO8 { - regulator-name = "vdd_ldo8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo9_reg: LDO9 { - regulator-name = "vdd_ldo9"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - - ldo10_reg: LDO10 { - regulator-name = "vdd_ldo10"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo11_reg: LDO11 { - regulator-name = "vdd_ldo11"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo12_reg: LDO12 { - regulator-name = "vdd_ldo12"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo13_reg: LDO13 { - regulator-name = "vddq_mmc2"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - ldo15_reg: LDO15 { - regulator-name = "vdd_ldo15"; - regulator-min-microvolt = <3100000>; - regulator-max-microvolt = <3100000>; - regulator-always-on; - }; - - ldo16_reg: LDO16 { - regulator-name = "vdd_ldo16"; - regulator-min-microvolt = <2200000>; - regulator-max-microvolt = <2200000>; - regulator-always-on; - }; - - ldo17_reg: LDO17 { - regulator-name = "tsp_avdd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - ldo18_reg: LDO18 { - regulator-name = "vdd_emmc_1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - ldo19_reg: LDO19 { - regulator-name = "vdd_sd"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - ldo24_reg: LDO24 { - regulator-name = "tsp_io"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - }; - - ldo26_reg: LDO26 { - regulator-name = "vdd_ldo26"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - - buck1_reg: BUCK1 { - regulator-name = "vdd_mif"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1300000>; - regulator-always-on; - regulator-boot-on; - }; - - buck2_reg: BUCK2 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - buck3_reg: BUCK3 { - regulator-name = "vdd_int"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; - - buck4_reg: BUCK4 { - regulator-name = "vdd_g3d"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; - - buck5_reg: BUCK5 { - regulator-name = "vdd_mem"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; - - buck6_reg: BUCK6 { - regulator-name = "vdd_kfc"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - buck7_reg: BUCK7 { - regulator-name = "vdd_1.0v_ldo"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - buck8_reg: BUCK8 { - regulator-name = "vdd_1.8v_ldo"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - buck9_reg: BUCK9 { - regulator-name = "vdd_2.8v_ldo"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3750000>; - regulator-always-on; - regulator-boot-on; - }; - - buck10_reg: BUCK10 { - regulator-name = "vdd_vmem"; - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - regulator-always-on; - regulator-boot-on; - }; - }; - }; -}; - &i2c_2 { samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <66000>; @@ -740,36 +393,6 @@ vqmmc-supply = <&ldo3_reg>; }; -&mmc_2 { - status = "okay"; - card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <0 4>; - samsung,dw-mshc-ddr-timing = <0 2>; - pinctrl-names = "default"; - pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; - bus-width = <4>; - cap-sd-highspeed; - vmmc-supply = <&ldo19_reg>; - vqmmc-supply = <&ldo13_reg>; -}; - -&nocp_mem0_0 { - status = "okay"; -}; - -&nocp_mem0_1 { - status = "okay"; -}; - -&nocp_mem1_0 { - status = "okay"; -}; - -&nocp_mem1_1 { - status = "okay"; -}; - &pinctrl_0 { power_key: power-key { samsung,pins = "gpx0-3"; @@ -784,13 +407,6 @@ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - - s2mps11_irq: s2mps11-irq { - samsung,pins = "gpx0-4"; - samsung,pin-function = <EXYNOS_PIN_FUNC_F>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; - }; }; &pinctrl_1 { @@ -801,45 +417,3 @@ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; }; - -&tmu_cpu0 { - vtmu-supply = <&ldo7_reg>; -}; - -&tmu_cpu1 { - vtmu-supply = <&ldo7_reg>; -}; - -&tmu_cpu2 { - vtmu-supply = <&ldo7_reg>; -}; - -&tmu_cpu3 { - vtmu-supply = <&ldo7_reg>; -}; - -&tmu_gpu { - vtmu-supply = <&ldo7_reg>; -}; - -&rtc { - status = "okay"; - clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; - clock-names = "rtc", "rtc_src"; -}; - -&usbdrd_dwc3_0 { - dr_mode = "host"; -}; - -/* usbdrd_dwc3_1 mode customized in each board */ - -&usbdrd3_0 { - vdd33-supply = <&ldo9_reg>; - vdd10-supply = <&ldo11_reg>; -}; - -&usbdrd3_1 { - vdd33-supply = <&ldo9_reg>; - vdd10-supply = <&ldo11_reg>; -}; -- 1.9.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board 2017-09-29 11:33 ` [PATCH 2/3] ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board Marek Szyprowski @ 2017-09-30 17:23 ` Krzysztof Kozlowski 2017-10-02 6:34 ` Marek Szyprowski 2017-10-01 5:17 ` Anand Moon 1 sibling, 1 reply; 14+ messages in thread From: Krzysztof Kozlowski @ 2017-09-30 17:23 UTC (permalink / raw) To: Marek Szyprowski; +Cc: linux-samsung-soc, Bartlomiej Zolnierkiewicz On Fri, Sep 29, 2017 at 01:33:02PM +0200, Marek Szyprowski wrote: > Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI, > no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO > button. USB3.0 ports are used for build-in JMicron USB to SATA bridge > and Gigabit R8152 ethernet chips. HC1 uses only passive cooling. > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 443 +++++++++++++++++++++ > arch/arm/boot/dts/exynos5422-odroidhc1.dts | 217 ++++++++++ > arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 428 +------------------- Please experiment with -M (maybe -M20%?) and -B so this would be detected as rename. It might create much simpler patch thus making the review easy (one could see that the changes are just movements). > 4 files changed, 662 insertions(+), 427 deletions(-) > create mode 100644 arch/arm/boot/dts/exynos5422-odroid-core.dtsi > create mode 100644 arch/arm/boot/dts/exynos5422-odroidhc1.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 9cf688d404b8..54b06a576551 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -176,6 +176,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \ > exynos5420-arndale-octa.dtb \ > exynos5420-peach-pit.dtb \ > exynos5420-smdk5420.dtb \ > + exynos5422-odroidhc1.dtb \ > exynos5422-odroidxu3.dtb \ > exynos5422-odroidxu3-lite.dtb \ > exynos5422-odroidxu4.dtb \ > diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi > new file mode 100644 > index 000000000000..a5b8d0f0877e > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi > @@ -0,0 +1,443 @@ > +/* > + * Hardkernel Odroid XU3/XU4/HC1 boards core device tree source > + * > + * Copyright (c) 2017 Marek Szyprowski > + * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > +*/ > + > +#include <dt-bindings/clock/samsung,s2mps11.h> > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/gpio/gpio.h> > +#include "exynos5800.dtsi" > +#include "exynos5422-cpus.dtsi" > + > +/ { > + memory@40000000 { > + device_type = "memory"; > + reg = <0x40000000 0x7EA00000>; > + }; > + > + chosen { > + stdout-path = "serial2:115200n8"; > + }; > + > + firmware@02073000 { > + compatible = "samsung,secure-firmware"; > + reg = <0x02073000 0x1000>; > + }; > + > + fixed-rate-clocks { > + oscclk { > + compatible = "samsung,exynos5420-oscclk"; > + clock-frequency = <24000000>; > + }; > + }; > +}; > + > +&bus_wcore { > + devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>, > + <&nocp_mem1_0>, <&nocp_mem1_1>; > + vdd-supply = <&buck3_reg>; > + exynos,saturation-ratio = <100>; > + status = "okay"; > +}; > + > +&bus_noc { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_fsys_apb { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_fsys { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_fsys2 { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_mfc { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_gen { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_peri { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_g2d { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_g2d_acp { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_jpeg { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_jpeg_apb { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_disp1_fimd { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_disp1 { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_gscl_scaler { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_mscl { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&cpu0 { > + cpu-supply = <&buck6_reg>; > +}; > + > +&cpu4 { > + cpu-supply = <&buck2_reg>; > +}; > + > +&hsi2c_4 { > + status = "okay"; > + > + s2mps11_pmic@66 { > + compatible = "samsung,s2mps11-pmic"; > + reg = <0x66>; > + samsung,s2mps11-acokb-ground; > + > + interrupt-parent = <&gpx0>; > + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; > + pinctrl-names = "default"; > + pinctrl-0 = <&s2mps11_irq>; > + > + s2mps11_osc: clocks { > + #clock-cells = <1>; > + clock-output-names = "s2mps11_ap", > + "s2mps11_cp", "s2mps11_bt"; > + }; > + > + regulators { > + ldo1_reg: LDO1 { > + regulator-name = "vdd_ldo1"; > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1000000>; > + regulator-always-on; > + }; > + > + ldo3_reg: LDO3 { > + regulator-name = "vddq_mmc0"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + ldo4_reg: LDO4 { > + regulator-name = "vdd_adc"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + ldo5_reg: LDO5 { > + regulator-name = "vdd_ldo5"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + ldo6_reg: LDO6 { > + regulator-name = "vdd_ldo6"; > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1000000>; > + regulator-always-on; > + }; > + > + ldo7_reg: LDO7 { > + regulator-name = "vdd_ldo7"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + ldo8_reg: LDO8 { > + regulator-name = "vdd_ldo8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + ldo9_reg: LDO9 { > + regulator-name = "vdd_ldo9"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-always-on; > + }; > + > + ldo10_reg: LDO10 { > + regulator-name = "vdd_ldo10"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + ldo11_reg: LDO11 { > + regulator-name = "vdd_ldo11"; > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1000000>; > + regulator-always-on; > + }; > + > + ldo12_reg: LDO12 { > + regulator-name = "vdd_ldo12"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + ldo13_reg: LDO13 { > + regulator-name = "vddq_mmc2"; > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + }; > + > + ldo15_reg: LDO15 { > + regulator-name = "vdd_ldo15"; > + regulator-min-microvolt = <3100000>; > + regulator-max-microvolt = <3100000>; > + regulator-always-on; > + }; > + > + ldo16_reg: LDO16 { > + regulator-name = "vdd_ldo16"; > + regulator-min-microvolt = <2200000>; > + regulator-max-microvolt = <2200000>; > + regulator-always-on; > + }; > + > + ldo17_reg: LDO17 { > + regulator-name = "tsp_avdd"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + }; > + > + ldo18_reg: LDO18 { > + regulator-name = "vdd_emmc_1V8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + ldo19_reg: LDO19 { > + regulator-name = "vdd_sd"; > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + }; > + > + ldo24_reg: LDO24 { > + regulator-name = "tsp_io"; > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + regulator-always-on; > + }; > + > + ldo26_reg: LDO26 { > + regulator-name = "vdd_ldo26"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-always-on; > + }; > + > + buck1_reg: BUCK1 { > + regulator-name = "vdd_mif"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1300000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck2_reg: BUCK2 { > + regulator-name = "vdd_arm"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck3_reg: BUCK3 { > + regulator-name = "vdd_int"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1400000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck4_reg: BUCK4 { > + regulator-name = "vdd_g3d"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1400000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck5_reg: BUCK5 { > + regulator-name = "vdd_mem"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1400000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck6_reg: BUCK6 { > + regulator-name = "vdd_kfc"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck7_reg: BUCK7 { > + regulator-name = "vdd_1.0v_ldo"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck8_reg: BUCK8 { > + regulator-name = "vdd_1.8v_ldo"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck9_reg: BUCK9 { > + regulator-name = "vdd_2.8v_ldo"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3750000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck10_reg: BUCK10 { > + regulator-name = "vdd_vmem"; > + regulator-min-microvolt = <2850000>; > + regulator-max-microvolt = <2850000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + }; > + }; > +}; > + > +&mmc_2 { > + status = "okay"; > + card-detect-delay = <200>; > + samsung,dw-mshc-ciu-div = <3>; > + samsung,dw-mshc-sdr-timing = <0 4>; > + samsung,dw-mshc-ddr-timing = <0 2>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; > + bus-width = <4>; > + cap-sd-highspeed; > + vmmc-supply = <&ldo19_reg>; > + vqmmc-supply = <&ldo13_reg>; > +}; > + > +&nocp_mem0_0 { > + status = "okay"; > +}; > + > +&nocp_mem0_1 { > + status = "okay"; > +}; > + > +&nocp_mem1_0 { > + status = "okay"; > +}; > + > +&nocp_mem1_1 { > + status = "okay"; > +}; > + > +&pinctrl_0 { > + s2mps11_irq: s2mps11-irq { > + samsung,pins = "gpx0-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > +}; > + > +&tmu_cpu0 { > + vtmu-supply = <&ldo7_reg>; > +}; > + > +&tmu_cpu1 { > + vtmu-supply = <&ldo7_reg>; > +}; > + > +&tmu_cpu2 { > + vtmu-supply = <&ldo7_reg>; > +}; > + > +&tmu_cpu3 { > + vtmu-supply = <&ldo7_reg>; > +}; > + > +&tmu_gpu { > + vtmu-supply = <&ldo7_reg>; > +}; > + > +&rtc { > + status = "okay"; > + clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; > + clock-names = "rtc", "rtc_src"; > +}; > + > +&usbdrd_dwc3_0 { > + dr_mode = "host"; > +}; > + > +/* usbdrd_dwc3_1 mode customized in each board */ > + > +&usbdrd3_0 { > + vdd33-supply = <&ldo9_reg>; > + vdd10-supply = <&ldo11_reg>; > +}; > + > +&usbdrd3_1 { > + vdd33-supply = <&ldo9_reg>; > + vdd10-supply = <&ldo11_reg>; > +}; > diff --git a/arch/arm/boot/dts/exynos5422-odroidhc1.dts b/arch/arm/boot/dts/exynos5422-odroidhc1.dts > new file mode 100644 > index 000000000000..2b3bd3cac5c1 > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5422-odroidhc1.dts > @@ -0,0 +1,217 @@ > +/* > + * Hardkernel Odroid HC1 board device tree source > + * > + * Copyright (c) 2017 Marek Szyprowski > + * Copyright (c) 2017 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > +*/ > + > +/dts-v1/; > +#include "exynos5422-odroid-core.dtsi" > + > +/ { > + model = "Hardkernel Odroid HC1"; > + compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \ > + "samsung,exynos5"; > + > + pwmleds { > + compatible = "pwm-leds"; > + > + blueled { > + label = "blue:heartbeat"; > + pwms = <&pwm 2 2000000 0>; > + pwm-names = "pwm2"; > + max_brightness = <255>; > + linux,default-trigger = "heartbeat"; > + }; > + }; > + > + thermal-zones { > + cpu0_thermal: cpu0-thermal { > + thermal-sensors = <&tmu_cpu0 0>; > + trips { > + cpu0_alert0: cpu-alert-1 { cpu-alert-0 > + temperature = <70000>; /* millicelsius */ > + hysteresis = <10000>; /* millicelsius */ > + type = "active"; > + }; > + cpu0_alert1: cpu-alert-1 { > + temperature = <85000>; /* millicelsius */ > + hysteresis = <10000>; /* millicelsius */ > + type = "active"; > + }; > + cpu0_crit0: cpu-crit-0 { > + temperature = <120000>; /* millicelsius */ > + hysteresis = <0>; /* millicelsius */ > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + /* > + * When reaching cpu0_alert0, reduce CPU > + * by 2 steps. On Exynos5422/5800 that would > + * be: 1600 MHz and 1100 MHz. > + */ > + map0 { > + trip = <&cpu0_alert0>; > + cooling-device = <&cpu0 0 2>; > + }; > + map1 { > + trip = <&cpu0_alert0>; > + cooling-device = <&cpu4 0 2>; > + }; > + /* > + * When reaching cpu0_alert1, reduce CPU > + * further, down to 600 MHz (12 steps for big, > + * 7 steps for LITTLE). > + */ > + map2 { > + trip = <&cpu0_alert1>; > + cooling-device = <&cpu0 3 7>; > + }; > + map3 { > + trip = <&cpu0_alert1>; > + cooling-device = <&cpu4 3 12>; > + }; > + }; > + }; > + cpu1_thermal: cpu1-thermal { > + thermal-sensors = <&tmu_cpu1 0>; > + trips { > + cpu1_alert0: cpu-alert-0 { > + temperature = <70000>; > + hysteresis = <10000>; > + type = "active"; > + }; > + cpu1_alert1: cpu-alert-1 { > + temperature = <85000>; > + hysteresis = <10000>; > + type = "active"; > + }; > + cpu1_crit0: cpu-crit-0 { > + temperature = <120000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&cpu1_alert0>; > + cooling-device = <&cpu0 0 2>; > + }; > + map1 { > + trip = <&cpu1_alert0>; > + cooling-device = <&cpu4 0 2>; > + }; > + map2 { > + trip = <&cpu1_alert1>; > + cooling-device = <&cpu0 3 7>; > + }; > + map3 { > + trip = <&cpu1_alert1>; > + cooling-device = <&cpu4 3 12>; > + }; > + }; > + }; > + cpu2_thermal: cpu2-thermal { > + thermal-sensors = <&tmu_cpu2 0>; > + polling-delay-passive = <250>; > + polling-delay = <0>; > + trips { > + cpu2_alert0: cpu-alert-0 { > + temperature = <70000>; > + hysteresis = <10000>; > + type = "active"; > + }; > + cpu2_alert1: cpu-alert-1 { > + temperature = <85000>; > + hysteresis = <10000>; > + type = "active"; > + }; > + cpu2_crit0: cpu-crit-0 { > + temperature = <120000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&cpu2_alert0>; > + cooling-device = <&cpu0 0 2>; > + }; > + map1 { > + trip = <&cpu2_alert0>; > + cooling-device = <&cpu4 0 2>; > + }; > + map2 { > + trip = <&cpu2_alert1>; > + cooling-device = <&cpu0 3 7>; > + }; > + map3 { > + trip = <&cpu2_alert1>; > + cooling-device = <&cpu4 3 12>; > + }; > + }; > + }; > + cpu3_thermal: cpu3-thermal { > + thermal-sensors = <&tmu_cpu3 0>; > + polling-delay-passive = <250>; > + polling-delay = <0>; > + trips { > + cpu3_alert0: cpu-alert-1 { cpu-alert-0 Best regards, Krzysztof ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board 2017-09-30 17:23 ` Krzysztof Kozlowski @ 2017-10-02 6:34 ` Marek Szyprowski 2017-10-02 6:44 ` Krzysztof Kozlowski 0 siblings, 1 reply; 14+ messages in thread From: Marek Szyprowski @ 2017-10-02 6:34 UTC (permalink / raw) To: Krzysztof Kozlowski; +Cc: linux-samsung-soc, Bartlomiej Zolnierkiewicz Hi Krzysztof, On 2017-09-30 19:23, Krzysztof Kozlowski wrote: > On Fri, Sep 29, 2017 at 01:33:02PM +0200, Marek Szyprowski wrote: >> Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI, >> no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO >> button. USB3.0 ports are used for build-in JMicron USB to SATA bridge >> and Gigabit R8152 ethernet chips. HC1 uses only passive cooling. >> >> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> >> --- >> arch/arm/boot/dts/Makefile | 1 + >> arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 443 +++++++++++++++++++++ >> arch/arm/boot/dts/exynos5422-odroidhc1.dts | 217 ++++++++++ >> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 428 +------------------- > Please experiment with -M (maybe -M20%?) and -B so this would be > detected as rename. It might create much simpler patch thus making the > review easy (one could see that the changes are just movements). I didn't manage to generate different patch with those options. I have however checked that odroidxu3/xu3-lite/xu4 dtbs are exactly the same after applying this patch (using dtx_diff tool). > ... Best regards -- Marek Szyprowski, PhD Samsung R&D Institute Poland ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board 2017-10-02 6:34 ` Marek Szyprowski @ 2017-10-02 6:44 ` Krzysztof Kozlowski 2017-10-02 6:59 ` Marek Szyprowski 0 siblings, 1 reply; 14+ messages in thread From: Krzysztof Kozlowski @ 2017-10-02 6:44 UTC (permalink / raw) To: Marek Szyprowski; +Cc: linux-samsung-soc, Bartlomiej Zolnierkiewicz On Mon, Oct 2, 2017 at 8:34 AM, Marek Szyprowski <m.szyprowski@samsung.com> wrote: > Hi Krzysztof, > > On 2017-09-30 19:23, Krzysztof Kozlowski wrote: >> >> On Fri, Sep 29, 2017 at 01:33:02PM +0200, Marek Szyprowski wrote: >>> >>> Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI, >>> no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO >>> button. USB3.0 ports are used for build-in JMicron USB to SATA bridge >>> and Gigabit R8152 ethernet chips. HC1 uses only passive cooling. >>> >>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> >>> --- >>> arch/arm/boot/dts/Makefile | 1 + >>> arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 443 >>> +++++++++++++++++++++ >>> arch/arm/boot/dts/exynos5422-odroidhc1.dts | 217 ++++++++++ >>> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 428 >>> +------------------- >> >> Please experiment with -M (maybe -M20%?) and -B so this would be >> detected as rename. It might create much simpler patch thus making the >> review easy (one could see that the changes are just movements). > > > I didn't manage to generate different patch with those options. I have > however checked that odroidxu3/xu3-lite/xu4 dtbs are exactly the same after > applying this patch (using dtx_diff tool). Then it looks like the same issue as here: http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/477315.html You are using some ancient git (v1.9.1) which was released more than three years ago. March 2014. As Andi pointed in that thread - he had no problems with -M and -B on newer version. Same DTBS are good but it might not catch everything. For example any change in formatting or name of labels (not leading to functional change) will not be detected. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board 2017-10-02 6:44 ` Krzysztof Kozlowski @ 2017-10-02 6:59 ` Marek Szyprowski 2017-10-02 16:54 ` Krzysztof Kozlowski 0 siblings, 1 reply; 14+ messages in thread From: Marek Szyprowski @ 2017-10-02 6:59 UTC (permalink / raw) To: Krzysztof Kozlowski; +Cc: linux-samsung-soc, Bartlomiej Zolnierkiewicz On 2017-10-02 08:44, Krzysztof Kozlowski wrote: > On Mon, Oct 2, 2017 at 8:34 AM, Marek Szyprowski > <m.szyprowski@samsung.com> wrote: >> Hi Krzysztof, >> >> On 2017-09-30 19:23, Krzysztof Kozlowski wrote: >>> On Fri, Sep 29, 2017 at 01:33:02PM +0200, Marek Szyprowski wrote: >>>> Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI, >>>> no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO >>>> button. USB3.0 ports are used for build-in JMicron USB to SATA bridge >>>> and Gigabit R8152 ethernet chips. HC1 uses only passive cooling. >>>> >>>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> >>>> --- >>>> arch/arm/boot/dts/Makefile | 1 + >>>> arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 443 >>>> +++++++++++++++++++++ >>>> arch/arm/boot/dts/exynos5422-odroidhc1.dts | 217 ++++++++++ >>>> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 428 >>>> +------------------- >>> Please experiment with -M (maybe -M20%?) and -B so this would be >>> detected as rename. It might create much simpler patch thus making the >>> review easy (one could see that the changes are just movements). >> >> I didn't manage to generate different patch with those options. I have >> however checked that odroidxu3/xu3-lite/xu4 dtbs are exactly the same after >> applying this patch (using dtx_diff tool). > Then it looks like the same issue as here: > http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/477315.html > > You are using some ancient git (v1.9.1) which was released more than > three years ago. March 2014. As Andi pointed in that thread - he had > no problems with -M and -B on newer version. 3 years old software is not really an ancient software - it a stable version from LTS distro. Unless you need some newly added features it is imho fine to use for your DAILY work. Anyway, I've just checked with git v2.14.2 and it generates exactly the same diffs. > Same DTBS are good but it might not catch everything. For example any > change in formatting or name of labels (not leading to functional > change) will not be detected. Best regards -- Marek Szyprowski, PhD Samsung R&D Institute Poland ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board 2017-10-02 6:59 ` Marek Szyprowski @ 2017-10-02 16:54 ` Krzysztof Kozlowski 0 siblings, 0 replies; 14+ messages in thread From: Krzysztof Kozlowski @ 2017-10-02 16:54 UTC (permalink / raw) To: Marek Szyprowski; +Cc: linux-samsung-soc, Bartlomiej Zolnierkiewicz On Mon, Oct 02, 2017 at 08:59:34AM +0200, Marek Szyprowski wrote: > > > On 2017-10-02 08:44, Krzysztof Kozlowski wrote: > > On Mon, Oct 2, 2017 at 8:34 AM, Marek Szyprowski > > <m.szyprowski@samsung.com> wrote: > > > Hi Krzysztof, > > > > > > On 2017-09-30 19:23, Krzysztof Kozlowski wrote: > > > > On Fri, Sep 29, 2017 at 01:33:02PM +0200, Marek Szyprowski wrote: > > > > > Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI, > > > > > no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO > > > > > button. USB3.0 ports are used for build-in JMicron USB to SATA bridge > > > > > and Gigabit R8152 ethernet chips. HC1 uses only passive cooling. > > > > > > > > > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > > > > > --- > > > > > arch/arm/boot/dts/Makefile | 1 + > > > > > arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 443 > > > > > +++++++++++++++++++++ > > > > > arch/arm/boot/dts/exynos5422-odroidhc1.dts | 217 ++++++++++ > > > > > arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 428 > > > > > +------------------- > > > > Please experiment with -M (maybe -M20%?) and -B so this would be > > > > detected as rename. It might create much simpler patch thus making the > > > > review easy (one could see that the changes are just movements). > > > > > > I didn't manage to generate different patch with those options. I have > > > however checked that odroidxu3/xu3-lite/xu4 dtbs are exactly the same after > > > applying this patch (using dtx_diff tool). > > Then it looks like the same issue as here: > > http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/477315.html > > > > You are using some ancient git (v1.9.1) which was released more than > > three years ago. March 2014. As Andi pointed in that thread - he had > > no problems with -M and -B on newer version. > > 3 years old software is not really an ancient software - it a stable version > from LTS distro. Unless you need some newly added features it is imho fine > to > use for your DAILY work. Anyway, I've just checked with git v2.14.2 and it > generates exactly the same diffs. I also experimented (including -C and --find-copies-harder) but indeed git did not want to detect the copy. Anyway thanks for trying and confirming with dtx_diff. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board 2017-09-29 11:33 ` [PATCH 2/3] ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board Marek Szyprowski 2017-09-30 17:23 ` Krzysztof Kozlowski @ 2017-10-01 5:17 ` Anand Moon 1 sibling, 0 replies; 14+ messages in thread From: Anand Moon @ 2017-10-01 5:17 UTC (permalink / raw) To: Marek Szyprowski Cc: linux-samsung-soc, Krzysztof Kozlowski, Bartlomiej Zolnierkiewicz Hi Marek, On 29 September 2017 at 17:03, Marek Szyprowski <m.szyprowski@samsung.com> wrote: > Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI, > no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO > button. USB3.0 ports are used for build-in JMicron USB to SATA bridge > and Gigabit R8152 ethernet chips. HC1 uses only passive cooling. > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 443 +++++++++++++++++++++ > arch/arm/boot/dts/exynos5422-odroidhc1.dts | 217 ++++++++++ > arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 428 +------------------- > 4 files changed, 662 insertions(+), 427 deletions(-) > create mode 100644 arch/arm/boot/dts/exynos5422-odroid-core.dtsi > create mode 100644 arch/arm/boot/dts/exynos5422-odroidhc1.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 9cf688d404b8..54b06a576551 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -176,6 +176,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \ > exynos5420-arndale-octa.dtb \ > exynos5420-peach-pit.dtb \ > exynos5420-smdk5420.dtb \ > + exynos5422-odroidhc1.dtb \ > exynos5422-odroidxu3.dtb \ > exynos5422-odroidxu3-lite.dtb \ > exynos5422-odroidxu4.dtb \ > diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi > new file mode 100644 > index 000000000000..a5b8d0f0877e > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi > @@ -0,0 +1,443 @@ > +/* > + * Hardkernel Odroid XU3/XU4/HC1 boards core device tree source > + * > + * Copyright (c) 2017 Marek Szyprowski > + * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > +*/ > + > +#include <dt-bindings/clock/samsung,s2mps11.h> > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/gpio/gpio.h> > +#include "exynos5800.dtsi" > +#include "exynos5422-cpus.dtsi" > + > +/ { > + memory@40000000 { > + device_type = "memory"; > + reg = <0x40000000 0x7EA00000>; > + }; > + > + chosen { > + stdout-path = "serial2:115200n8"; > + }; > + > + firmware@02073000 { > + compatible = "samsung,secure-firmware"; > + reg = <0x02073000 0x1000>; > + }; > + > + fixed-rate-clocks { > + oscclk { > + compatible = "samsung,exynos5420-oscclk"; > + clock-frequency = <24000000>; > + }; > + }; > +}; > + > +&bus_wcore { > + devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>, > + <&nocp_mem1_0>, <&nocp_mem1_1>; > + vdd-supply = <&buck3_reg>; > + exynos,saturation-ratio = <100>; > + status = "okay"; > +}; > + > +&bus_noc { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_fsys_apb { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_fsys { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_fsys2 { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_mfc { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_gen { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_peri { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_g2d { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_g2d_acp { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_jpeg { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_jpeg_apb { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_disp1_fimd { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_disp1 { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_gscl_scaler { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&bus_mscl { > + devfreq = <&bus_wcore>; > + status = "okay"; > +}; > + > +&cpu0 { > + cpu-supply = <&buck6_reg>; > +}; > + > +&cpu4 { > + cpu-supply = <&buck2_reg>; > +}; > + > +&hsi2c_4 { > + status = "okay"; > + > + s2mps11_pmic@66 { > + compatible = "samsung,s2mps11-pmic"; > + reg = <0x66>; > + samsung,s2mps11-acokb-ground; > + > + interrupt-parent = <&gpx0>; > + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; > + pinctrl-names = "default"; > + pinctrl-0 = <&s2mps11_irq>; > + > + s2mps11_osc: clocks { > + #clock-cells = <1>; > + clock-output-names = "s2mps11_ap", > + "s2mps11_cp", "s2mps11_bt"; > + }; > + > + regulators { > + ldo1_reg: LDO1 { > + regulator-name = "vdd_ldo1"; > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1000000>; > + regulator-always-on; > + }; > + > + ldo3_reg: LDO3 { > + regulator-name = "vddq_mmc0"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + ldo4_reg: LDO4 { > + regulator-name = "vdd_adc"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + ldo5_reg: LDO5 { > + regulator-name = "vdd_ldo5"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + ldo6_reg: LDO6 { > + regulator-name = "vdd_ldo6"; > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1000000>; > + regulator-always-on; > + }; > + > + ldo7_reg: LDO7 { > + regulator-name = "vdd_ldo7"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + ldo8_reg: LDO8 { > + regulator-name = "vdd_ldo8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + ldo9_reg: LDO9 { > + regulator-name = "vdd_ldo9"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-always-on; > + }; > + > + ldo10_reg: LDO10 { > + regulator-name = "vdd_ldo10"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + ldo11_reg: LDO11 { > + regulator-name = "vdd_ldo11"; > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1000000>; > + regulator-always-on; > + }; > + > + ldo12_reg: LDO12 { > + regulator-name = "vdd_ldo12"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + ldo13_reg: LDO13 { > + regulator-name = "vddq_mmc2"; > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + }; > + > + ldo15_reg: LDO15 { > + regulator-name = "vdd_ldo15"; > + regulator-min-microvolt = <3100000>; > + regulator-max-microvolt = <3100000>; > + regulator-always-on; > + }; > + > + ldo16_reg: LDO16 { > + regulator-name = "vdd_ldo16"; > + regulator-min-microvolt = <2200000>; > + regulator-max-microvolt = <2200000>; > + regulator-always-on; > + }; > + > + ldo17_reg: LDO17 { > + regulator-name = "tsp_avdd"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + }; > + > + ldo18_reg: LDO18 { > + regulator-name = "vdd_emmc_1V8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + ldo19_reg: LDO19 { > + regulator-name = "vdd_sd"; > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + }; > + > + ldo24_reg: LDO24 { > + regulator-name = "tsp_io"; > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + regulator-always-on; > + }; > + > + ldo26_reg: LDO26 { > + regulator-name = "vdd_ldo26"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-always-on; > + }; > + > + buck1_reg: BUCK1 { > + regulator-name = "vdd_mif"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1300000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck2_reg: BUCK2 { > + regulator-name = "vdd_arm"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck3_reg: BUCK3 { > + regulator-name = "vdd_int"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1400000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck4_reg: BUCK4 { > + regulator-name = "vdd_g3d"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1400000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck5_reg: BUCK5 { > + regulator-name = "vdd_mem"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1400000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck6_reg: BUCK6 { > + regulator-name = "vdd_kfc"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck7_reg: BUCK7 { > + regulator-name = "vdd_1.0v_ldo"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck8_reg: BUCK8 { > + regulator-name = "vdd_1.8v_ldo"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck9_reg: BUCK9 { > + regulator-name = "vdd_2.8v_ldo"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3750000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + buck10_reg: BUCK10 { > + regulator-name = "vdd_vmem"; > + regulator-min-microvolt = <2850000>; > + regulator-max-microvolt = <2850000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + }; > + }; > +}; > + > +&mmc_2 { > + status = "okay"; > + card-detect-delay = <200>; > + samsung,dw-mshc-ciu-div = <3>; > + samsung,dw-mshc-sdr-timing = <0 4>; > + samsung,dw-mshc-ddr-timing = <0 2>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; > + bus-width = <4>; > + cap-sd-highspeed; > + vmmc-supply = <&ldo19_reg>; > + vqmmc-supply = <&ldo13_reg>; > +}; > + > +&nocp_mem0_0 { > + status = "okay"; > +}; > + > +&nocp_mem0_1 { > + status = "okay"; > +}; > + > +&nocp_mem1_0 { > + status = "okay"; > +}; > + > +&nocp_mem1_1 { > + status = "okay"; > +}; > + > +&pinctrl_0 { > + s2mps11_irq: s2mps11-irq { > + samsung,pins = "gpx0-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > +}; > + > +&tmu_cpu0 { > + vtmu-supply = <&ldo7_reg>; > +}; > + > +&tmu_cpu1 { > + vtmu-supply = <&ldo7_reg>; > +}; > + > +&tmu_cpu2 { > + vtmu-supply = <&ldo7_reg>; > +}; > + > +&tmu_cpu3 { > + vtmu-supply = <&ldo7_reg>; > +}; > + > +&tmu_gpu { > + vtmu-supply = <&ldo7_reg>; > +}; > + > +&rtc { > + status = "okay"; > + clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; > + clock-names = "rtc", "rtc_src"; > +}; > + > +&usbdrd_dwc3_0 { > + dr_mode = "host"; > +}; > + > +/* usbdrd_dwc3_1 mode customized in each board */ > + > +&usbdrd3_0 { > + vdd33-supply = <&ldo9_reg>; > + vdd10-supply = <&ldo11_reg>; > +}; > + > +&usbdrd3_1 { > + vdd33-supply = <&ldo9_reg>; > + vdd10-supply = <&ldo11_reg>; > +}; > diff --git a/arch/arm/boot/dts/exynos5422-odroidhc1.dts b/arch/arm/boot/dts/exynos5422-odroidhc1.dts > new file mode 100644 > index 000000000000..2b3bd3cac5c1 > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5422-odroidhc1.dts > @@ -0,0 +1,217 @@ > +/* > + * Hardkernel Odroid HC1 board device tree source > + * > + * Copyright (c) 2017 Marek Szyprowski > + * Copyright (c) 2017 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > +*/ > + > +/dts-v1/; > +#include "exynos5422-odroid-core.dtsi" > + > +/ { > + model = "Hardkernel Odroid HC1"; > + compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \ > + "samsung,exynos5"; > + > + pwmleds { > + compatible = "pwm-leds"; > + > + blueled { > + label = "blue:heartbeat"; > + pwms = <&pwm 2 2000000 0>; > + pwm-names = "pwm2"; > + max_brightness = <255>; > + linux,default-trigger = "heartbeat"; > + }; > + }; > + It looks like you are setting up thermal zone to this board but I would like to have this setting for all Exynos5422 platforms in common file, as Odroid XU4 and Odroid XU4Q support passive cool. I have Odroid XU4Q/HC1 and it get pretty hot on heavy load as they run for 24x7. If possible we should support the thermal-zone with active and passive cooling trips. Plus the current exynos-tmu driver is missing some core changes to support this board. I will be working on this to provide proper fix to this issue and submit my changes soon. > + thermal-zones { > + cpu0_thermal: cpu0-thermal { > + thermal-sensors = <&tmu_cpu0 0>; > + trips { > + cpu0_alert0: cpu-alert-1 { > + temperature = <70000>; /* millicelsius */ > + hysteresis = <10000>; /* millicelsius */ > + type = "active"; > + }; > + cpu0_alert1: cpu-alert-1 { > + temperature = <85000>; /* millicelsius */ > + hysteresis = <10000>; /* millicelsius */ > + type = "active"; > + }; > + cpu0_crit0: cpu-crit-0 { > + temperature = <120000>; /* millicelsius */ > + hysteresis = <0>; /* millicelsius */ > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + /* > + * When reaching cpu0_alert0, reduce CPU > + * by 2 steps. On Exynos5422/5800 that would > + * be: 1600 MHz and 1100 MHz. > + */ > + map0 { > + trip = <&cpu0_alert0>; > + cooling-device = <&cpu0 0 2>; > + }; > + map1 { > + trip = <&cpu0_alert0>; > + cooling-device = <&cpu4 0 2>; > + }; > + /* > + * When reaching cpu0_alert1, reduce CPU > + * further, down to 600 MHz (12 steps for big, > + * 7 steps for LITTLE). > + */ > + map2 { > + trip = <&cpu0_alert1>; > + cooling-device = <&cpu0 3 7>; > + }; > + map3 { > + trip = <&cpu0_alert1>; > + cooling-device = <&cpu4 3 12>; > + }; > + }; > + }; > + cpu1_thermal: cpu1-thermal { > + thermal-sensors = <&tmu_cpu1 0>; > + trips { > + cpu1_alert0: cpu-alert-0 { > + temperature = <70000>; > + hysteresis = <10000>; > + type = "active"; > + }; > + cpu1_alert1: cpu-alert-1 { > + temperature = <85000>; > + hysteresis = <10000>; > + type = "active"; > + }; > + cpu1_crit0: cpu-crit-0 { > + temperature = <120000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&cpu1_alert0>; > + cooling-device = <&cpu0 0 2>; > + }; > + map1 { > + trip = <&cpu1_alert0>; > + cooling-device = <&cpu4 0 2>; > + }; > + map2 { > + trip = <&cpu1_alert1>; > + cooling-device = <&cpu0 3 7>; > + }; > + map3 { > + trip = <&cpu1_alert1>; > + cooling-device = <&cpu4 3 12>; > + }; > + }; > + }; > + cpu2_thermal: cpu2-thermal { > + thermal-sensors = <&tmu_cpu2 0>; > + polling-delay-passive = <250>; > + polling-delay = <0>; > + trips { > + cpu2_alert0: cpu-alert-0 { > + temperature = <70000>; > + hysteresis = <10000>; > + type = "active"; > + }; > + cpu2_alert1: cpu-alert-1 { > + temperature = <85000>; > + hysteresis = <10000>; > + type = "active"; > + }; > + cpu2_crit0: cpu-crit-0 { > + temperature = <120000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&cpu2_alert0>; > + cooling-device = <&cpu0 0 2>; > + }; > + map1 { > + trip = <&cpu2_alert0>; > + cooling-device = <&cpu4 0 2>; > + }; > + map2 { > + trip = <&cpu2_alert1>; > + cooling-device = <&cpu0 3 7>; > + }; > + map3 { > + trip = <&cpu2_alert1>; > + cooling-device = <&cpu4 3 12>; > + }; > + }; > + }; > + cpu3_thermal: cpu3-thermal { > + thermal-sensors = <&tmu_cpu3 0>; > + polling-delay-passive = <250>; > + polling-delay = <0>; > + trips { > + cpu3_alert0: cpu-alert-1 { > + temperature = <70000>; > + hysteresis = <10000>; > + type = "active"; > + }; > + cpu3_alert1: cpu-alert-1 { > + temperature = <85000>; > + hysteresis = <10000>; > + type = "active"; > + }; > + cpu3_crit0: cpu-crit-0 { > + temperature = <120000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&cpu3_alert0>; > + cooling-device = <&cpu0 0 2>; > + }; > + map1 { > + trip = <&cpu3_alert0>; > + cooling-device = <&cpu4 0 2>; > + }; > + map2 { > + trip = <&cpu3_alert1>; > + cooling-device = <&cpu0 3 7>; > + }; > + map3 { > + trip = <&cpu3_alert1>; > + cooling-device = <&cpu4 3 12>; > + }; > + }; > + }; > + }; > + > +}; > + > +&pwm { > + /* > + * PWM 2 -- Blue LED > + */ > + pinctrl-0 = <&pwm2_out>; > + pinctrl-names = "default"; > + samsung,pwm-outputs = <2>; > + status = "okay"; > +}; > + > +&usbdrd_dwc3_1 { > + dr_mode = "host"; > +}; > diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi > index 4478a089353a..445c6c5a1300 100644 > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi > @@ -12,35 +12,10 @@ > * published by the Free Software Foundation. > */ > > -#include <dt-bindings/clock/samsung,s2mps11.h> > #include <dt-bindings/input/input.h> > -#include <dt-bindings/interrupt-controller/irq.h> > -#include <dt-bindings/gpio/gpio.h> > -#include "exynos5800.dtsi" > -#include "exynos5422-cpus.dtsi" > +#include "exynos5422-odroid-core.dtsi" > > / { > - memory@40000000 { > - device_type = "memory"; > - reg = <0x40000000 0x7EA00000>; > - }; > - > - chosen { > - stdout-path = "serial2:115200n8"; > - }; > - > - firmware@02073000 { > - compatible = "samsung,secure-firmware"; > - reg = <0x02073000 0x1000>; > - }; > - > - fixed-rate-clocks { > - oscclk { > - compatible = "samsung,exynos5420-oscclk"; > - clock-frequency = <24000000>; > - }; > - }; > - > gpio_keys { > compatible = "gpio-keys"; > pinctrl-names = "default"; > @@ -371,97 +346,6 @@ > status = "okay"; > }; > > -&bus_wcore { > - devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>, > - <&nocp_mem1_0>, <&nocp_mem1_1>; > - vdd-supply = <&buck3_reg>; > - exynos,saturation-ratio = <100>; > - status = "okay"; > -}; > - > -&bus_noc { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_fsys_apb { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_fsys { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_fsys2 { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_mfc { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_gen { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_peri { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_g2d { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_g2d_acp { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_jpeg { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_jpeg_apb { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_disp1_fimd { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_disp1 { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_gscl_scaler { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&bus_mscl { > - devfreq = <&bus_wcore>; > - status = "okay"; > -}; > - > -&cpu0 { > - cpu-supply = <&buck6_reg>; > -}; > - > -&cpu4 { > - cpu-supply = <&buck2_reg>; > -}; > - > &hdmi { > status = "okay"; > ddc = <&i2c_2>; > @@ -479,237 +363,6 @@ > needs-hpd; > }; > > -&hsi2c_4 { > - status = "okay"; > - > - s2mps11_pmic@66 { > - compatible = "samsung,s2mps11-pmic"; > - reg = <0x66>; > - samsung,s2mps11-acokb-ground; > - > - interrupt-parent = <&gpx0>; > - interrupts = <4 IRQ_TYPE_EDGE_FALLING>; > - pinctrl-names = "default"; > - pinctrl-0 = <&s2mps11_irq>; > - > - s2mps11_osc: clocks { > - #clock-cells = <1>; > - clock-output-names = "s2mps11_ap", > - "s2mps11_cp", "s2mps11_bt"; > - }; > - > - regulators { > - ldo1_reg: LDO1 { > - regulator-name = "vdd_ldo1"; > - regulator-min-microvolt = <1000000>; > - regulator-max-microvolt = <1000000>; > - regulator-always-on; > - }; > - > - ldo3_reg: LDO3 { > - regulator-name = "vddq_mmc0"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - }; > - > - ldo4_reg: LDO4 { > - regulator-name = "vdd_adc"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - }; > - > - ldo5_reg: LDO5 { > - regulator-name = "vdd_ldo5"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - regulator-always-on; > - }; > - > - ldo6_reg: LDO6 { > - regulator-name = "vdd_ldo6"; > - regulator-min-microvolt = <1000000>; > - regulator-max-microvolt = <1000000>; > - regulator-always-on; > - }; > - > - ldo7_reg: LDO7 { > - regulator-name = "vdd_ldo7"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - regulator-always-on; > - }; > - > - ldo8_reg: LDO8 { > - regulator-name = "vdd_ldo8"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - regulator-always-on; > - }; > - > - ldo9_reg: LDO9 { > - regulator-name = "vdd_ldo9"; > - regulator-min-microvolt = <3000000>; > - regulator-max-microvolt = <3000000>; > - regulator-always-on; > - }; > - > - ldo10_reg: LDO10 { > - regulator-name = "vdd_ldo10"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - regulator-always-on; > - }; > - > - ldo11_reg: LDO11 { > - regulator-name = "vdd_ldo11"; > - regulator-min-microvolt = <1000000>; > - regulator-max-microvolt = <1000000>; > - regulator-always-on; > - }; > - > - ldo12_reg: LDO12 { > - regulator-name = "vdd_ldo12"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - regulator-always-on; > - }; > - > - ldo13_reg: LDO13 { > - regulator-name = "vddq_mmc2"; > - regulator-min-microvolt = <2800000>; > - regulator-max-microvolt = <2800000>; > - }; > - > - ldo15_reg: LDO15 { > - regulator-name = "vdd_ldo15"; > - regulator-min-microvolt = <3100000>; > - regulator-max-microvolt = <3100000>; > - regulator-always-on; > - }; > - > - ldo16_reg: LDO16 { > - regulator-name = "vdd_ldo16"; > - regulator-min-microvolt = <2200000>; > - regulator-max-microvolt = <2200000>; > - regulator-always-on; > - }; > - > - ldo17_reg: LDO17 { > - regulator-name = "tsp_avdd"; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - regulator-always-on; > - }; > - > - ldo18_reg: LDO18 { > - regulator-name = "vdd_emmc_1V8"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - }; > - > - ldo19_reg: LDO19 { > - regulator-name = "vdd_sd"; > - regulator-min-microvolt = <2800000>; > - regulator-max-microvolt = <2800000>; > - }; > - > - ldo24_reg: LDO24 { > - regulator-name = "tsp_io"; > - regulator-min-microvolt = <2800000>; > - regulator-max-microvolt = <2800000>; > - regulator-always-on; > - }; > - > - ldo26_reg: LDO26 { > - regulator-name = "vdd_ldo26"; > - regulator-min-microvolt = <3000000>; > - regulator-max-microvolt = <3000000>; > - regulator-always-on; > - }; > - > - buck1_reg: BUCK1 { > - regulator-name = "vdd_mif"; > - regulator-min-microvolt = <800000>; > - regulator-max-microvolt = <1300000>; > - regulator-always-on; > - regulator-boot-on; > - }; > - > - buck2_reg: BUCK2 { > - regulator-name = "vdd_arm"; > - regulator-min-microvolt = <800000>; > - regulator-max-microvolt = <1500000>; > - regulator-always-on; > - regulator-boot-on; > - }; > - > - buck3_reg: BUCK3 { > - regulator-name = "vdd_int"; > - regulator-min-microvolt = <800000>; > - regulator-max-microvolt = <1400000>; > - regulator-always-on; > - regulator-boot-on; > - }; > - > - buck4_reg: BUCK4 { > - regulator-name = "vdd_g3d"; > - regulator-min-microvolt = <800000>; > - regulator-max-microvolt = <1400000>; > - regulator-always-on; > - regulator-boot-on; > - }; > - > - buck5_reg: BUCK5 { > - regulator-name = "vdd_mem"; > - regulator-min-microvolt = <800000>; > - regulator-max-microvolt = <1400000>; > - regulator-always-on; > - regulator-boot-on; > - }; > - > - buck6_reg: BUCK6 { > - regulator-name = "vdd_kfc"; > - regulator-min-microvolt = <800000>; > - regulator-max-microvolt = <1500000>; > - regulator-always-on; > - regulator-boot-on; > - }; > - > - buck7_reg: BUCK7 { > - regulator-name = "vdd_1.0v_ldo"; > - regulator-min-microvolt = <800000>; > - regulator-max-microvolt = <1500000>; > - regulator-always-on; > - regulator-boot-on; > - }; > - > - buck8_reg: BUCK8 { > - regulator-name = "vdd_1.8v_ldo"; > - regulator-min-microvolt = <800000>; > - regulator-max-microvolt = <1500000>; > - regulator-always-on; > - regulator-boot-on; > - }; > - > - buck9_reg: BUCK9 { > - regulator-name = "vdd_2.8v_ldo"; > - regulator-min-microvolt = <3000000>; > - regulator-max-microvolt = <3750000>; > - regulator-always-on; > - regulator-boot-on; > - }; > - > - buck10_reg: BUCK10 { > - regulator-name = "vdd_vmem"; > - regulator-min-microvolt = <2850000>; > - regulator-max-microvolt = <2850000>; > - regulator-always-on; > - regulator-boot-on; > - }; > - }; > - }; > -}; > - > &i2c_2 { > samsung,i2c-sda-delay = <100>; > samsung,i2c-max-bus-freq = <66000>; > @@ -740,36 +393,6 @@ > vqmmc-supply = <&ldo3_reg>; > }; > > -&mmc_2 { > - status = "okay"; > - card-detect-delay = <200>; > - samsung,dw-mshc-ciu-div = <3>; > - samsung,dw-mshc-sdr-timing = <0 4>; > - samsung,dw-mshc-ddr-timing = <0 2>; > - pinctrl-names = "default"; > - pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; > - bus-width = <4>; > - cap-sd-highspeed; > - vmmc-supply = <&ldo19_reg>; > - vqmmc-supply = <&ldo13_reg>; > -}; > - > -&nocp_mem0_0 { > - status = "okay"; > -}; > - > -&nocp_mem0_1 { > - status = "okay"; > -}; > - > -&nocp_mem1_0 { > - status = "okay"; > -}; > - > -&nocp_mem1_1 { > - status = "okay"; > -}; > - > &pinctrl_0 { > power_key: power-key { > samsung,pins = "gpx0-3"; > @@ -784,13 +407,6 @@ > samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > }; > - > - s2mps11_irq: s2mps11-irq { > - samsung,pins = "gpx0-4"; > - samsung,pin-function = <EXYNOS_PIN_FUNC_F>; > - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > - }; > }; > > &pinctrl_1 { > @@ -801,45 +417,3 @@ > samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > }; > }; > - > -&tmu_cpu0 { > - vtmu-supply = <&ldo7_reg>; > -}; > - > -&tmu_cpu1 { > - vtmu-supply = <&ldo7_reg>; > -}; > - > -&tmu_cpu2 { > - vtmu-supply = <&ldo7_reg>; > -}; > - > -&tmu_cpu3 { > - vtmu-supply = <&ldo7_reg>; > -}; > - > -&tmu_gpu { > - vtmu-supply = <&ldo7_reg>; > -}; > - > -&rtc { > - status = "okay"; > - clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; > - clock-names = "rtc", "rtc_src"; > -}; > - > -&usbdrd_dwc3_0 { > - dr_mode = "host"; > -}; > - > -/* usbdrd_dwc3_1 mode customized in each board */ > - > -&usbdrd3_0 { > - vdd33-supply = <&ldo9_reg>; > - vdd10-supply = <&ldo11_reg>; > -}; > - > -&usbdrd3_1 { > - vdd33-supply = <&ldo9_reg>; > - vdd10-supply = <&ldo11_reg>; > -}; Best Regards -Anand > -- > 1.9.1 > > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 14+ messages in thread
[parent not found: <CGME20170929113314eucas1p2742039d35eb39f6d4749fe09988373d9@eucas1p2.samsung.com>]
* [PATCH 3/3] ARM: exynos_defconfig: Enable UAS support for Odroid HC1 board [not found] ` <CGME20170929113314eucas1p2742039d35eb39f6d4749fe09988373d9@eucas1p2.samsung.com> @ 2017-09-29 11:33 ` Marek Szyprowski 2017-09-30 17:31 ` Krzysztof Kozlowski 0 siblings, 1 reply; 14+ messages in thread From: Marek Szyprowski @ 2017-09-29 11:33 UTC (permalink / raw) To: linux-samsung-soc Cc: Marek Szyprowski, Krzysztof Kozlowski, Bartlomiej Zolnierkiewicz Odroid HC1 board has build-in JMicron USB to SATA bridge, which supports UAS protocol. Enable support for it to make sure that all build-in devices are available. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> --- arch/arm/configs/exynos_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 8c2a2619971b..f1d7834990ec 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -244,7 +244,7 @@ CONFIG_USB_STORAGE_ONETOUCH=m CONFIG_USB_STORAGE_KARMA=m CONFIG_USB_STORAGE_CYPRESS_ATACB=m CONFIG_USB_STORAGE_ENE_UB6250=m -CONFIG_USB_UAS=m +CONFIG_USB_UAS=y CONFIG_USB_DWC3=y CONFIG_USB_DWC2=y CONFIG_USB_HSIC_USB3503=y -- 1.9.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] ARM: exynos_defconfig: Enable UAS support for Odroid HC1 board 2017-09-29 11:33 ` [PATCH 3/3] ARM: exynos_defconfig: Enable UAS support for " Marek Szyprowski @ 2017-09-30 17:31 ` Krzysztof Kozlowski 0 siblings, 0 replies; 14+ messages in thread From: Krzysztof Kozlowski @ 2017-09-30 17:31 UTC (permalink / raw) To: Marek Szyprowski; +Cc: linux-samsung-soc, Bartlomiej Zolnierkiewicz On Fri, Sep 29, 2017 at 01:33:03PM +0200, Marek Szyprowski wrote: > Odroid HC1 board has build-in JMicron USB to SATA bridge, which supports s/build/built/ (also below) > UAS protocol. Enable support for it to make sure that all build-in devices > are available. UAS was enabled, as a module. You made it built-in instead so the commit should describe the reason behind this change. Best regards, Krzysztof > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > arch/arm/configs/exynos_defconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig > index 8c2a2619971b..f1d7834990ec 100644 > --- a/arch/arm/configs/exynos_defconfig > +++ b/arch/arm/configs/exynos_defconfig > @@ -244,7 +244,7 @@ CONFIG_USB_STORAGE_ONETOUCH=m > CONFIG_USB_STORAGE_KARMA=m > CONFIG_USB_STORAGE_CYPRESS_ATACB=m > CONFIG_USB_STORAGE_ENE_UB6250=m > -CONFIG_USB_UAS=m > +CONFIG_USB_UAS=y > CONFIG_USB_DWC3=y > CONFIG_USB_DWC2=y > CONFIG_USB_HSIC_USB3503=y > -- > 1.9.1 > ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2017-10-02 16:54 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
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[not found] <CGME20170929113313eucas1p285173d5410c7d0b07f209c76f0ffaeaf@eucas1p2.samsung.com>
2017-09-29 11:33 ` [PATCH 0/3] Add support for Hardkernel's Odroid HC1 board Marek Szyprowski
[not found] ` <CGME20170929113314eucas1p12d4668bccf9a42acefc32d572e24301f@eucas1p1.samsung.com>
2017-09-29 11:33 ` [PATCH 1/3] ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi Marek Szyprowski
[not found] ` <CGME20170929123353eucas1p164a4d125cf71345f98dc27d5eb8d1e3d@eucas1p1.samsung.com>
2017-09-29 12:33 ` [PATCH 1/3 RESEND] " Marek Szyprowski
2017-09-29 12:54 ` Sylwester Nawrocki
2017-09-30 17:14 ` Krzysztof Kozlowski
[not found] ` <CGME20170929113314eucas1p250037030204ab9d0f936afa6f660923f@eucas1p2.samsung.com>
2017-09-29 11:33 ` [PATCH 2/3] ARM: dts: exynos: Add support for Hardkernel's Odroid HC1 board Marek Szyprowski
2017-09-30 17:23 ` Krzysztof Kozlowski
2017-10-02 6:34 ` Marek Szyprowski
2017-10-02 6:44 ` Krzysztof Kozlowski
2017-10-02 6:59 ` Marek Szyprowski
2017-10-02 16:54 ` Krzysztof Kozlowski
2017-10-01 5:17 ` Anand Moon
[not found] ` <CGME20170929113314eucas1p2742039d35eb39f6d4749fe09988373d9@eucas1p2.samsung.com>
2017-09-29 11:33 ` [PATCH 3/3] ARM: exynos_defconfig: Enable UAS support for " Marek Szyprowski
2017-09-30 17:31 ` Krzysztof Kozlowski
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