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From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH 07/14] spi: dw: Mask all possible interrupts
Date: Wed, 3 Feb 2021 23:51:05 -0500	[thread overview]
Message-ID: <ff11a955-851c-6d8c-85b8-ddb055874f37@gmail.com> (raw)
In-Reply-To: <20210201003436.1180667-8-seanga2@gmail.com>

On 1/31/21 7:34 PM, Sean Anderson wrote:
> DWC_SPI has more than 8 interrupts. Write to the whole IMR to mask
> everything.
> 
> Signed-off-by: Sean Anderson <seanga2@gmail.com>
> ---
> 
>   drivers/spi/designware_spi.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
> index 519d6e32bd..29ec1503fd 100644
> --- a/drivers/spi/designware_spi.c
> +++ b/drivers/spi/designware_spi.c
> @@ -252,7 +252,7 @@ static int dw_spi_of_to_plat(struct udevice *bus)
>   static void spi_hw_init(struct udevice *bus, struct dw_spi_priv *priv)
>   {
>   	dw_write(priv, DW_SPI_SSIENR, 0);
> -	dw_write(priv, DW_SPI_IMR, 0xff);
> +	dw_write(priv, DW_SPI_IMR, 0xFFFFFFFF);

After further reviewing the datasheet, it turns out that interrupts are
masked by 0s in this register (and enabled by 1s). I'm not really sure
what this line was originally trying to accomplish. We never enable
interrupts globally, and we can just read from RISR if we need to get an
interrupt. Perhaps this patch should just remove this line?

--Sean

>   	dw_write(priv, DW_SPI_SSIENR, 1);
>   
>   	/*
> 

  reply	other threads:[~2021-02-04  4:51 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-01  0:34 [PATCH 00/14] spi: dw: Add support for DUAL/QUAD/OCTAL modes Sean Anderson
2021-02-01  0:34 ` [PATCH 01/14] cmd: sf: Display errno on erase failure Sean Anderson
2021-02-01  5:06   ` Bin Meng
2021-02-01 12:51   ` Pratyush Yadav
2021-02-01  0:34 ` [PATCH 02/14] cmd: sf: Print error on test failure Sean Anderson
2021-02-01  5:06   ` Bin Meng
2021-02-01 12:54   ` Pratyush Yadav
2021-02-01  0:34 ` [PATCH 03/14] mtd: spi-nor-core: Fix typo in documentation Sean Anderson
2021-02-01  5:06   ` Bin Meng
2021-02-01 12:23   ` Pratyush Yadav
2021-02-01  0:34 ` [PATCH 04/14] mtd: spi-mem: Export spi_mem_default_supports_op Sean Anderson
2021-02-01  5:06   ` Bin Meng
2021-02-01 12:07   ` Pratyush Yadav
2021-02-01 15:15     ` Sean Anderson
2021-02-01  0:34 ` [PATCH 05/14] spi: spi-mem: Add debug message for spi-mem ops Sean Anderson
2021-02-01  5:06   ` Bin Meng
2021-02-01 12:18   ` Pratyush Yadav
2021-02-01 15:33     ` Sean Anderson
2021-02-01 16:34       ` Pratyush Yadav
2021-02-01  0:34 ` [PATCH 06/14] spi: dw: Log status register on timeout Sean Anderson
2021-02-01  0:34 ` [PATCH 07/14] spi: dw: Mask all possible interrupts Sean Anderson
2021-02-04  4:51   ` Sean Anderson [this message]
2021-02-01  0:34 ` [PATCH 08/14] spi: dw: Switch to capabilities Sean Anderson
2021-02-01  0:34 ` [PATCH 09/14] spi: dw: Rewrite poll_transfer logic Sean Anderson
2021-02-01  0:34 ` [PATCH 10/14] spi: dw: Add DUAL/QUAD/OCTAL caps Sean Anderson
2021-02-01 18:00   ` Sean Anderson
2021-02-01  0:34 ` [PATCH 11/14] spi: dw: Add registers necessary for DUAL/QUAD/OCTAL Sean Anderson
2021-02-01  0:34 ` [PATCH 12/14] spi: dw: Support DUAL/QUAD/OCTAL Sean Anderson
2021-02-01  0:34 ` [PATCH 13/14] spi: dw: Support clock stretching Sean Anderson
2021-02-01  0:34 ` [PATCH 14/14] riscv: k210: Enable QSPI for spi3 Sean Anderson
2021-02-01  5:16   ` Bin Meng
2021-02-04  2:32   ` Leo Liang

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