* oops in ioapic_write_entry
@ 2010-08-02 5:28 Dave Airlie
2010-08-02 6:49 ` Yinghai Lu
0 siblings, 1 reply; 31+ messages in thread
From: Dave Airlie @ 2010-08-02 5:28 UTC (permalink / raw)
To: LKML, Eric W. Biederman, Ingo Molnar
[-- Attachment #1: Type: text/plain, Size: 2757 bytes --]
Hey guys,
Booted 2.6.35 + my drm-next tree this morning, happened with -rc6. Now
I changed graphics cards this morning, and my 2.6.32 based enterprise
kernels are booting fine, and I haven't had much time to bisect this,
but I thought it might be interesting to you guys. I've booted my
kernel on other machines with no problems which is why I suspect its
not a drm-next issue and is a real 2.6.35 issue.
I've attached the full dmesg up to the oops + lspci -vvv from this machine.
Let me know if you want any other info, and I'll try and get some
bisecting going on in the meanwhile.
Dave.
Now I can't swear this isn't something in my drm-next tree, but
[drm] radeon kernel modesetting enabled.
BUG: unable to handle kernel paging request at ffff9000
IP: [<c0417511>] ioapic_write_entry+0x41/0x7a
*pdpt = 00000000008ca001 *pde = 00000000008cb067 *pte = 0000000000000000
Oops: 0002 [#1] SMP
last sysfs file: /sys/devices/virtual/tty/tty9/uevent
Modules linked in: radeon(+) ttm drm_kms_helper drm hwmon i2c_algo_bit i2c_core
Pid: 607, comm: modprobe Not tainted 2.6.35+ #34 0UY253/Dell XPS710
EIP: 0060:[<c0417511>] EFLAGS: 00010086 CPU: 0
EIP is at ioapic_write_entry+0x41/0x7a
EAX: 00000296 EBX: 00000001 ECX: ffff9000 EDX: 03000000
ESI: 00000010 EDI: 00006000 EBP: 00000031 ESP: f77e6dfc
DS: 007b ES: 007b FS: 00d8 GS: 0033 SS: 0068
Process modprobe (pid: 607, ti=f77e6000 task=f77839c0 task.ti=f77e6000)
Stack:
0001a969 c08d427c 00000010 c07a6f7e 00000001 c0417857 0001a969 03000000
<0> 00000001 00000010 0001a969 03000000 00000001 00000010 c0827380 ffffffff
<0> c041793c c0827380 00000001 00000001 00000001 00000010 00000001 f7590000
Call Trace:
[<c0417857>] ? setup_IO_APIC_irq+0x270/0x27a
[<c041793c>] ? io_apic_set_pci_routing+0xdb/0xea
[<c0627d39>] ? pirq_enable_irq+0x16d/0x208
[<c0628337>] ? pcibios_enable_device+0x1f/0x24
[<c056a96c>] ? do_pci_enable_device+0x1f/0x34
[<c056a9c7>] ? __pci_enable_device_flags+0x46/0x56
[<f8705a72>] ? drm_get_pci_dev+0x8e/0x220 [drm]
[<c056abd7>] ? local_pci_probe+0xb/0xc
[<c056ad6a>] ? pci_device_probe+0x41/0x63
[<c05b2015>] ? driver_probe_device+0x7e/0xf6
[<c05b20cd>] ? __driver_attach+0x40/0x5b
[<c05b1a33>] ? bus_for_each_dev+0x37/0x60
[<c05b1ef2>] ? driver_attach+0x11/0x13
[<c05b208d>] ? __driver_attach+0x0/0x5b
[<c05b1507>] ? bus_add_driver+0xcd/0x201
[<c05b22d8>] ? driver_register+0x7a/0xdb
[<c056af1d>] ? __pci_register_driver+0x33/0x89
[<f9bc5000>] ? radeon_init+0x0/0xa9 [radeon]
[<c0401045>] ? do_one_initcall+0x44/0x120
[<c045566b>] ? sys_init_module+0x77/0x194
[<c04025cc>] ? sysenter_do_call+0x12/0x22
Code: 1c 89 04 24 b8 50 41 8d c0 e8 44 3a 29 00 8b 0c dd 44 35 8d c0
89 fa 8d 7b 05 c1 e7 0c 81 e1 ff 0f 00 00 03 0d 70 bd 83 c0 29 f9 <89>
29 89 51 10 8b 14 dd
[-- Attachment #2: oops_irq_setup --]
[-- Type: application/octet-stream, Size: 18733 bytes --]
üLinux version 2.6.35+ (airlied@clockmaker-el6) (gcc version 4.4.4 20100726 (Red Hat 4.4.4-13) (GCC) ) #34 SMP Mon Aug 2 14:29:28 EST 2010
BIOS-provided physical RAM map:
BIOS-e820: 0000000000000000 - 000000000009fc00 (usable)
BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 000000007fdbcc00 (usable)
BIOS-e820: 000000007fdbcc00 - 000000007fdbec00 (ACPI NVS)
BIOS-e820: 000000007fdbec00 - 000000007fdc0c00 (ACPI data)
BIOS-e820: 000000007fdc0c00 - 0000000080000000 (reserved)
BIOS-e820: 00000000e0000000 - 00000000f0000000 (reserved)
BIOS-e820: 00000000fec00000 - 00000000fed01000 (reserved)
BIOS-e820: 00000000fee00000 - 00000000fef00000 (reserved)
BIOS-e820: 00000000ffb00000 - 0000000100000000 (reserved)
NX (Execute Disable) protection: active
DMI 2.3 present.
last_pfn = 0x7fdbc max_arch_pfn = 0x1000000
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
Scanning 1 areas for low memory corruption
modified physical RAM map:
modified: 0000000000000000 - 0000000000001000 (reserved)
modified: 0000000000001000 - 0000000000002000 (usable)
modified: 0000000000002000 - 0000000000010000 (reserved)
modified: 0000000000010000 - 000000000009fc00 (usable)
modified: 00000000000f0000 - 0000000000100000 (reserved)
modified: 0000000000100000 - 000000007fdbcc00 (usable)
modified: 000000007fdbcc00 - 000000007fdbec00 (ACPI NVS)
modified: 000000007fdbec00 - 000000007fdc0c00 (ACPI data)
modified: 000000007fdc0c00 - 0000000080000000 (reserved)
modified: 00000000e0000000 - 00000000f0000000 (reserved)
modified: 00000000fec00000 - 00000000fed01000 (reserved)
modified: 00000000fee00000 - 00000000fef00000 (reserved)
modified: 00000000ffb00000 - 0000000100000000 (reserved)
found SMP MP-table at [c00fe710] fe710
init_memory_mapping: 0000000000000000-00000000379fe000
RAMDISK: 37181000 - 37ff0000
Allocated new RAMDISK: 00955000 - 017c3566
Move RAMDISK from 0000000037181000 - 0000000037fef565 to 00955000 - 017c3565
1155MB HIGHMEM available.
889MB LOWMEM available.
mapped low ram: 0 - 379fe000
low ram: 0 - 379fe000
Zone PFN ranges:
DMA 0x00000001 -> 0x00001000
Normal 0x00001000 -> 0x000379fe
HighMem 0x000379fe -> 0x0007fdbc
Movable zone start PFN for each node
early_node_map[3] active PFN ranges
0: 0x00000001 -> 0x00000002
0: 0x00000010 -> 0x0000009f
0: 0x00000100 -> 0x0007fdbc
Using APIC driver default
Intel MultiProcessor Specification v1.4
Virtual Wire compatibility mode.
MPTABLE: OEM ID: DELL
MPTABLE: Product ID: Dell XPS710
MPTABLE: APIC at: 0xFEE00000
Processor #0 (Bootup-CPU)
Processor #1
I/O APIC #8 Version 17 at 0xFEC00000.
IOAPIC[0]: apic_id 8, version 17, address 0xfec00000, GSI 0-23
Processors: 2
SMP: Allowing 2 CPUs, 0 hotplug CPUs
Allocating PCI resources starting at 80000000 (gap: 80000000:60000000)
setup_percpu: NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:2 nr_node_ids:1
PERCPU: Embedded 16 pages/cpu @c2800000 s41856 r0 d23680 u1048576
pcpu-alloc: s41856 r0 d23680 u1048576 alloc=1*2097152
pcpu-alloc: [0] 0 1
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 519504
Kernel command line: ro root=/dev/mapper/VolGroup00-RHEL500 rd_LVM_LV=VolGroup00/RHEL500 rd_NO_LUKS rd_NO_MD rd_NO_DM LANG=en_US.UTF-8 SYSFONT=latarcyrheb-sun16 KEYBOARDTYPE=pc KEYTABLE=us console=ttyS0,115200
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Initializing CPU#0
Subtract (45 early reservations)
#1 [0000001000 - 0000002000] EX TRAMPOLINE
#2 [0000400000 - 000094ca1c] TEXT DATA BSS
#3 [000094d000 - 00009541c8] BRK
#4 [00000fe720 - 0000100000] BIOS reserved
#5 [00000fe710 - 00000fe720] MP-table mpf
#6 [000009fc00 - 00000f0000] BIOS reserved
#7 [00000f024c - 00000fe710] BIOS reserved
#8 [00000f0000 - 00000f024c] MP-table mpc
#9 [0000010000 - 0000011000] TRAMPOLINE
#10 [0000011000 - 0000012000] PGTABLE
#11 [0000955000 - 00017c4000] NEW RAMDISK
#12 [00017c4000 - 00017c5000] BOOTMEM
#13 [00017c5000 - 00027c5000] BOOTMEM
#14 [00027c5000 - 00027c5004] BOOTMEM
#15 [00027c5040 - 00027c5100] BOOTMEM
#16 [00027c5100 - 00027c51a4] BOOTMEM
#17 [00027c51c0 - 00027c81c0] BOOTMEM
#18 [00027c81c0 - 00027c829c] BOOTMEM
#19 [00027c82c0 - 00027ce2c0] BOOTMEM
#20 [00027ce2c0 - 00027ce2ef] BOOTMEM
#21 [00027ce300 - 00027ce4d4] BOOTMEM
#22 [00027ce500 - 00027ce540] BOOTMEM
#23 [00027ce540 - 00027ce580] BOOTMEM
#24 [00027ce580 - 00027ce5c0] BOOTMEM
#25 [00027ce5c0 - 00027ce600] BOOTMEM
#26 [00027ce600 - 00027ce640] BOOTMEM
#27 [00027ce640 - 00027ce680] BOOTMEM
#28 [00027ce680 - 00027ce6c0] BOOTMEM
#29 [00027ce6c0 - 00027ce700] BOOTMEM
#30 [00027ce700 - 00027ce740] BOOTMEM
#31 [00027ce740 - 00027ce780] BOOTMEM
#32 [00027ce780 - 00027ce83e] BOOTMEM
#33 [00027ce840 - 00027ce8fe] BOOTMEM
#34 [0002800000 - 0002810000] BOOTMEM
#35 [0002900000 - 0002910000] BOOTMEM
#36 [00027d0900 - 00027d0904] BOOTMEM
#37 [00027d0940 - 00027d0944] BOOTMEM
#38 [00027d0980 - 00027d0988] BOOTMEM
#39 [00027d09c0 - 00027d09c8] BOOTMEM
#40 [00027d0a00 - 00027d0aa0] BOOTMEM
#41 [00027d0ac0 - 00027d0b08] BOOTMEM
#42 [00027d0b40 - 00027d4b40] BOOTMEM
#43 [0002810000 - 0002890000] BOOTMEM
#44 [0002890000 - 00028d0000] BOOTMEM
Initializing HighMem for node 0 (000379fe:0007fdbc)
Memory: 2056788k/2094832k available (2753k kernel code, 37596k reserved, 1761k data, 360k init, 1183480k highmem)
virtual kernel memory layout:
fixmap : 0xffe70000 - 0xfffff000 (1596 kB)
pkmap : 0xffa00000 - 0xffc00000 (2048 kB)
vmalloc : 0xf81fe000 - 0xff9fe000 ( 120 MB)
lowmem : 0xc0000000 - 0xf79fe000 ( 889 MB)
.init : 0xc0869000 - 0xc08c3000 ( 360 kB)
.data : 0xc06b05fd - 0xc0868ac8 (1761 kB)
.text : 0xc0400000 - 0xc06b05fd (2753 kB)
Checking if this processor honours the WP bit even in supervisor mode...Ok.
SLUB: Genslabs=13, HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
Hierarchical RCU implementation.
RCU-based detection of stalled CPUs is disabled.
Verbose stalled-CPUs detection is disabled.
NR_IRQS:512
Console: colour VGA+ 80x25
console [ttyS0] enabled
Fast TSC calibration using PIT
Detected 2660.232 MHz processor.
Calibrating delay loop (skipped), value calculated using timer frequency.. 5320.46 BogoMIPS (lpj=2660232)
pid_max: default: 32768 minimum: 301
Security Framework initialized
SELinux: Initializing.
Mount-cache hash table entries: 512
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
mce: CPU supports 6 MCE banks
CPU0: Thermal monitoring enabled (TM2)
using mwait in idle threads.
Performance Events: PEBS fmt0-, Core2 events, Intel PMU driver.
PEBS disabled due to CPU errata.
... version: 2
... bit width: 40
... generic registers: 2
... value mask: 000000ffffffffff
... max period: 000000007fffffff
... fixed-purpose events: 3
... event mask: 0000000700000003
Enabling APIC mode: Flat. Using 1 I/O APICs
ExtINT not setup in hardware but reported by MP table
..TIMER: vector=0x30 apic1=0 pin1=0 apic2=0 pin2=2
..MP-BIOS bug: 8254 timer not connected to IO-APIC
...trying to set up timer (IRQ0) through the 8259A ...
..... (found apic 0 pin 2) ...
....... works.
CPU0: Intel(R) Core(TM)2 CPU 6700 @ 2.66GHz stepping 06
Booting Node 0, Processors #1 Ok.
Initializing CPU#1
Brought up 2 CPUs
Total of 2 processors activated (10639.59 BogoMIPS).
khelper used greatest stack depth: 3252 bytes left
Dell XPS710 series board detected. Selecting BIOS-method for reboots.
NET: Registered protocol family 16
PCI: PCI BIOS revision 2.10 entry at 0xfbc45, last bus=9
PCI: Using configuration type 1 for base access
khelper used greatest stack depth: 3216 bytes left
bio: create slab <bio-0> at 0
vgaarb: loaded
khelper used greatest stack depth: 3148 bytes left
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI: Probing PCI hardware
HPET not enabled in BIOS. You might try hpet=force boot option
pci 0000:00:02.0: PCI bridge to [bus 01-04]
pci 0000:01:00.0: PCI bridge to [bus 02-04]
pci 0000:02:00.0: PCI bridge to [bus 03-03]
pci 0000:02:0c.0: PCI bridge to [bus 04-04]
pci 0000:00:04.0: PCI bridge to [bus 05-05]
pci 0000:06:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'
pci 0000:00:05.0: PCI bridge to [bus 06-06]
pci 0000:00:0f.0: PCI bridge to [bus 07-07] (subtractive decode)
pci 0000:00:13.0: PCI bridge to [bus 08-08]
pci 0000:00:18.0: PCI bridge to [bus 09-09]
vgaarb: device added: PCI:0000:04:00.0,decodes=io+mem,owns=io+mem,locks=none
pci 0000:00:0a.0: default IRQ router [10de:0360]
NetLabel: Initializing
NetLabel: domain hash size = 128
NetLabel: protocols = UNLABELED CIPSOv4
NetLabel: unlabeled traffic allowed by default
Switching to clocksource tsc
pci 0000:02:00.0: PCI bridge to [bus 03-03]
pci 0000:02:00.0: bridge window [io 0xd000-0xdfff]
pci 0000:02:00.0: bridge window [mem 0xdd000000-0xddffffff]
pci 0000:02:00.0: bridge window [mem 0xb0000000-0xbfffffff 64bit pref]
pci 0000:02:0c.0: PCI bridge to [bus 04-04]
pci 0000:02:0c.0: bridge window [io 0xc000-0xcfff]
pci 0000:02:0c.0: bridge window [mem 0xdc000000-0xdcffffff]
pci 0000:02:0c.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:01:00.0: PCI bridge to [bus 02-04]
pci 0000:01:00.0: bridge window [io 0xc000-0xdfff]
pci 0000:01:00.0: bridge window [mem 0xdc000000-0xddffffff]
pci 0000:01:00.0: bridge window [mem 0xb0000000-0xcfffffff 64bit pref]
pci 0000:00:02.0: PCI bridge to [bus 01-04]
pci 0000:00:02.0: bridge window [io 0xc000-0xdfff]
pci 0000:00:02.0: bridge window [mem 0xdc000000-0xdeffffff]
pci 0000:00:02.0: bridge window [mem 0xb0000000-0xcfffffff 64bit pref]
pci 0000:00:04.0: PCI bridge to [bus 05-05]
pci 0000:00:04.0: bridge window [io disabled]
pci 0000:00:04.0: bridge window [mem disabled]
pci 0000:00:04.0: bridge window [mem pref disabled]
pci 0000:00:05.0: PCI bridge to [bus 06-06]
pci 0000:00:05.0: bridge window [io disabled]
pci 0000:00:05.0: bridge window [mem 0xdb000000-0xdbffffff]
pci 0000:00:05.0: bridge window [mem pref disabled]
pci 0000:00:0f.0: PCI bridge to [bus 07-07]
pci 0000:00:0f.0: bridge window [io disabled]
pci 0000:00:0f.0: bridge window [mem 0xda000000-0xdaffffff]
pci 0000:00:0f.0: bridge window [mem pref disabled]
pci 0000:00:13.0: PCI bridge to [bus 08-08]
pci 0000:00:13.0: bridge window [io disabled]
pci 0000:00:13.0: bridge window [mem disabled]
pci 0000:00:13.0: bridge window [mem pref disabled]
pci 0000:00:18.0: PCI bridge to [bus 09-09]
pci 0000:00:18.0: bridge window [io disabled]
pci 0000:00:18.0: bridge window [mem disabled]
pci 0000:00:18.0: bridge window [mem pref disabled]
pci 0000:01:00.0: PCI->APIC IRQ transform: INT A -> IRQ 35
pci 0000:02:00.0: using bridge 0000:01:00.0 INT A to get IRQ 35
pci 0000:02:00.0: PCI->APIC IRQ transform: INT A -> IRQ 35
pci 0000:02:0c.0: using bridge 0000:01:00.0 INT A to get IRQ 35
pci 0000:02:0c.0: PCI->APIC IRQ transform: INT A -> IRQ 35
NET: Registered protocol family 2
IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
TCP bind hash table entries: 65536 (order: 7, 524288 bytes)
TCP: Hash tables configured (established 131072 bind 65536)
TCP reno registered
UDP hash table entries: 512 (order: 2, 16384 bytes)
UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
NET: Registered protocol family 1
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 14780k freed
platform rtc_cmos: registered platform RTC device (no PNP device found)
Scanning for low memory corruption every 60 seconds
audit: initializing netlink socket (disabled)
type=2000 audit(1280725307.021:1): initialized
highmem bounce pool size: 64 pages
HugeTLB registered 2 MB page size, pre-allocated 0 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
msgmni has been set to 1734
cryptomgr_test used greatest stack depth: 2936 bytes left
alg: No test for stdrng (krng)
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
isapnp: Scanning for PnP cards...
isapnp: No Plug & Play device found
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
ÿserial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
brd: module loaded
sata_nv 0000:00:0e.0: PCI->APIC IRQ transform: INT A -> IRQ 35
sata_nv 0000:00:0e.0: Using SWNCQ mode
scsi0 : sata_nv
scsi1 : sata_nv
ata1: SATA max UDMA/133 cmd 0xfe00 ctl 0xfe10 bmdma 0xfec0 irq 35
ata2: SATA max UDMA/133 cmd 0xfe20 ctl 0xfe30 bmdma 0xfec8 irq 35
sata_nv 0000:00:0e.1: PCI->APIC IRQ transform: INT B -> IRQ 35
sata_nv 0000:00:0e.1: Using SWNCQ mode
scsi2 : sata_nv
scsi3 : sata_nv
ata3: SATA max UDMA/133 cmd 0xfe40 ctl 0xfe50 bmdma 0xfed0 irq 35
ata4: SATA max UDMA/133 cmd 0xfe60 ctl 0xfe70 bmdma 0xfed8 irq 35
sata_nv 0000:00:0e.2: PCI->APIC IRQ transform: INT C -> IRQ 35
sata_nv 0000:00:0e.2: Using SWNCQ mode
scsi4 : sata_nv
scsi5 : sata_nv
ata5: SATA max UDMA/133 cmd 0xfe80 ctl 0xfe90 bmdma 0xfef0 irq 35
ata6: SATA max UDMA/133 cmd 0xfea0 ctl 0xfeb0 bmdma 0xfef8 irq 35
PNP: No PS/2 controller found. Probing ports directly.
serio: i8042 KBD port at 0x60,0x64 irq 1
serio: i8042 AUX port at 0x60,0x64 irq 12
mice: PS/2 mouse device common for all mice
device-mapper: ioctl: 4.17.0-ioctl (2010-03-05) initialised: dm-devel@redhat.com
cpuidle: using governor ladder
cpuidle: using governor menu
usbcore: registered new interface driver hiddev
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
TCP cubic registered
Initializing XFRM netlink socket
NET: Registered protocol family 17
Using IPI No-Shortcut mode
registered taskstats version 1
/ssd/git/drm-core-next/drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
ata5: SATA link down (SStatus 0 SControl 300)
ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata3: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
ata1.00: ATA-8: SAMSUNG HD321KJ, CP100-11, max UDMA7
ata1.00: 625142448 sectors, multi 8: LBA48 NCQ (depth 31/32)
ata3.00: ATAPI: HL-DT-STDVD-ROM GDRH20N, 0D04, max UDMA/100
ata1.00: configured for UDMA/133
scsi 0:0:0:0: Direct-Access ATA SAMSUNG HD321KJ CP10 PQ: 0 ANSI: 5
ata3.00: configured for UDMA/100
ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata2.00: ATA-7: INTEL SSDSA2M080G2GN, 2CV102HA, max UDMA/133
ata2.00: 156301488 sectors, multi 1: LBA48 NCQ (depth 31/32)
ata2.00: configured for UDMA/133
scsi 1:0:0:0: Direct-Access ATA INTEL SSDSA2M080 2CV1 PQ: 0 ANSI: 5
scsi 2:0:0:0: CD-ROM HL-DT-ST DVD-ROM GDRH20N 0D04 PQ: 0 ANSI: 5
ata4: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
ata4.00: ATAPI: PBDS DVD+/-RW DH-16W1S, 2D14, max UDMA/100
ata4.00: configured for UDMA/100
scsi 3:0:0:0: CD-ROM PBDS DVD+-RW DH-16W1S 2D14 PQ: 0 ANSI: 5
ata6: SATA link down (SStatus 0 SControl 300)
Freeing unused kernel memory: 360k freed
Write protecting the kernel text: 2756k
Write protecting the kernel read-only data: 1476k
dracut: dracut-004-29.el6
dracut: rd_NO_LUKS: removing cryptoluks activation
udev: starting version 147
[drm] Initialized drm 1.1.0 20060810
[drm] radeon defaulting to kernel modesetting.
[drm] radeon kernel modesetting enabled.
BUG: unable to handle kernel paging request at ffff9000
IP: [<c0417511>] ioapic_write_entry+0x41/0x7a
*pdpt = 00000000008ca001 *pde = 00000000008cb067 *pte = 0000000000000000
Oops: 0002 [#1] SMP
last sysfs file: /sys/devices/virtual/tty/tty9/uevent
Modules linked in: radeon(+) ttm drm_kms_helper drm hwmon i2c_algo_bit i2c_core
Pid: 607, comm: modprobe Not tainted 2.6.35+ #34 0UY253/Dell XPS710
EIP: 0060:[<c0417511>] EFLAGS: 00010086 CPU: 0
EIP is at ioapic_write_entry+0x41/0x7a
EAX: 00000296 EBX: 00000001 ECX: ffff9000 EDX: 03000000
ESI: 00000010 EDI: 00006000 EBP: 00000031 ESP: f77e6dfc
DS: 007b ES: 007b FS: 00d8 GS: 0033 SS: 0068
Process modprobe (pid: 607, ti=f77e6000 task=f77839c0 task.ti=f77e6000)
Stack:
0001a969 c08d427c 00000010 c07a6f7e 00000001 c0417857 0001a969 03000000
<0> 00000001 00000010 0001a969 03000000 00000001 00000010 c0827380 ffffffff
<0> c041793c c0827380 00000001 00000001 00000001 00000010 00000001 f7590000
Call Trace:
[<c0417857>] ? setup_IO_APIC_irq+0x270/0x27a
[<c041793c>] ? io_apic_set_pci_routing+0xdb/0xea
[<c0627d39>] ? pirq_enable_irq+0x16d/0x208
[<c0628337>] ? pcibios_enable_device+0x1f/0x24
[<c056a96c>] ? do_pci_enable_device+0x1f/0x34
[<c056a9c7>] ? __pci_enable_device_flags+0x46/0x56
[<f8705a72>] ? drm_get_pci_dev+0x8e/0x220 [drm]
[<c056abd7>] ? local_pci_probe+0xb/0xc
[<c056ad6a>] ? pci_device_probe+0x41/0x63
[<c05b2015>] ? driver_probe_device+0x7e/0xf6
[<c05b20cd>] ? __driver_attach+0x40/0x5b
[<c05b1a33>] ? bus_for_each_dev+0x37/0x60
[<c05b1ef2>] ? driver_attach+0x11/0x13
[<c05b208d>] ? __driver_attach+0x0/0x5b
[<c05b1507>] ? bus_add_driver+0xcd/0x201
[<c05b22d8>] ? driver_register+0x7a/0xdb
[<c056af1d>] ? __pci_register_driver+0x33/0x89
[<f9bc5000>] ? radeon_init+0x0/0xa9 [radeon]
[<c0401045>] ? do_one_initcall+0x44/0x120
[<c045566b>] ? sys_init_module+0x77/0x194
[<c04025cc>] ? sysenter_do_call+0x12/0x22
Code: 1c 89 04 24 b8 50 41 8d c0 e8 44 3a 29 00 8b 0c dd 44 35 8d c0 89 fa 8d 7b 05 c1 e7 0c 81 e1 ff 0f 00 00 03 0d 70 bd 83 c0 29 f9 <89> 29 89 51 10 8b 14 dd 44 35 8d c0 8d 74 36 10 8b 0c 24 81 e2
EIP: [<c0417511>] ioapic_write_entry+0x41/0x7a SS:ESP 0068:f77e6dfc
CR2: 00000000ffff9000
---[ end trace 534e27c5cbe968e4 ]---
modprobe used greatest stack depth: 2380 bytes left
udevd-work[605]: '/sbin/modprobe -b pci:v00001002d0000950Fsv00001028sd00002542bc03sc00i00' unexpected exit with status 0x0009
dracut: Starting plymouth daemon
GClocksource tsc unstable (delta = 222472196 ns)
Switching to clocksource jiffies
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
G
[-- Attachment #3: lspci --]
[-- Type: application/octet-stream, Size: 43829 bytes --]
00:00.0 Host bridge: nVidia Corporation Device 0071 (rev c1)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [40] HyperTransport: Host or Secondary Interface
Command: WarmRst+ DblEnd-
Link Control: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0
Link Config: MLWI=8bit MLWO=8bit LWI=8bit LWO=8bit
Revision ID: 0.16
00:00.1 RAM memory: nVidia Corporation Device 007f (rev a1)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:00.2 RAM memory: nVidia Corporation Device 0075 (rev a1)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:00.3 RAM memory: nVidia Corporation Device 006f (rev a1)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:00.4 RAM memory: nVidia Corporation Device 00b4 (rev a1)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
00:01.0 RAM memory: nVidia Corporation Device 0076 (rev a1)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:01.1 RAM memory: nVidia Corporation Device 0078 (rev a1)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:01.2 RAM memory: nVidia Corporation Device 0079 (rev a1)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:01.3 RAM memory: nVidia Corporation Device 007a (rev a1)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:01.4 RAM memory: nVidia Corporation Device 007b (rev a1)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:01.5 RAM memory: nVidia Corporation Device 007c (rev a1)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:01.6 RAM memory: nVidia Corporation Device 007d (rev a1)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00:02.0 PCI bridge: nVidia Corporation Device 007e (rev a2) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=01, subordinate=04, sec-latency=0
I/O behind bridge: 0000c000-0000dfff
Memory behind bridge: dc000000-deffffff
Prefetchable memory behind bridge: 00000000b0000000-00000000cfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [48] MSI: Enable+ Count=1/2 Maskable- 64bit+
Address: 00000000fee0300c Data: 4151
Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <4us
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s, Latency L0 <1us, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 4, PowerLimit 150.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [100] Virtual Channel <?>
Kernel driver in use: pcieport
00:04.0 PCI bridge: nVidia Corporation Device 007e (rev a2) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=05, subordinate=05, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [48] MSI: Enable+ Count=1/2 Maskable- 64bit+
Address: 00000000fee0300c Data: 4159
Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <4us
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s, Latency L0 <1us, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 1, PowerLimit 25.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
Changed: MRL- PresDet- LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [100] Virtual Channel <?>
Kernel driver in use: pcieport
00:05.0 PCI bridge: nVidia Corporation Device 007e (rev a2) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=06, subordinate=06, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: db000000-dbffffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [48] MSI: Enable+ Count=1/2 Maskable- 64bit+
Address: 00000000fee0300c Data: 4161
Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <4us
ExtTag- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s, Latency L0 <256ns, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 0, PowerLimit 25.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [100] Virtual Channel <?>
Kernel driver in use: pcieport
00:09.0 RAM memory: nVidia Corporation MCP55 Memory Controller (rev a1)
Subsystem: Dell Device 0000
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [44] HyperTransport: Slave or Primary Interface
Command: BaseUnitID=9 UnitCnt=15 MastHost- DefDir- DUL-
Link Control 0: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn+ LSEn+ ExtCTL- 64b-
Link Config 0: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn-
Link Control 1: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b-
Link Config 1: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn-
Revision ID: 1.03
Link Frequency 0: 800MHz
Link Error 0: <Prot- <Ovfl- <EOC- CTLTm-
Link Frequency Capability 0: 200MHz+ 300MHz+ 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend-
Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD-
Link Frequency 1: 200MHz
Link Error 1: <Prot- <Ovfl- <EOC- CTLTm-
Link Frequency Capability 1: 200MHz- 300MHz- 400MHz- 500MHz- 600MHz- 800MHz- 1.0GHz- 1.2GHz- 1.4GHz- 1.6GHz- Vend-
Error Handling: PFlE+ OFlE+ PFE- OFE- EOCFE- RFE- CRCFE- SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE-
Prefetchable memory behind bridge Upper: 00-00
Bus Number: 00
Capabilities: [e0] #00 [fee0]
00:0a.0 ISA bridge: nVidia Corporation MCP55 LPC Bridge (rev a2)
Subsystem: Dell Device 0207
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 2: I/O ports at 4f00 [size=256]
00:0a.1 SMBus: nVidia Corporation MCP55 SMBus (rev a2)
Subsystem: Dell Device 0207
Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 9
Region 0: I/O ports at 4c00 [size=64]
Region 4: I/O ports at 5000 [size=64]
Region 5: I/O ports at 5100 [size=64]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: nForce2_smbus
Kernel modules: i2c-nforce2
00:0b.0 USB Controller: nVidia Corporation MCP55 USB Controller (rev a1) (prog-if 10 [OHCI])
Subsystem: Dell Device 0207
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0 (750ns min, 250ns max)
Interrupt: pin A routed to IRQ 22
Region 0: Memory at dfff8000 (32-bit, non-prefetchable) [size=4K]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: ohci_hcd
00:0b.1 USB Controller: nVidia Corporation MCP55 USB Controller (rev a2) (prog-if 20 [EHCI])
Subsystem: Dell Device 0207
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0 (750ns min, 250ns max)
Interrupt: pin B routed to IRQ 23
Region 0: Memory at dfff7f00 (32-bit, non-prefetchable) [size=256]
Capabilities: [44] Debug port: BAR=1 offset=0098
Capabilities: [80] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: ehci_hcd
00:0d.0 IDE interface: nVidia Corporation MCP55 IDE (rev a1) (prog-if 8a [Master SecP PriP])
Subsystem: Dell Device 0207
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0 (750ns min, 250ns max)
Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8]
Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [size=1]
Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8]
Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [size=1]
Region 4: I/O ports at ecf0 [size=16]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pata_amd
Kernel modules: pata_amd
00:0e.0 RAID bus controller: nVidia Corporation MCP55 SATA Controller (rev a2) (prog-if 85)
Subsystem: Dell Device 0207
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0 (750ns min, 250ns max)
Interrupt: pin A routed to IRQ 21
Region 0: I/O ports at fe00 [size=8]
Region 1: I/O ports at fe10 [size=4]
Region 2: I/O ports at fe20 [size=8]
Region 3: I/O ports at fe30 [size=4]
Region 4: I/O ports at fec0 [size=16]
Region 5: Memory at dfff9000 (32-bit, non-prefetchable) [size=4K]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [b0] MSI: Enable- Count=1/4 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [cc] HyperTransport: MSI Mapping Enable- Fixed+
Kernel driver in use: sata_nv
Kernel modules: sata_nv
00:0e.1 RAID bus controller: nVidia Corporation MCP55 SATA Controller (rev a3) (prog-if 85)
Subsystem: Dell Device 0207
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0 (750ns min, 250ns max)
Interrupt: pin B routed to IRQ 20
Region 0: I/O ports at fe40 [size=8]
Region 1: I/O ports at fe50 [size=4]
Region 2: I/O ports at fe60 [size=8]
Region 3: I/O ports at fe70 [size=4]
Region 4: I/O ports at fed0 [size=16]
Region 5: Memory at dfffa000 (32-bit, non-prefetchable) [size=4K]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [b0] MSI: Enable- Count=1/4 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [cc] HyperTransport: MSI Mapping Enable- Fixed+
Kernel driver in use: sata_nv
Kernel modules: sata_nv
00:0e.2 RAID bus controller: nVidia Corporation MCP55 SATA Controller (rev a4) (prog-if 85)
Subsystem: Dell Device 0207
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0 (750ns min, 250ns max)
Interrupt: pin C routed to IRQ 23
Region 0: I/O ports at fe80 [size=8]
Region 1: I/O ports at fe90 [size=4]
Region 2: I/O ports at fea0 [size=8]
Region 3: I/O ports at feb0 [size=4]
Region 4: I/O ports at fef0 [size=16]
Region 5: Memory at dfffb000 (32-bit, non-prefetchable) [size=4K]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [b0] MSI: Enable- Count=1/4 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [cc] HyperTransport: MSI Mapping Enable- Fixed+
Kernel driver in use: sata_nv
Kernel modules: sata_nv
00:0f.0 PCI bridge: nVidia Corporation MCP55 PCI bridge (rev a2) (prog-if 01 [Subtractive decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Bus: primary=00, secondary=07, subordinate=07, sec-latency=64
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: da000000-daffffff
Prefetchable memory behind bridge: fff00000-000fffff
Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [b8] Subsystem: nVidia Corporation Device cb84
Capabilities: [8c] HyperTransport: MSI Mapping Enable- Fixed-
Mapping Address Base: 00000000fee00000
00:0f.1 Audio device: nVidia Corporation MCP55 High Definition Audio (rev a2)
Subsystem: Dell Device 0207
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0 (500ns min, 1250ns max)
Interrupt: pin B routed to IRQ 22
Region 0: Memory at dfffc000 (32-bit, non-prefetchable) [size=16K]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+
Address: 0000000000000000 Data: 0000
Masking: 00000000 Pending: 00000000
Capabilities: [6c] HyperTransport: MSI Mapping Enable- Fixed+
Kernel driver in use: HDA Intel
Kernel modules: snd-hda-intel
00:13.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=08, subordinate=08, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: nVidia Corporation Device 0000
Capabilities: [48] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable+ Count=1/2 Maskable- 64bit+
Address: 00000000fee0300c Data: 4169
Capabilities: [60] HyperTransport: MSI Mapping Enable- Fixed-
Mapping Address Base: 00000000fee00000
Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <4us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #5, Speed 2.5GT/s, Width x8, ASPM L0s L1, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 7, PowerLimit 25.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Off, PwrInd On, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
Changed: MRL- PresDet- LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [100] Virtual Channel <?>
Kernel driver in use: pcieport
00:18.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=09, subordinate=09, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Subsystem: nVidia Corporation Device 0000
Capabilities: [48] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable+ Count=1/2 Maskable- 64bit+
Address: 00000000fee0300c Data: 4171
Capabilities: [60] HyperTransport: MSI Mapping Enable- Fixed-
Mapping Address Base: 00000000fee00000
Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <4us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 2, PowerLimit 150.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Off, PwrInd On, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
Changed: MRL- PresDet- LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
Capabilities: [100] Virtual Channel <?>
Kernel driver in use: pcieport
01:00.0 PCI bridge: PLX Technology, Inc. PEX 8547 48-lane, 3-port PCI Express Switch (rev aa) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Region 0: Memory at defe0000 (32-bit, non-prefetchable) [size=128K]
Bus: primary=01, secondary=02, subordinate=04, sec-latency=0
I/O behind bridge: 0000c000-0000dfff
Memory behind bridge: dc000000-ddffffff
Prefetchable memory behind bridge: 00000000b0000000-00000000cfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [48] MSI: Enable+ Count=1/1 Maskable+ 64bit+
Address: 00000000fee0300c Data: 4179
Masking: 00000001 Pending: ffffffff
Capabilities: [68] Express (v1) Upstream Port, MSI 00
DevCap: MaxPayload 1024 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-SlotPowerLimit 0.000000W
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #8, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <2us, L1 <32us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
Capabilities: [90] Subsystem: PLX Technology, Inc. PEX 8547 48-lane, 3-port PCI Express Switch
Capabilities: [100] Device Serial Number aa-85-48-10-b5-00-0e-df
Capabilities: [fb4] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 1f, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [138] Power Budgeting <?>
Capabilities: [148] Virtual Channel <?>
Kernel driver in use: pcieport
02:00.0 PCI bridge: PLX Technology, Inc. PEX 8547 48-lane, 3-port PCI Express Switch (rev aa) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=02, secondary=03, subordinate=03, sec-latency=0
I/O behind bridge: 0000d000-0000dfff
Memory behind bridge: dd000000-ddffffff
Prefetchable memory behind bridge: 00000000b0000000-00000000bfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [48] MSI: Enable+ Count=1/1 Maskable+ 64bit+
Address: 00000000fee0300c Data: 4181
Masking: 00000001 Pending: ffffffff
Capabilities: [68] Express (v1) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 1024 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <2us, L1 <32us
ClockPM- Surprise+ LLActRep+ BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk- DLActive+ BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 0, PowerLimit 25.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Off, PwrInd Off, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
Capabilities: [90] Subsystem: PLX Technology, Inc. PEX 8547 48-lane, 3-port PCI Express Switch
Capabilities: [100] Device Serial Number aa-85-48-10-b5-00-0e-df
Capabilities: [fb4] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 1f, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [138] Power Budgeting <?>
Capabilities: [148] Virtual Channel <?>
Kernel driver in use: pcieport
02:0c.0 PCI bridge: PLX Technology, Inc. PEX 8547 48-lane, 3-port PCI Express Switch (rev aa) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=02, secondary=04, subordinate=04, sec-latency=0
I/O behind bridge: 0000c000-0000cfff
Memory behind bridge: dc000000-dcffffff
Prefetchable memory behind bridge: 00000000c0000000-00000000cfffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [48] MSI: Enable+ Count=1/1 Maskable+ 64bit+
Address: 00000000fee0300c Data: 4189
Masking: 00000001 Pending: ffffffff
Capabilities: [68] Express (v1) Downstream Port (Slot+), MSI 00
DevCap: MaxPayload 1024 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #12, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <2us, L1 <32us
ClockPM- Surprise+ LLActRep+ BwNot-
LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk- DLActive+ BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise-
Slot # 0, PowerLimit 25.000000; Interlock- NoCompl-
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Off, PwrInd Off, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState+
Capabilities: [90] Subsystem: PLX Technology, Inc. PEX 8547 48-lane, 3-port PCI Express Switch
Capabilities: [100] Device Serial Number aa-85-48-10-b5-00-0e-df
Capabilities: [fb4] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 1f, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [138] Power Budgeting <?>
Capabilities: [148] Virtual Channel <?>
Kernel driver in use: pcieport
03:00.0 Display controller: ATI Technologies Inc R680 [Radeon HD 3870 x2]
Subsystem: Dell Device 2042
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 32
Region 0: Memory at b0000000 (64-bit, prefetchable) [size=256M]
Region 2: Memory at ddef0000 (64-bit, non-prefetchable) [size=64K]
Region 4: I/O ports at dc00 [size=256]
Expansion ROM at ddf00000 [disabled] [size=128K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <64ns, L1 <1us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee0300c Data: 41a1
Capabilities: [100] Vendor Specific Information <?>
Kernel driver in use: radeon
Kernel modules: radeon
04:00.0 VGA compatible controller: ATI Technologies Inc R680 [Radeon HD 3870 x2] (prog-if 00 [VGA controller])
Subsystem: Dell Device 2542
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 33
Region 0: Memory at c0000000 (64-bit, prefetchable) [size=256M]
Region 2: Memory at dcef0000 (64-bit, non-prefetchable) [size=64K]
Region 4: I/O ports at cc00 [size=256]
Expansion ROM at dcf00000 [disabled] [size=128K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #12, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <64ns, L1 <1us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee0300c Data: 41a9
Capabilities: [100] Vendor Specific Information <?>
Kernel driver in use: radeon
Kernel modules: radeon
04:00.1 Audio device: ATI Technologies Inc Radeon HD 3870 Audio device
Subsystem: Dell Device aa18
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin B routed to IRQ 34
Region 0: Memory at dceec000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #12, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <64ns, L1 <1us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee0300c Data: 41d1
Capabilities: [100] Vendor Specific Information <?>
Kernel driver in use: HDA Intel
Kernel modules: snd-hda-intel
06:00.0 Ethernet controller: Broadcom Corporation NetXtreme BCM5751 Gigabit Ethernet PCI Express (rev 21)
Subsystem: Dell Device 0207
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 35
Region 0: Memory at dbff0000 (64-bit, non-prefetchable) [size=64K]
Expansion ROM at <ignored> [disabled]
Capabilities: [48] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-
Capabilities: [50] Vital Product Data
Product Name: Broadcom NetXtreme Gigabit Ethernet Controller
Read-only fields:
[PN] Part number: BCM95751
[EC] Engineering changes: 106679-15
[SN] Serial number: 0123456789
[MN] Manufacture ID: 31 34 65 34
[RV] Reserved: checksum bad, 28 byte(s) reserved
Read/write fields:
[YA] Asset tag: XYZ01234567
[RW] Read-write area: 107 byte(s) free
End
Capabilities: [58] MSI: Enable+ Count=1/8 Maskable- 64bit+
Address: 00000000fee0300c Data: 41d9
Capabilities: [d0] Express (v1) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE- FLReset-
DevCtl: Report errors: Correctable- Non-Fatal+ Fatal+ Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <4us, L1 <64us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
Capabilities: [100] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr+ BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [13c] Virtual Channel <?>
Capabilities: [160] Device Serial Number 00-19-b9-ff-fe-15-db-37
Capabilities: [16c] Power Budgeting <?>
Kernel driver in use: tg3
Kernel modules: tg3
07:0a.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) (prog-if 10 [OHCI])
Subsystem: Dell Device 0207
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 64 (500ns min, 1000ns max), Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 18
Region 0: Memory at daffb800 (32-bit, non-prefetchable) [size=2K]
Region 1: Memory at daffc000 (32-bit, non-prefetchable) [size=16K]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=55mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME+
Kernel driver in use: firewire_ohci
Kernel modules: firewire-ohci
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-02 5:28 oops in ioapic_write_entry Dave Airlie
@ 2010-08-02 6:49 ` Yinghai Lu
2010-08-02 23:17 ` Dave Airlie
0 siblings, 1 reply; 31+ messages in thread
From: Yinghai Lu @ 2010-08-02 6:49 UTC (permalink / raw)
To: Dave Airlie; +Cc: LKML, Eric W. Biederman, Ingo Molnar
On Sun, Aug 1, 2010 at 10:28 PM, Dave Airlie <airlied@gmail.com> wrote:
> Hey guys,
>
> Booted 2.6.35 + my drm-next tree this morning, happened with -rc6. Now
> I changed graphics cards this morning, and my 2.6.32 based enterprise
> kernels are booting fine, and I haven't had much time to bisect this,
> but I thought it might be interesting to you guys. I've booted my
> kernel on other machines with no problems which is why I suspect its
sata_nv 0000:00:0e.0: PCI->APIC IRQ transform: INT A -> IRQ 35
sata_nv 0000:00:0e.0: Using SWNCQ mode
scsi0 : sata_nv
scsi1 : sata_nv
ata1: SATA max UDMA/133 cmd 0xfe00 ctl 0xfe10 bmdma 0xfec0 irq 35
ata2: SATA max UDMA/133 cmd 0xfe20 ctl 0xfe30 bmdma 0xfec8 irq 35
sata_nv 0000:00:0e.1: PCI->APIC IRQ transform: INT B -> IRQ 35
sata_nv 0000:00:0e.1: Using SWNCQ mode
scsi2 : sata_nv
scsi3 : sata_nv
ata3: SATA max UDMA/133 cmd 0xfe40 ctl 0xfe50 bmdma 0xfed0 irq 35
ata4: SATA max UDMA/133 cmd 0xfe60 ctl 0xfe70 bmdma 0xfed8 irq 35
sata_nv 0000:00:0e.2: PCI->APIC IRQ transform: INT C -> IRQ 35
sata_nv 0000:00:0e.2: Using SWNCQ mode
scsi4 : sata_nv
scsi5 : sata_nv
ata5: SATA max UDMA/133 cmd 0xfe80 ctl 0xfe90 bmdma 0xfef0 irq 35
ata6: SATA max UDMA/133 cmd 0xfea0 ctl 0xfeb0 bmdma 0xfef8 irq 35
the kernel is using mptable, and the system have mcp55, so how come
with irq 35?
assume we should only have ioapic irq 0 - 23 ...
Can you send out boot log with "debug apic=debug pci=routeirq" with
2.6.32 and 2.6.35?
Yinghai
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-02 6:49 ` Yinghai Lu
@ 2010-08-02 23:17 ` Dave Airlie
2010-08-03 1:32 ` Yinghai Lu
2010-08-03 3:26 ` Eric W. Biederman
0 siblings, 2 replies; 31+ messages in thread
From: Dave Airlie @ 2010-08-02 23:17 UTC (permalink / raw)
To: Yinghai Lu; +Cc: LKML, Eric W. Biederman, Ingo Molnar
[-- Attachment #1: Type: text/plain, Size: 417 bytes --]
>
> the kernel is using mptable, and the system have mcp55, so how come
> with irq 35?
> assume we should only have ioapic irq 0 - 23 ...
>
> Can you send out boot log with "debug apic=debug pci=routeirq" with
> 2.6.32 and 2.6.35?
Okay el6log is from a RHEL6 2.6.32 kernel, but it should give a good
baseline, the 2.6.35 oops even earlier with all those options and is
in the second attachment.
Dave.
[-- Attachment #2: el6log --]
[-- Type: application/octet-stream, Size: 53264 bytes --]
Initializing cgroup subsys cpuset
Initializing cgroup subsys cpu
Linux version 2.6.32-54.el6.i686 (mockbuild@x86-002.build.bos.redhat.com) (gcc version 4.4.4 20100726 (Red Hat 4.4.4-13) (GCC) ) #1 SMP Tue Jul 27 23:35:55 EDT 2010
KERNEL supported cpus:
Intel GenuineIntel
AMD AuthenticAMD
NSC Geode by NSC
Cyrix CyrixInstead
Centaur CentaurHauls
Transmeta GenuineTMx86
Transmeta TransmetaCPU
UMC UMC UMC UMC
BIOS-provided physical RAM map:
BIOS-e820: 0000000000000000 - 000000000009fc00 (usable)
BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 000000007fdbcc00 (usable)
BIOS-e820: 000000007fdbcc00 - 000000007fdbec00 (ACPI NVS)
BIOS-e820: 000000007fdbec00 - 000000007fdc0c00 (ACPI data)
BIOS-e820: 000000007fdc0c00 - 0000000080000000 (reserved)
BIOS-e820: 00000000e0000000 - 00000000f0000000 (reserved)
BIOS-e820: 00000000fec00000 - 00000000fed01000 (reserved)
BIOS-e820: 00000000fee00000 - 00000000fef00000 (reserved)
BIOS-e820: 00000000ffb00000 - 0000000100000000 (reserved)
DMI 2.3 present.
e820 update range: 0000000000000000 - 0000000000001000 (usable) ==> (reserved)
e820 remove range: 00000000000a0000 - 0000000000100000 (usable)
last_pfn = 0x7fdbc max_arch_pfn = 0x400000
MTRR default type: uncachable
MTRR fixed ranges enabled:
00000-9FFFF write-back
A0000-BFFFF uncachable
C0000-DFFFF write-protect
E0000-EFFFF uncachable
F0000-FFFFF write-back
MTRR variable ranges enabled:
0 base 000000000 mask F80000000 write-back
1 base 07FF00000 mask FFFF00000 uncachable
2 disabled
3 disabled
4 disabled
5 disabled
6 disabled
7 disabled
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
original variable MTRRs
reg 0, base: 0GB, range: 2GB, type WB
reg 1, base: 2047MB, range: 1MB, type UC
total RAM covered: 2047M
Found optimal setting for mtrr clean up
gran_size: 64K chunk_size: 2M num_reg: 2 lose cover RAM: 0G
New variable MTRRs
reg 0, base: 0GB, range: 2GB, type WB
reg 1, base: 2047MB, range: 1MB, type UC
initial memory mapped : 0 - 01000000
init_memory_mapping: 0000000000000000-00000000375fe000
NX (Execute Disable) protection: active
0000000000 - 0000200000 page 4k
0000200000 - 0037400000 page 2M
0037400000 - 00375fe000 page 4k
kernel direct mapping tables up to 375fe000 @ 7000-f000
RAMDISK: 3741a000 - 37fef4f2
Allocated new RAMDISK: 00be2000 - 017b74f2
Move RAMDISK from 000000003741a000 - 0000000037fef4f1 to 00be2000 - 017b74f1
ACPI: RSDP 000febf0 00024 (v02 DELL )
ACPI: XSDT 000fd0b9 00064 (v01 DELL B8K 00000014 ASL 00000061)
ACPI: FACP 000fd191 000F4 (v03 DELL B8K 00000014 ASL 00000061)
ACPI: DSDT fffc13b6 03F25 (v01 DELL dt_ex 00001000 INTL 20050624)
ACPI: FACS 7fdbcc00 00040
ACPI: SSDT fffc53fc 000AC (v01 DELL st_ex 00001000 INTL 20050624)
ACPI: APIC 000fd285 00092 (v01 DELL B8K 00000014 ASL 00000061)
ACPI: BOOT 000fd317 00028 (v01 DELL B8K 00000014 ASL 00000061)
ACPI: MCFG 000fd33f 0003E (v01 DELL B8K 00000014 ASL 00000061)
ACPI: HPET 000fd37d 00038 (v01 DELL B8K 00000014 ASL 00000061)
ACPI: DUMY 7fdbec00 00024 (v01 DELL B8K 00000014 ASL 00000061)
ACPI: SLIC 000fd3b5 00176 (v01 DELL B8K 00000014 ASL 00000061)
ACPI: Local APIC address 0xfee00000
1159MB HIGHMEM available.
885MB LOWMEM available.
mapped low ram: 0 - 375fe000
low ram: 0 - 375fe000
node 0 low ram: 00000000 - 375fe000
node 0 bootmap 0000b000 - 00011ec0
(9 early reservations) ==> bootmem [0000000000 - 00375fe000]
#0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000]
#1 [0000001000 - 0000002000] EX TRAMPOLINE ==> [0000001000 - 0000002000]
#2 [0000006000 - 0000007000] TRAMPOLINE ==> [0000006000 - 0000007000]
#3 [0000400000 - 0000bd8864] TEXT DATA BSS ==> [0000400000 - 0000bd8864]
#4 [000009fc00 - 0000100000] BIOS reserved ==> [000009fc00 - 0000100000]
#5 [0000bd9000 - 0000be11c8] BRK ==> [0000bd9000 - 0000be11c8]
#6 [0000007000 - 000000b000] PGTABLE ==> [0000007000 - 000000b000]
#7 [0000be2000 - 00017b74f2] NEW RAMDISK ==> [0000be2000 - 00017b74f2]
#8 [000000b000 - 0000012000] BOOTMAP ==> [000000b000 - 0000012000]
Scan SMP from c0000000 for 1024 bytes.
Scan SMP from c009fc00 for 1024 bytes.
Scan SMP from c00f0000 for 65536 bytes.
found SMP MP-table at [c00fe710] fe710
mpc: f0000-f024c
Zone PFN ranges:
DMA 0x00000001 -> 0x00001000
Normal 0x00001000 -> 0x000375fe
HighMem 0x000375fe -> 0x0007fdbc
Movable zone start PFN for each node
early_node_map[2] active PFN ranges
0: 0x00000001 -> 0x0000009f
0: 0x00000100 -> 0x0007fdbc
On node 0 totalpages: 523610
DMA zone: 32 pages used for memmap
DMA zone: 0 pages reserved
DMA zone: 3966 pages, LIFO batch:0
Normal zone: 1740 pages used for memmap
Normal zone: 220978 pages, LIFO batch:31
HighMem zone: 2320 pages used for memmap
HighMem zone: 294574 pages, LIFO batch:31
Using APIC driver default
ACPI: PM-Timer IO Port: 0x4008
ACPI: Local APIC address 0xfee00000
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01] enabled)
ACPI: LAPIC (acpi_id[0x03] lapic_id[0x05] disabled)
ACPI: LAPIC (acpi_id[0x04] lapic_id[0x07] disabled)
ACPI: LAPIC (acpi_id[0x05] lapic_id[0x00] disabled)
ACPI: LAPIC (acpi_id[0x06] lapic_id[0x01] disabled)
ACPI: LAPIC (acpi_id[0x07] lapic_id[0x02] disabled)
ACPI: LAPIC (acpi_id[0x08] lapic_id[0x03] disabled)
ACPI: LAPIC_NMI (acpi_id[0xff] high level lint[0x1])
ACPI: IOAPIC (id[0x08] address[0xfec00000] gsi_base[0])
IOAPIC[0]: apic_id 8, version 17, address 0xfec00000, GSI 0-23
ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
ACPI: IRQ0 used by override.
ACPI: IRQ2 used by override.
ACPI: IRQ9 used by override.
Using ACPI (MADT) for SMP configuration information
ACPI: HPET id: 0x10de8201 base: 0xfed00000
SMP: Allowing 8 CPUs, 6 hotplug CPUs
mapped APIC to ffffb000 (fee00000)
mapped IOAPIC to ffffa000 (fec00000)
nr_irqs_gsi: 24
PM: Registered nosave memory: 000000000009f000 - 00000000000f0000
PM: Registered nosave memory: 00000000000f0000 - 0000000000100000
Allocating PCI resources starting at 80000000 (gap: 80000000:60000000)
Booting paravirtualized kernel on bare hardware
NR_CPUS:32 nr_cpumask_bits:32 nr_cpu_ids:8 nr_node_ids:1
PERCPU: Embedded 15 pages/cpu @c2800000 s38392 r0 d23048 u262144
pcpu-alloc: s38392 r0 d23048 u262144 alloc=1*2097152
pcpu-alloc: [0] 0 1 2 3 4 5 6 7
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 519518
Kernel command line: ro root=/dev/mapper/VolGroup00-RHEL500 rd_LVM_LV=VolGroup00/RHEL500 rd_NO_LUKS rd_NO_MD rd_NO_DM LANG=en_US.UTF-8 SYSFONT=latarcyrheb-sun16 KEYBOARDTYPE=pc KEYTABLE=us console=ttyS0,115200 apic=debug pci=routeirq debug
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Initializing CPU#0
Initializing HighMem for node 0 (000375fe:0007fdbc)
Memory: 2055100k/2094832k available (4175k kernel code, 38048k reserved, 2240k data, 524k init, 1187576k highmem)
virtual kernel memory layout:
fixmap : 0xffad5000 - 0xfffff000 (5288 kB)
pkmap : 0xff600000 - 0xff800000 (2048 kB)
vmalloc : 0xf7dfe000 - 0xff5fe000 ( 120 MB)
lowmem : 0xc0000000 - 0xf75fe000 ( 885 MB)
.init : 0xc0a45000 - 0xc0ac8000 ( 524 kB)
.data : 0xc0813f16 - 0xc0a44248 (2240 kB)
.text : 0xc0400000 - 0xc0813f16 (4175 kB)
Checking if this processor honours the WP bit even in supervisor mode...Ok.
Hierarchical RCU implementation.
NR_IRQS:2304 nr_irqs:472
Extended CMOS year: 2000
spurious 8259A interrupt: IRQ7.
Console: colour VGA+ 80x25
console [ttyS0] enabled
allocated 10485760 bytes of page_cgroup
please try 'cgroup_disable=memory' option if you don't want memory cgroups
hpet clockevent registered
HPET: 3 timers in total, 0 timers will be used for per-cpu timer
Fast TSC calibration using PIT
Detected 2660.004 MHz processor.
Calibrating delay loop (skipped), value calculated using timer frequency.. 5320.00 BogoMIPS (lpj=2660004)
pid_max: default: 32768 minimum: 301
Security Framework initialized
SELinux: Initializing.
SELinux: Starting in permissive mode
Mount-cache hash table entries: 512
Initializing cgroup subsys ns
Initializing cgroup subsys cpuacct
Initializing cgroup subsys memory
Initializing cgroup subsys devices
Initializing cgroup subsys freezer
Initializing cgroup subsys net_cls
Initializing cgroup subsys blkio
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
mce: CPU supports 6 MCE banks
CPU0: Thermal monitoring enabled (TM2)
using mwait in idle threads.
Performance Events: PEBS fmt0-, Core2 events, Intel PMU driver.
PEBS disabled due to CPU errata.
... version: 2
... bit width: 40
... generic registers: 2
... value mask: 000000ffffffffff
... max period: 000000007fffffff
... fixed-purpose events: 3
... event mask: 0000000700000003
Checking 'hlt' instruction... OK.
ACPI: Core revision 20090903
Enabling APIC mode: Flat. Using 1 I/O APICs
Getting VERSION: 50014
Getting VERSION: 50014
Getting ID: 0
Getting ID: 0
enabled ExtINT on CPU#0
ESR value before enabling vector: 0x00000040 after: 0x00000000
ENABLING IO-APIC IRQs
init IO_APIC IRQs
8-0 (apicid-pin) not connected
IOAPIC[0]: Set routing entry (8-1 -> 0x31 -> IRQ 1 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-2 -> 0x30 -> IRQ 0 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-3 -> 0x33 -> IRQ 3 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-4 -> 0x34 -> IRQ 4 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-5 -> 0x35 -> IRQ 5 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-6 -> 0x36 -> IRQ 6 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-7 -> 0x37 -> IRQ 7 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-8 -> 0x38 -> IRQ 8 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-9 -> 0x39 -> IRQ 9 Mode:1 Active:0)
IOAPIC[0]: Set routing entry (8-10 -> 0x3a -> IRQ 10 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-11 -> 0x3b -> IRQ 11 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-12 -> 0x3c -> IRQ 12 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-13 -> 0x3d -> IRQ 13 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-14 -> 0x3e -> IRQ 14 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-15 -> 0x3f -> IRQ 15 Mode:0 Active:0)
8-16 8-17 8-18 8-19 8-20 8-21 8-22 8-23 (apicid-pin) not connected
..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
CPU0: Intel(R) Core(TM)2 CPU 6700 @ 2.66GHz stepping 06
Using local APIC timer interrupts.
calibrating APIC timer ...
... lapic delta = 1662449
... PM-Timer delta = 357940
... PM-Timer result ok
..... delta 1662449
..... mult: 71412495
..... calibration result: 265991
..... CPU clock speed is 2659.0917 MHz.
..... host bus clock speed is 265.0991 MHz.
Booting Node 0, Processors #1
Initializing CPU#1
masked ExtINT on CPU#1
Brought up 2 CPUs
Total of 2 processors activated (10639.76 BogoMIPS).
sizeof(vma)=96 bytes
sizeof(page)=32 bytes
sizeof(inode)=352 bytes
sizeof(dentry)=132 bytes
sizeof(ext3inode)=508 bytes
sizeof(buffer_head)=56 bytes
sizeof(skbuff)=184 bytes
sizeof(task_struct)=1324 bytes
devtmpfs: initialized
Dell XPS710 series board detected. Selecting BIOS-method for reboots.
regulator: core version 0.5
NET: Registered protocol family 16
ACPI: bus type pci registered
PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 255
PCI: MCFG area at e0000000 reserved in E820
PCI: Using MMCONFIG for extended config space
PCI: Using configuration type 1 for base access
bio: create slab <bio-0> at 0
ACPI: EC: Look up EC in DSDT
ACPI: BIOS _OSI(Linux) query ignored
ACPI: Interpreter enabled
ACPI: (supports S0 S1 S3 S4 S5)
ACPI: Using IOAPIC for interrupt routing
ACPI: No dock devices found.
ACPI: PCI Root Bridge [PCI0] (0000:00)
pci 0000:00:02.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:02.0: PME# disabled
pci 0000:00:04.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:04.0: PME# disabled
pci 0000:00:05.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:05.0: PME# disabled
pci 0000:00:0a.0: reg 18 io port: [0x4f00-0x4fff]
pci 0000:00:0a.1: reg 10 io port: [0x4c00-0x4c3f]
pci 0000:00:0a.1: reg 20 io port: [0x5000-0x503f]
pci 0000:00:0a.1: reg 24 io port: [0x5100-0x513f]
pci 0000:00:0a.1: PME# supported from D3hot D3cold
pci 0000:00:0a.1: PME# disabled
pci 0000:00:0b.0: reg 10 32bit mmio: [0xdfff8000-0xdfff8fff]
pci 0000:00:0b.0: supports D1 D2
pci 0000:00:0b.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:0b.0: PME# disabled
pci 0000:00:0b.1: reg 10 32bit mmio: [0xdfff7f00-0xdfff7fff]
pci 0000:00:0b.1: supports D1 D2
pci 0000:00:0b.1: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:0b.1: PME# disabled
pci 0000:00:0d.0: reg 20 io port: [0xecf0-0xecff]
pci 0000:00:0e.0: reg 10 io port: [0xfe00-0xfe07]
pci 0000:00:0e.0: reg 14 io port: [0xfe10-0xfe13]
pci 0000:00:0e.0: reg 18 io port: [0xfe20-0xfe27]
pci 0000:00:0e.0: reg 1c io port: [0xfe30-0xfe33]
pci 0000:00:0e.0: reg 20 io port: [0xfec0-0xfecf]
pci 0000:00:0e.0: reg 24 32bit mmio: [0xdfff9000-0xdfff9fff]
pci 0000:00:0e.1: reg 10 io port: [0xfe40-0xfe47]
pci 0000:00:0e.1: reg 14 io port: [0xfe50-0xfe53]
pci 0000:00:0e.1: reg 18 io port: [0xfe60-0xfe67]
pci 0000:00:0e.1: reg 1c io port: [0xfe70-0xfe73]
pci 0000:00:0e.1: reg 20 io port: [0xfed0-0xfedf]
pci 0000:00:0e.1: reg 24 32bit mmio: [0xdfffa000-0xdfffafff]
pci 0000:00:0e.2: reg 10 io port: [0xfe80-0xfe87]
pci 0000:00:0e.2: reg 14 io port: [0xfe90-0xfe93]
pci 0000:00:0e.2: reg 18 io port: [0xfea0-0xfea7]
pci 0000:00:0e.2: reg 1c io port: [0xfeb0-0xfeb3]
pci 0000:00:0e.2: reg 20 io port: [0xfef0-0xfeff]
pci 0000:00:0e.2: reg 24 32bit mmio: [0xdfffb000-0xdfffbfff]
pci 0000:00:0f.1: reg 10 32bit mmio: [0xdfffc000-0xdfffffff]
pci 0000:00:0f.1: PME# supported from D3hot D3cold
pci 0000:00:0f.1: PME# disabled
pci 0000:00:13.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:13.0: PME# disabled
pci 0000:00:18.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:18.0: PME# disabled
pci 0000:01:00.0: reg 10 32bit mmio: [0xdefe0000-0xdeffffff]
pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
pci 0000:01:00.0: PME# disabled
pci 0000:00:02.0: bridge io port: [0xc000-0xdfff]
pci 0000:00:02.0: bridge 32bit mmio: [0xdc000000-0xdeffffff]
pci 0000:00:02.0: bridge 64bit mmio pref: [0xb0000000-0xcfffffff]
pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
pci 0000:02:00.0: PME# disabled
pci 0000:02:0c.0: PME# supported from D0 D3hot D3cold
pci 0000:02:0c.0: PME# disabled
pci 0000:01:00.0: bridge io port: [0xc000-0xdfff]
pci 0000:01:00.0: bridge 32bit mmio: [0xdc000000-0xddffffff]
pci 0000:01:00.0: bridge 64bit mmio pref: [0xb0000000-0xcfffffff]
pci 0000:03:00.0: reg 10 64bit mmio pref: [0xb0000000-0xbfffffff]
pci 0000:03:00.0: reg 18 64bit mmio: [0xddef0000-0xddefffff]
pci 0000:03:00.0: reg 20 io port: [0xdc00-0xdcff]
pci 0000:03:00.0: reg 30 32bit mmio pref: [0xddf00000-0xddf1ffff]
pci 0000:03:00.0: supports D1 D2
pci 0000:02:00.0: bridge io port: [0xd000-0xdfff]
pci 0000:02:00.0: bridge 32bit mmio: [0xdd000000-0xddffffff]
pci 0000:02:00.0: bridge 64bit mmio pref: [0xb0000000-0xbfffffff]
pci 0000:04:00.0: reg 10 64bit mmio pref: [0xc0000000-0xcfffffff]
pci 0000:04:00.0: reg 18 64bit mmio: [0xdcef0000-0xdcefffff]
pci 0000:04:00.0: reg 20 io port: [0xcc00-0xccff]
pci 0000:04:00.0: reg 30 32bit mmio pref: [0xdcf00000-0xdcf1ffff]
pci 0000:04:00.0: supports D1 D2
pci 0000:04:00.1: reg 10 64bit mmio: [0xdceec000-0xdceeffff]
pci 0000:04:00.1: supports D1 D2
pci 0000:02:0c.0: bridge io port: [0xc000-0xcfff]
pci 0000:02:0c.0: bridge 32bit mmio: [0xdc000000-0xdcffffff]
pci 0000:02:0c.0: bridge 64bit mmio pref: [0xc0000000-0xcfffffff]
pci 0000:06:00.0: reg 10 64bit mmio: [0xdbff0000-0xdbffffff]
pci 0000:06:00.0: PME# supported from D3hot D3cold
pci 0000:06:00.0: PME# disabled
pci 0000:06:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'
pci 0000:00:05.0: bridge 32bit mmio: [0xdb000000-0xdbffffff]
pci 0000:07:0a.0: reg 10 32bit mmio: [0xdaffb800-0xdaffbfff]
pci 0000:07:0a.0: reg 14 32bit mmio: [0xdaffc000-0xdaffffff]
pci 0000:07:0a.0: supports D1 D2
pci 0000:07:0a.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:07:0a.0: PME# disabled
pci 0000:00:0f.0: transparent bridge
pci 0000:00:0f.0: bridge 32bit mmio: [0xda000000-0xdaffffff]
pci_bus 0000:00: on NUMA node 0
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PCI1._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PCI2._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PCI3._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PCI4._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PCI5._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.PCI6._PRT]
Unable to assume PCIe control: Disabling ASPM
ACPI: PCI Interrupt Link [LK00] (IRQs 3 4 5 6 7 9 10 *11 12 15)
ACPI: PCI Interrupt Link [LK01] (IRQs 3 4 5 6 7 9 *10 11 12 15)
ACPI: PCI Interrupt Link [LK02] (IRQs 3 4 5 6 7 *9 10 11 12 15)
ACPI: PCI Interrupt Link [LK03] (IRQs 3 4 5 6 7 9 10 11 12 15) *0, disabled.
ACPI: PCI Interrupt Link [LK04] (IRQs 3 4 5 6 7 9 10 *11 12 15)
ACPI: PCI Interrupt Link [LK05] (IRQs 3 4 5 6 7 9 *10 11 12 15)
ACPI: PCI Interrupt Link [LK06] (IRQs 3 4 5 6 7 *9 10 11 12 15)
ACPI: PCI Interrupt Link [LK07] (IRQs 3 4 5 6 7 9 10 11 12 15) *0, disabled.
ACPI: PCI Interrupt Link [LK12] (IRQs 3 4 5 6 7 *9 10 11 12 15)
ACPI: PCI Interrupt Link [LK13] (IRQs 3 4 5 6 7 9 *10 11 12 15)
ACPI: PCI Interrupt Link [LK14] (IRQs 3 4 5 6 7 9 10 11 12 15) *0, disabled.
ACPI: PCI Interrupt Link [LK16] (IRQs 3 4 5 6 7 9 10 *11 12 15)
ACPI: PCI Interrupt Link [LK17] (IRQs 3 4 5 6 7 9 10 *11 12 15)
ACPI: PCI Interrupt Link [LK20] (IRQs 3 4 5 6 7 9 *10 11 12 15)
ACPI: PCI Interrupt Link [LK23] (IRQs 3 4 5 6 7 *9 10 11 12 15)
ACPI: PCI Interrupt Link [LK26] (IRQs 3 4 5 6 7 9 10 11 12 15) *14
ACPI: PCI Interrupt Link [LK27] (IRQs 3 4 5 6 7 9 10 *11 12 15)
ACPI: PCI Interrupt Link [AP00] (IRQs 16) *0
ACPI: PCI Interrupt Link [AP01] (IRQs 17) *0
ACPI: PCI Interrupt Link [AP02] (IRQs 18) *0
ACPI: PCI Interrupt Link [AP03] (IRQs 19) *0, disabled.
ACPI: PCI Interrupt Link [AP04] (IRQs 16) *0
ACPI: PCI Interrupt Link [AP05] (IRQs 17) *0
ACPI: PCI Interrupt Link [AP06] (IRQs 18) *0
ACPI: PCI Interrupt Link [AP07] (IRQs 19) *0, disabled.
ACPI: PCI Interrupt Link [AP12] (IRQs 20 21 22 23) *0
ACPI: PCI Interrupt Link [AP13] (IRQs 20 21 22 23) *0
ACPI: PCI Interrupt Link [AP14] (IRQs 20 21 22 23) *0, disabled.
ACPI: PCI Interrupt Link [AP16] (IRQs 20 21 22 23) *0
ACPI: PCI Interrupt Link [AP17] (IRQs 20 21 22 23) *0
ACPI: PCI Interrupt Link [AP20] (IRQs 20 21 22 23) *0
ACPI: PCI Interrupt Link [AP23] (IRQs 20 21 22 23) *0
ACPI: PCI Interrupt Link [AP26] (IRQs 20 21 22 23) *0
ACPI: PCI Interrupt Link [AP27] (IRQs 20 21 22 23) *0
vgaarb: device added: PCI:0000:04:00.0,decodes=io+mem,owns=io+mem,locks=none
vgaarb: loaded
SCSI subsystem initialized
libata version 3.00 loaded.
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI: Using ACPI for IRQ routing
PCI: Routing PCI interrupts for all devices because "pci=routeirq" specified
ACPI: PCI Interrupt Link [AP12] enabled at IRQ 23
alloc irq_desc for 23 on node -1
alloc kstat_irqs on node -1
IOAPIC[0]: Set routing entry (8-23 -> 0x49 -> IRQ 23 Mode:1 Active:1)
pci 0000:00:0a.1: PCI INT A -> Link[AP12] -> GSI 23 (level, low) -> IRQ 23
ACPI: PCI Interrupt Link [AP20] enabled at IRQ 22
alloc irq_desc for 22 on node -1
alloc kstat_irqs on node -1
IOAPIC[0]: Set routing entry (8-22 -> 0x51 -> IRQ 22 Mode:1 Active:1)
pci 0000:00:0b.0: PCI INT A -> Link[AP20] -> GSI 22 (level, low) -> IRQ 22
ACPI: PCI Interrupt Link [AP13] enabled at IRQ 21
alloc irq_desc for 21 on node -1
alloc kstat_irqs on node -1
IOAPIC[0]: Set routing entry (8-21 -> 0x59 -> IRQ 21 Mode:1 Active:1)
pci 0000:00:0b.1: PCI INT B -> Link[AP13] -> GSI 21 (level, low) -> IRQ 21
ACPI: PCI Interrupt Link [AP17] enabled at IRQ 20
alloc irq_desc for 20 on node -1
alloc kstat_irqs on node -1
IOAPIC[0]: Set routing entry (8-20 -> 0x61 -> IRQ 20 Mode:1 Active:1)
pci 0000:00:0e.0: PCI INT A -> Link[AP17] -> GSI 20 (level, low) -> IRQ 20
ACPI: PCI Interrupt Link [AP16] enabled at IRQ 23
pci 0000:00:0e.1: PCI INT B -> Link[AP16] -> GSI 23 (level, low) -> IRQ 23
ACPI: PCI Interrupt Link [AP27] enabled at IRQ 22
pci 0000:00:0e.2: PCI INT C -> Link[AP27] -> GSI 22 (level, low) -> IRQ 22
ACPI: PCI Interrupt Link [AP23] enabled at IRQ 21
pci 0000:00:0f.1: PCI INT B -> Link[AP23] -> GSI 21 (level, low) -> IRQ 21
ACPI: PCI Interrupt Link [AP04] enabled at IRQ 16
alloc irq_desc for 16 on node -1
alloc kstat_irqs on node -1
IOAPIC[0]: Set routing entry (8-16 -> 0x69 -> IRQ 16 Mode:1 Active:1)
pci 0000:01:00.0: PCI INT A -> Link[AP04] -> GSI 16 (level, low) -> IRQ 16
pci 0000:02:00.0: PCI INT A -> Link[AP04] -> GSI 16 (level, low) -> IRQ 16
pci 0000:02:0c.0: PCI INT A -> Link[AP04] -> GSI 16 (level, low) -> IRQ 16
pci 0000:03:00.0: PCI INT A -> Link[AP04] -> GSI 16 (level, low) -> IRQ 16
pci 0000:04:00.0: PCI INT A -> Link[AP04] -> GSI 16 (level, low) -> IRQ 16
ACPI: PCI Interrupt Link [AP05] enabled at IRQ 17
alloc irq_desc for 17 on node -1
alloc kstat_irqs on node -1
IOAPIC[0]: Set routing entry (8-17 -> 0x71 -> IRQ 17 Mode:1 Active:1)
pci 0000:04:00.1: PCI INT B -> Link[AP05] -> GSI 17 (level, low) -> IRQ 17
ACPI: PCI Interrupt Link [AP06] enabled at IRQ 18
alloc irq_desc for 18 on node -1
alloc kstat_irqs on node -1
IOAPIC[0]: Set routing entry (8-18 -> 0x79 -> IRQ 18 Mode:1 Active:1)
pci 0000:06:00.0: PCI INT A -> Link[AP06] -> GSI 18 (level, low) -> IRQ 18
ACPI: PCI Interrupt Link [AP02] enabled at IRQ 18
pci 0000:07:0a.0: PCI INT A -> Link[AP02] -> GSI 18 (level, low) -> IRQ 18
PCI: old code would have set cacheline size to 32 bytes, but clflush_size = 64
PCI: pci_cache_line_size set to 64 bytes
NetLabel: Initializing
NetLabel: domain hash size = 128
NetLabel: protocols = UNLABELED CIPSOv4
NetLabel: unlabeled traffic allowed by default
printing PIC contents
... PIC IMR: ffff
... PIC IRR: 0c00
... PIC ISR: 0000
... PIC ELCR: 0e00
printing local APIC contents on CPU#0/0:
... APIC ID: 00000000 (0)
... APIC VERSION: 00050014
... APIC TASKPRI: 00000000 (00)
... APIC PROCPRI: 00000000
... APIC LDR: 01000000
... APIC DFR: ffffffff
... APIC SPIV: 000001ff
... APIC ISR field:
0000000000000000000000000000000000000000000000000000000000000000
... APIC TMR field:
0000000000000000000000000000000000000000000000000000000000000000
... APIC IRR field:
0000000000000000000000000000000000000000000000000000000000008000
... APIC ESR: 00000000
... APIC ICR: 000008fb
... APIC ICR2: 02000000
... APIC LVTT: 000200ef
... APIC LVTPC: 00000400
... APIC LVT0: 00010700
... APIC LVT1: 00000400
... APIC LVTERR: 000000fe
... APIC TMICT: 000040f0
... APIC TMCCT: 00000dea
... APIC TDCR: 00000003
printing local APIC contents on CPU#1/1:
... APIC ID: 01000000 (1)
... APIC VERSION: 00050014
... APIC TASKPRI: 00000000 (00)
... APIC PROCPRI: 00000000
... APIC LDR: 02000000
... APIC DFR: ffffffff
... APIC SPIV: 000001ff
... APIC ISR field:
0000000000000000000000000000000000000000000000000000000000000000
... APIC TMR field:
0000000000000000000000000000000000000000000000000000000000000000
... APIC IRR field:
0000000000000000000000000000000000000000000000000000000000008000
... APIC ESR: 00000000
... APIC ICR: 000008fd
... APIC ICR2: 01000000
... APIC LVTT: 000200ef
... APIC LVTPC: 00010400
... APIC LVT0: 00010700
... APIC LVT1: 00010400
... APIC LVTERR: 000000fe
... APIC TMICT: 000040f0
... APIC TMCCT: 00001f3b
... APIC TDCR: 00000003
number of MP IRQ sources: 15.
number of IO-APIC #8 registers: 24.
testing the IO APIC.......................
IO APIC #8......
.... register #00: 00000000
....... : physical APIC id: 00
....... : Delivery Type: 0
....... : LTS : 0
.... register #01: 00170011
....... : max redirection entries: 0017
....... : PRQ implemented: 0
....... : IO APIC version: 0011
.... register #02: 00000000
....... : arbitration: 00
.... IRQ redirection table:
NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
00 000 1 0 0 0 0 0 0 00
01 003 0 0 0 0 0 1 1 31
02 003 0 0 0 0 0 1 1 30
03 003 0 0 0 0 0 1 1 33
04 003 0 0 0 0 0 1 1 34
05 003 0 0 0 0 0 1 1 35
06 003 0 0 0 0 0 1 1 36
07 003 0 0 0 0 0 1 1 37
08 003 0 0 0 0 0 1 1 38
09 003 0 1 0 0 0 1 1 39
0a 003 1 0 0 0 0 1 1 3A
0b 003 1 0 0 0 0 1 1 3B
0c 003 0 0 0 0 0 1 1 3C
0d 003 0 0 0 0 0 1 1 3D
0e 003 0 0 0 0 0 1 1 3E
0f 003 0 0 0 0 0 1 1 3F
10 003 1 1 0 1 0 1 1 69
11 003 1 1 0 1 0 1 1 71
12 003 1 1 0 1 0 1 1 79
13 000 1 0 0 0 0 0 0 00
14 003 1 1 0 1 0 1 1 61
15 003 1 1 0 1 0 1 1 59
16 003 1 1 0 1 0 1 1 51
17 003 1 1 0 1 0 1 1 49
IRQ to pin mappings:
IRQ0 -> 0:2
IRQ1 -> 0:1
IRQ3 -> 0:3
IRQ4 -> 0:4
IRQ5 -> 0:5
IRQ6 -> 0:6
IRQ7 -> 0:7
IRQ8 -> 0:8
IRQ9 -> 0:9
IRQ10 -> 0:10
IRQ11 -> 0:11
IRQ12 -> 0:12
IRQ13 -> 0:13
IRQ14 -> 0:14
IRQ15 -> 0:15
IRQ16 -> 0:16
IRQ17 -> 0:17
IRQ18 -> 0:18
IRQ20 -> 0:20
IRQ21 -> 0:21
IRQ22 -> 0:22
IRQ23 -> 0:23
.................................... done.
hpet0: at MMIO 0xfed00000, IRQs 2, 8, 31
hpet0: 3 comparators, 32-bit 25.000000 MHz counter
Switching to clocksource tsc
pnp: PnP ACPI init
ACPI: bus type pnp registered
IOAPIC[0]: Set routing entry (8-13 -> 0x3d -> IRQ 13 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-8 -> 0x38 -> IRQ 8 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-4 -> 0x34 -> IRQ 4 Mode:0 Active:0)
pnp: PnP ACPI: found 10 devices
ACPI: ACPI bus type pnp unregistered
system 00:01: ioport range 0x800-0x87f has been reserved
system 00:01: ioport range 0x4000-0x407f has been reserved
system 00:01: ioport range 0x4080-0x40ff has been reserved
system 00:01: ioport range 0x4400-0x447f has been reserved
system 00:01: ioport range 0x4480-0x44ff has been reserved
system 00:01: ioport range 0x4800-0x487f has been reserved
system 00:01: ioport range 0x4880-0x48ff has been reserved
system 00:07: iomem range 0x0-0x9ffff could not be reserved
system 00:07: iomem range 0x100000-0xffffff could not be reserved
system 00:07: iomem range 0x1000000-0x7fdbcbff could not be reserved
system 00:07: iomem range 0xf0000-0xfffff could not be reserved
system 00:07: iomem range 0xc0000-0xdffff could not be reserved
system 00:07: iomem range 0x7fdbcc00-0x7fffffff could not be reserved
system 00:07: iomem range 0xfec00000-0xfecfffff could not be reserved
system 00:07: iomem range 0xfee00000-0xfeefffff has been reserved
system 00:07: iomem range 0xffb00000-0xffbfffff has been reserved
system 00:07: iomem range 0xffc00000-0xffffffff has been reserved
system 00:08: iomem range 0xe0000000-0xefffffff has been reserved
PCI: max bus depth: 3 pci_try_num: 4
pci 0000:02:00.0: PCI bridge to [bus 03-03]
pci 0000:02:00.0: PCI bridge, secondary bus 0000:03
pci 0000:02:00.0: bridge window [0xd000-0xdfff]
pci 0000:02:00.0: bridge window [0xdd000000-0xddffffff]
pci 0000:02:00.0: bridge window [0xb0000000-0xbfffffff]
pci 0000:02:0c.0: PCI bridge to [bus 04-04]
pci 0000:02:0c.0: PCI bridge, secondary bus 0000:04
pci 0000:02:0c.0: bridge window [0xc000-0xcfff]
pci 0000:02:0c.0: bridge window [0xdc000000-0xdcffffff]
pci 0000:02:0c.0: bridge window [0xc0000000-0xcfffffff]
pci 0000:01:00.0: PCI bridge to [bus 02-04]
pci 0000:01:00.0: PCI bridge, secondary bus 0000:02
pci 0000:01:00.0: bridge window [0xc000-0xdfff]
pci 0000:01:00.0: bridge window [0xdc000000-0xddffffff]
pci 0000:01:00.0: bridge window [0xb0000000-0xcfffffff]
pci 0000:00:02.0: PCI bridge to [bus 01-04]
pci 0000:00:02.0: PCI bridge, secondary bus 0000:01
pci 0000:00:02.0: bridge window [0xc000-0xdfff]
pci 0000:00:02.0: bridge window [0xdc000000-0xdeffffff]
pci 0000:00:02.0: bridge window [0xb0000000-0xcfffffff]
pci 0000:00:04.0: PCI bridge to [bus 05-05]
pci 0000:00:04.0: PCI bridge, secondary bus 0000:05
pci 0000:00:04.0: bridge window [io disabled]
pci 0000:00:04.0: bridge window [mem disabled]
pci 0000:00:04.0: bridge window [mem pref disabled]
pci 0000:00:05.0: PCI bridge to [bus 06-06]
pci 0000:00:05.0: PCI bridge, secondary bus 0000:06
pci 0000:00:05.0: bridge window [io disabled]
pci 0000:00:05.0: bridge window [0xdb000000-0xdbffffff]
pci 0000:00:05.0: bridge window [mem pref disabled]
pci 0000:00:0f.0: PCI bridge to [bus 07-07]
pci 0000:00:0f.0: PCI bridge, secondary bus 0000:07
pci 0000:00:0f.0: bridge window [io disabled]
pci 0000:00:0f.0: bridge window [0xda000000-0xdaffffff]
pci 0000:00:0f.0: bridge window [mem pref disabled]
pci 0000:00:13.0: PCI bridge to [bus 08-08]
pci 0000:00:13.0: PCI bridge, secondary bus 0000:08
pci 0000:00:13.0: bridge window [io disabled]
pci 0000:00:13.0: bridge window [mem disabled]
pci 0000:00:13.0: bridge window [mem pref disabled]
pci 0000:00:18.0: PCI bridge to [bus 09-09]
pci 0000:00:18.0: PCI bridge, secondary bus 0000:09
pci 0000:00:18.0: bridge window [io disabled]
pci 0000:00:18.0: bridge window [mem disabled]
pci 0000:00:18.0: bridge window [mem pref disabled]
pci 0000:00:02.0: setting latency timer to 64
pci 0000:01:00.0: PCI INT A -> Link[AP04] -> GSI 16 (level, low) -> IRQ 16
pci 0000:01:00.0: setting latency timer to 64
pci 0000:02:00.0: PCI INT A -> Link[AP04] -> GSI 16 (level, low) -> IRQ 16
pci 0000:02:00.0: setting latency timer to 64
pci 0000:02:0c.0: PCI INT A -> Link[AP04] -> GSI 16 (level, low) -> IRQ 16
pci 0000:02:0c.0: setting latency timer to 64
pci 0000:00:04.0: setting latency timer to 64
pci 0000:00:05.0: setting latency timer to 64
pci 0000:00:0f.0: setting latency timer to 64
pci 0000:00:13.0: setting latency timer to 64
pci 0000:00:18.0: setting latency timer to 64
NET: Registered protocol family 2
IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
TCP bind hash table entries: 65536 (order: 7, 524288 bytes)
TCP: Hash tables configured (established 131072 bind 65536)
TCP reno registered
NET: Registered protocol family 1
pci 0000:04:00.0: Boot video device
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 12117k freed
Simple Boot Flag at 0x7a set to 0x1
apm: BIOS version 1.2 Flags 0x03 (Driver version 1.16ac)
apm: disabled - APM is not SMP safe.
audit: initializing netlink socket (disabled)
type=2000 audit(1280790748.699:1): initialized
highmem bounce pool size: 64 pages
HugeTLB registered 2 MB page size, pre-allocated 0 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
msgmni has been set to 1720
SELinux: Registering netfilter hooks
alg: No test for stdrng (krng)
ksign: Installing public key data
Loading keyring
- Added public key ECEC034A9B73CBB4
- User ID: Red Hat, Inc. (Kernel Module GPG key)
- Added public key D4A26C9CCD09BEDA
- User ID: Red Hat Enterprise Linux Driver Update Program <secalert@redhat.com>
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered (default)
alloc irq_desc for 24 on node -1
alloc kstat_irqs on node -1
pcieport 0000:00:02.0: irq 24 for MSI/MSI-X
pcieport 0000:00:02.0: setting latency timer to 64
alloc irq_desc for 25 on node -1
alloc kstat_irqs on node -1
pcieport 0000:00:04.0: irq 25 for MSI/MSI-X
pcieport 0000:00:04.0: setting latency timer to 64
alloc irq_desc for 26 on node -1
alloc kstat_irqs on node -1
pcieport 0000:00:05.0: irq 26 for MSI/MSI-X
pcieport 0000:00:05.0: setting latency timer to 64
alloc irq_desc for 27 on node -1
alloc kstat_irqs on node -1
pcieport 0000:00:13.0: irq 27 for MSI/MSI-X
pcieport 0000:00:13.0: setting latency timer to 64
alloc irq_desc for 28 on node -1
alloc kstat_irqs on node -1
pcieport 0000:00:18.0: irq 28 for MSI/MSI-X
pcieport 0000:00:18.0: setting latency timer to 64
alloc irq_desc for 29 on node -1
alloc kstat_irqs on node -1
pcieport 0000:01:00.0: irq 29 for MSI/MSI-X
pcieport 0000:01:00.0: setting latency timer to 64
alloc irq_desc for 30 on node -1
alloc kstat_irqs on node -1
pcieport 0000:02:00.0: irq 30 for MSI/MSI-X
pcieport 0000:02:00.0: setting latency timer to 64
alloc irq_desc for 31 on node -1
alloc kstat_irqs on node -1
pcieport 0000:02:0c.0: irq 31 for MSI/MSI-X
pcieport 0000:02:0c.0: setting latency timer to 64
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
pciehp: PCI Express Hot Plug Controller Driver version: 0.4
acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
pci-stub: invalid id string ""
input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input0
ACPI: Power Button [VBTN]
input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input1
ACPI: Power Button [PWRF]
ACPI: CPU Hot Add is currently disabled for x86 32-bit.
processor: probe of LNXCPU:00 failed with error -22
ACPI: CPU Hot Add is currently disabled for x86 32-bit.
processor: probe of LNXCPU:01 failed with error -22
ACPI: CPU Hot Add is currently disabled for x86 32-bit.
processor: probe of LNXCPU:02 failed with error -22
ACPI: CPU Hot Add is currently disabled for x86 32-bit.
processor: probe of LNXCPU:03 failed with error -22
isapnp: Scanning for PnP cards...
isapnp: No Plug & Play device found
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
crash memory driver: version 1.0
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
00:06: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
brd: module loaded
loop: module loaded
input: Macintosh mouse button emulation as /devices/virtual/input/input2
Fixed MDIO Bus: probed
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci_hcd 0000:00:0b.1: PCI INT B -> Link[AP13] -> GSI 21 (level, low) -> IRQ 21
ehci_hcd 0000:00:0b.1: setting latency timer to 64
ehci_hcd 0000:00:0b.1: EHCI Host Controller
ehci_hcd 0000:00:0b.1: new USB bus registered, assigned bus number 1
ehci_hcd 0000:00:0b.1: debug port 1
ehci_hcd 0000:00:0b.1: cache line size of 64 is not supported
ehci_hcd 0000:00:0b.1: irq 21, io mem 0xdfff7f00
ehci_hcd 0000:00:0b.1: USB 2.0 started, EHCI 1.00
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: EHCI Host Controller
usb usb1: Manufacturer: Linux 2.6.32-54.el6.i686 ehci_hcd
usb usb1: SerialNumber: 0000:00:0b.1
usb usb1: configuration #1 chosen from 1 choice
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 10 ports detected
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
ohci_hcd 0000:00:0b.0: PCI INT A -> Link[AP20] -> GSI 22 (level, low) -> IRQ 22
ohci_hcd 0000:00:0b.0: setting latency timer to 64
ohci_hcd 0000:00:0b.0: OHCI Host Controller
ohci_hcd 0000:00:0b.0: new USB bus registered, assigned bus number 2
ohci_hcd 0000:00:0b.0: irq 22, io mem 0xdfff8000
usb usb2: New USB device found, idVendor=1d6b, idProduct=0001
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: OHCI Host Controller
usb usb2: Manufacturer: Linux 2.6.32-54.el6.i686 ohci_hcd
usb usb2: SerialNumber: 0000:00:0b.0
usb usb2: configuration #1 chosen from 1 choice
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 10 ports detected
uhci_hcd: USB Universal Host Controller Interface driver
PNP: No PS/2 controller found. Probing ports directly.
serio: i8042 KBD port at 0x60,0x64 irq 1
serio: i8042 AUX port at 0x60,0x64 irq 12
mice: PS/2 mouse device common for all mice
rtc_cmos 00:05: RTC can wake from S4
rtc_cmos 00:05: rtc core: registered rtc_cmos as rtc0
rtc0: alarms up to one year, y3k, 242 bytes nvram, hpet irqs
cpuidle: using governor ladder
cpuidle: using governor menu
usbcore: registered new interface driver hiddev
usbcore: registered new interface driver usbhid
usbhid: v2.6:USB HID core driver
TCP cubic registered
Initializing XFRM netlink socket
NET: Registered protocol family 17
Using IPI No-Shortcut mode
registered taskstats version 1
IMA: No TPM chip found, activating TPM-bypass!
rtc_cmos 00:05: setting system clock to 2010-08-02 23:12:31 UTC (1280790751)
Initalizing network drop monitor service
Freeing unused kernel memory: 524k freed
Write protecting the kernel text: 4176k
Write protecting the kernel read-only data: 1812k
dracut: dracut-004-27.el6
dracut: rd_NO_LUKS: removing cryptoluks activation
device-mapper: uevent: version 1.0.3
device-mapper: ioctl: 4.17.0-ioctl (2010-03-05) initialised: dm-devel@redhat.com
udev: starting version 147
usb 1-6: new high speed USB device using ehci_hcd and address 2
[drm] Initialized drm 1.1.0 20060810
[drm] radeon defaulting to kernel modesetting.
[drm] radeon kernel modesetting enabled.
radeon 0000:03:00.0: PCI INT A -> Link[AP04] -> GSI 16 (level, low) -> IRQ 16
radeon 0000:03:00.0: setting latency timer to 64
[drm] initializing kernel modesetting (RV670 0x1002:0x950F).
[drm] register mmio base: 0xDDEF0000
[drm] register mmio size: 65536
radeon 0000:03:00.0: Invalid ROM contents
usb 1-6: New USB device found, idVendor=05ac, idProduct=912f
usb 1-6: New USB device strings: Mfr=0, Product=0, SerialNumber=0
usb 1-6: configuration #1 chosen from 1 choice
hub 1-6:1.0: USB hub found
ATOM BIOS: 113
[drm] Clocks initialized !
radeon 0000:03:00.0: VRAM: 256M 0x00000000 - 0x0FFFFFFF (256M used)
radeon 0000:03:00.0: GTT: 512M 0x10000000 - 0x2FFFFFFF
[drm] Detected VRAM RAM=256M, BAR=256M
[drm] RAM width 256bits DDR
hub 1-6:1.0: 3 ports detected
[TTM] Zone kernel: Available graphics memory: 440730 kiB.
[TTM] Zone highmem: Available graphics memory: 1034518 kiB.
[drm] radeon: 256M of VRAM memory ready
[drm] radeon: 512M of GTT memory ready.
alloc irq_desc for 32 on node -1
alloc kstat_irqs on node -1
radeon 0000:03:00.0: irq 32 for MSI/MSI-X
[drm] radeon: using MSI.
[drm] radeon: irq initialized.
[drm] GART: num cpu pages 131072, num gpu pages 131072
[drm] Loading RV670 Microcode
platform radeon_cp.0: firmware: requesting radeon/RV670_pfp.bin
platform radeon_cp.0: firmware: requesting radeon/RV670_me.bin
platform radeon_cp.0: firmware: requesting radeon/R600_rlc.bin
[drm] ring test succeeded in 1 usecs
[drm] radeon: ib pool ready.
[drm] ib test succeeded in 0 usecs
[drm] Enabling audio support
[drm] Radeon Display Connectors
No connectors reported connected with modes
[drm] Cannot find any crtc or sizes - going 1024x768
[drm] fb mappable at 0xB0141000
[drm] vram apper at 0xB0000000
[drm] size 3145728
[drm] fb depth is 24
[drm] pitch is 4096
Console: switching to colour frame buffer device 128x48
fb0: radeondrmfb frame buffer device
drm: registered panic notifier
Slow work thread pool: Starting up
Slow work thread pool: Ready
[drm] Initialized radeon 2.1.0 20080528 for 0000:03:00.0 on minor 0
radeon 0000:04:00.0: PCI INT A -> Link[AP04] -> GSI 16 (level, low) -> IRQ 16
radeon 0000:04:00.0: setting latency timer to 64
[drm] initializing kernel modesetting (RV670 0x1002:0x950F).
[drm] register mmio base: 0xDCEF0000
[drm] register mmio size: 65536
ATOM BIOS: 113
[drm] Clocks initialized !
radeon 0000:04:00.0: VRAM: 256M 0x00000000 - 0x0FFFFFFF (256M used)
radeon 0000:04:00.0: GTT: 512M 0x10000000 - 0x2FFFFFFF
[drm] Detected VRAM RAM=256M, BAR=256M
[drm] RAM width 256bits DDR
[drm] radeon: 256M of VRAM memory ready
[drm] radeon: 512M of GTT memory ready.
alloc irq_desc for 33 on node -1
alloc kstat_irqs on node -1
radeon 0000:04:00.0: irq 33 for MSI/MSI-X
[drm] radeon: using MSI.
[drm] radeon: irq initialized.
[drm] GART: num cpu pages 131072, num gpu pages 131072
[drm] Loading RV670 Microcode
platform radeon_cp.0: firmware: requesting radeon/RV670_pfp.bin
platform radeon_cp.0: firmware: requesting radeon/RV670_me.bin
platform radeon_cp.0: firmware: requesting radeon/R600_rlc.bin
[drm] ring test succeeded in 1 usecs
[drm] radeon: ib pool ready.
[drm] ib test succeeded in 0 usecs
[drm] Enabling audio support
[drm] Default TV standard: NTSC
[drm] Default TV standard: NTSC
[drm] Default TV standard: NTSC
[drm] Radeon Display Connectors
[drm] Connector 0:
[drm] DVI-I
[drm] HPD1
[drm] DDC: 0x7e50 0x7e50 0x7e54 0x7e54 0x7e58 0x7e58 0x7e5c 0x7e5c
[drm] Encoders:
[drm] DFP1: INTERNAL_KLDSCP_TMDS1
[drm] CRT2: INTERNAL_KLDSCP_DAC2
[drm] Connector 1:
[drm] DIN
[drm] Encoders:
[drm] TV1: INTERNAL_KLDSCP_DAC2
[drm] Connector 2:
[drm] DVI-I
[drm] HPD2
[drm] DDC: 0x7e40 0x7e40 0x7e44 0x7e44 0x7e48 0x7e48 0x7e4c 0x7e4c
[drm] Encoders:
[drm] CRT1: INTERNAL_KLDSCP_DAC1
[drm] DFP2: INTERNAL_LVTM1
usb 2-8: new full speed USB device using ohci_hcd and address 2
[drm] fb mappable at 0xC0141000
[drm] vram apper at 0xC0000000
[drm] size 16384000
[drm] fb depth is 24
[drm] pitch is 10240
fbcon: radeondrmfb (fb1) is primary device
fbcon: Remapping primary device, fb1, to tty 1-63
usb 2-8: New USB device found, idVendor=413c, idProduct=1003
usb 2-8: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 2-8: Product: Dell USB Keyboard Hub
usb 2-8: Manufacturer: Dell
usb 2-8: configuration #1 chosen from 1 choice
hub 2-8:1.0: USB hub found
hub 2-8:1.0: 3 ports detected
usb 1-6.2: new full speed USB device using ehci_hcd and address 4
fb1: radeondrmfb frame buffer device
[drm] Initialized radeon 2.1.0 20080528 for 0000:04:00.0 on minor 1
dracut: Starting plymouth daemon
dracut: rd_NO_DM: removing DM RAID activation
dracut: rd_NO_MD: removing MD RAID activation
sata_nv 0000:00:0e.0: version 3.5
sata_nv 0000:00:0e.0: PCI INT A -> Link[AP17] -> GSI 20 (level, low) -> IRQ 20
sata_nv 0000:00:0e.0: Using SWNCQ mode
sata_nv 0000:00:0e.0: setting latency timer to 64
scsi0 : sata_nv
scsi1 : sata_nv
ata1: SATA max UDMA/133 cmd 0xfe00 ctl 0xfe10 bmdma 0xfec0 irq 20
ata2: SATA max UDMA/133 cmd 0xfe20 ctl 0xfe30 bmdma 0xfec8 irq 20
sata_nv 0000:00:0e.1: PCI INT B -> Link[AP16] -> GSI 23 (level, low) -> IRQ 23
sata_nv 0000:00:0e.1: Using SWNCQ mode
sata_nv 0000:00:0e.1: setting latency timer to 64
scsi2 : sata_nv
scsi3 : sata_nv
ata3: SATA max UDMA/133 cmd 0xfe40 ctl 0xfe50 bmdma 0xfed0 irq 23
ata4: SATA max UDMA/133 cmd 0xfe60 ctl 0xfe70 bmdma 0xfed8 irq 23
sata_nv 0000:00:0e.2: PCI INT C -> Link[AP27] -> GSI 22 (level, low) -> IRQ 22
sata_nv 0000:00:0e.2: Using SWNCQ mode
sata_nv 0000:00:0e.2: setting latency timer to 64
scsi4 : sata_nv
scsi5 : sata_nv
ata5: SATA max UDMA/133 cmd 0xfe80 ctl 0xfe90 bmdma 0xfef0 irq 22
ata6: SATA max UDMA/133 cmd 0xfea0 ctl 0xfeb0 bmdma 0xfef8 irq 22
ata5: SATA link down (SStatus 0 SControl 300)
ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata1.00: ATA-8: SAMSUNG HD321KJ, CP100-11, max UDMA7
ata1.00: 625142448 sectors, multi 8: LBA48 NCQ (depth 31/32)
ata3: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
ata3.00: ATAPI: HL-DT-STDVD-ROM GDRH20N, 0D04, max UDMA/100
ata1.00: configured for UDMA/133
scsi 0:0:0:0: Direct-Access ATA SAMSUNG HD321KJ CP10 PQ: 0 ANSI: 5
ata3.00: configured for UDMA/100
ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata2.00: ATA-7: INTEL SSDSA2M080G2GN, 2CV102HA, max UDMA/133
ata2.00: 156301488 sectors, multi 1: LBA48 NCQ (depth 31/32)
ata2.00: configured for UDMA/133
scsi 1:0:0:0: Direct-Access ATA INTEL SSDSA2M080 2CV1 PQ: 0 ANSI: 5
scsi 2:0:0:0: CD-ROM HL-DT-ST DVD-ROM GDRH20N 0D04 PQ: 0 ANSI: 5
ata4: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
ata4.00: ATAPI: PBDS DVD+/-RW DH-16W1S, 2D14, max UDMA/100
ata4.00: configured for UDMA/100
scsi 3:0:0:0: CD-ROM PBDS DVD+-RW DH-16W1S 2D14 PQ: 0 ANSI: 5
ata6: SATA link down (SStatus 0 SControl 300)
pata_amd 0000:00:0d.0: version 0.4.1
pata_amd 0000:00:0d.0: setting latency timer to 64
scsi6 : pata_amd
scsi7 : pata_amd
ata7: PATA max UDMA/133 cmd 0x1f0 ctl 0x3f6 bmdma 0xecf0 irq 14
ata8: PATA max UDMA/133 cmd 0x170 ctl 0x376 bmdma 0xecf8 irq 15
ata8: port disabled. ignoring.
sr0: scsi3-mmc drive: 48x/48x cd/rw xa/form2 cdda tray
Uniform CD-ROM driver Revision: 3.20
sr 2:0:0:0: Attached scsi CD-ROM sr0
sr1: scsi3-mmc drive: 48x/48x writer cd/rw xa/form2 cdda tray
sr 3:0:0:0: Attached scsi CD-ROM sr1
firewire_ohci 0000:07:0a.0: PCI INT A -> Link[AP02] -> GSI 18 (level, low) -> IRQ 18
firewire_ohci: Added fw-ohci device 0000:07:0a.0, OHCI version 1.10
sd 0:0:0:0: [sda] 625142448 512-byte logical blocks: (320 GB/298 GiB)
sd 1:0:0:0: [sdb] 156301488 512-byte logical blocks: (80.0 GB/74.5 GiB)
sd 1:0:0:0: [sdb] Write Protect is off
sd 1:0:0:0: [sdb] Mode Sense: 00 3a 00 00
sd 1:0:0:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
sdb:
sd 0:0:0:0: [sda] Write Protect is off
sdb1
sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
sd 1:0:0:0: [sdb] Attached SCSI disk
sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
sda: sda1 sda2 sda3
sd 0:0:0:0: [sda] Attached SCSI disk
dracut: Scanning devices sda3 for LVM logical volumes VolGroup00/RHEL500
dracut: inactive '/dev/VolGroup00/RHEL500' [19.53 GiB] inherit
dracut: inactive '/dev/VolGroup00/F700' [19.53 GiB] inherit
dracut: inactive '/dev/VolGroup00/LogVol01' [49.06 GiB] inherit
dracut: inactive '/dev/VolGroup00/LogVol00' [1.94 GiB] inherit
dracut: inactive '/dev/VolGroup00/LVvirt' [99.19 GiB] inherit
dracut: inactive '/dev/VolGroup00/LogVolF12' [39.06 GiB] inherit
firewire_core: created device fw0: GUID 80b9190037db1500, S400
firewire_core: phy config: card 0, new root=ffc1, gap_count=5
EXT4-fs (dm-0): mounted filesystem with ordered data mode
dracut: Mounted root filesystem /dev/mapper/VolGroup00-RHEL500
dracut: Loading SELinux policy
SELinux: 2048 avtab hash slots, 198443 rules.
SELinux: 2048 avtab hash slots, 198443 rules.
SELinux: 9 users, 13 roles, 3307 types, 165 bools, 1 sens, 1024 cats
SELinux: 77 classes, 198443 rules
SELinux: Completing initialization.
SELinux: Setting up existing superblocks.
SELinux: initialized (dev dm-0, type ext4), uses xattr
SELinux: initialized (dev tmpfs, type tmpfs), uses transition SIDs
SELinux: initialized (dev securityfs, type securityfs), uses genfs_contexts
SELinux: initialized (dev usbfs, type usbfs), uses genfs_contexts
SELinux: initialized (dev selinuxfs, type selinuxfs), uses genfs_contexts
SELinux: initialized (dev mqueue, type mqueue), uses transition SIDs
SELinux: initialized (dev hugetlbfs, type hugetlbfs), uses transition SIDs
SELinux: initialized (dev devpts, type devpts), uses transition SIDs
SELinux: initialized (dev inotifyfs, type inotifyfs), uses genfs_contexts
SELinux: initialized (dev anon_inodefs, type anon_inodefs), uses genfs_contexts
SELinux: initialized (dev pipefs, type pipefs), uses task SIDs
SELinux: initialized (dev debugfs, type debugfs), uses genfs_contexts
SELinux: initialized (dev sockfs, type sockfs), uses task SIDs
SELinux: initialized (dev devtmpfs, type devtmpfs), uses transition SIDs
SELinux: initialized (dev tmpfs, type tmpfs), uses transition SIDs
SELinux: initialized (dev proc, type proc), uses genfs_contexts
SELinux: initialized (dev bdev, type bdev), uses genfs_contexts
SELinux: initialized (dev rootfs, type rootfs), uses genfs_contexts
SELinux: initialized (dev sysfs, type sysfs), uses genfs_contexts
type=1403 audit(1280790756.953:2): policy loaded auid=4294967295 ses=4294967295
dracut:
dracut: Switching root
udev: starting version 147
i2c i2c-2: nForce2 SMBus adapter at 0x5000
i2c i2c-3: nForce2 SMBus adapter at 0x5100
tg3.c:v3.108 (February 17, 2010)
tg3 0000:06:00.0: PCI INT A -> Link[AP06] -> GSI 18 (level, low) -> IRQ 18
tg3 0000:06:00.0: setting latency timer to 64
eth0: Tigon3 [partno(BCM95751) rev 4201] (PCI Express) MAC address 00:19:b9:15:db:37
eth0: attached PHY is 5750 (10/100/1000Base-T Ethernet) (WireSpeed[1])
eth0: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[0] TSOcap[1]
eth0: dma_rwctrl[76180000] dma_mask[64-bit]
HDA Intel 0000:00:0f.1: PCI INT B -> Link[AP23] -> GSI 21 (level, low) -> IRQ 21
hda_intel: Disable MSI for Nvidia chipset
HDA Intel 0000:00:0f.1: setting latency timer to 64
input: HDA NVidia Line In at Ext Rear Jack as /devices/pci0000:00/0000:00:0f.1/sound/card0/input3
input: HDA NVidia Mic at Ext Front Jack as /devices/pci0000:00/0000:00:0f.1/sound/card0/input4
input: HDA NVidia Mic at Ext Rear Jack as /devices/pci0000:00/0000:00:0f.1/sound/card0/input5
input: HDA NVidia Line Out at Ext Rear Jack as /devices/pci0000:00/0000:00:0f.1/sound/card0/input6
input: HDA NVidia Line Out at Ext Rear Jack as /devices/pci0000:00/0000:00:0f.1/sound/card0/input7
input: HDA NVidia Line Out at Ext Rear Jack as /devices/pci0000:00/0000:00:0f.1/sound/card0/input8
input: HDA NVidia Line Out at Ext Rear Jack as /devices/pci0000:00/0000:00:0f.1/sound/card0/input9
input: HDA NVidia HP Out at Ext Front Jack as /devices/pci0000:00/0000:00:0f.1/sound/card0/input10
HDA Intel 0000:04:00.1: PCI INT B -> Link[AP05] -> GSI 17 (level, low) -> IRQ 17
alloc irq_desc for 34 on node -1
alloc kstat_irqs on node -1
HDA Intel 0000:04:00.1: irq 34 for MSI/MSI-X
HDA Intel 0000:04:00.1: setting latency timer to 64
dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.2)
sd 0:0:0:0: Attached scsi generic sg0 type 0
sd 1:0:0:0: Attached scsi generic sg1 type 0
sr 2:0:0:0: Attached scsi generic sg2 type 5
sr 3:0:0:0: Attached scsi generic sg3 type 5
usb 1-6.2: New USB device found, idVendor=05ac, idProduct=9221
usb 1-6.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 1-6.2: Product: Apple Cinema HD Display
usb 1-6.2: Manufacturer: Apple Computer, Inc.
usb 1-6.2: configuration #1 chosen from 1 choice
generic-usb 0003:05AC:9221.0001: hiddev96,hidraw0: USB HID v1.11 Device [Apple Computer, Inc. Apple Cinema HD Display] on usb-0000:00:0b.1-6.2/input0
usb 2-8.1: new full speed USB device using ohci_hcd and address 3
usb 2-8.1: New USB device found, idVendor=413c, idProduct=2010
usb 2-8.1: New USB device strings: Mfr=1, Product=3, SerialNumber=0
usb 2-8.1: Product: Dell USB Keyboard
usb 2-8.1: Manufacturer: Dell
usb 2-8.1: configuration #1 chosen from 1 choice
input: Dell Dell USB Keyboard as /devices/pci0000:00/0000:00:0b.0/usb2/2-8/2-8.1/2-8.1:1.0/input/input11
generic-usb 0003:413C:2010.0002: input,hidraw1: USB HID v1.10 Keyboard [Dell Dell USB Keyboard] on usb-0000:00:0b.0-8.1/input0
input: Dell Dell USB Keyboard as /devices/pci0000:00/0000:00:0b.0/usb2/2-8/2-8.1/2-8.1:1.1/input/input12
generic-usb 0003:413C:2010.0003: input,hidraw2: USB HID v1.10 Device [Dell Dell USB Keyboard] on usb-0000:00:0b.0-8.1/input1
usb 2-8.2: new low speed USB device using ohci_hcd and address 4
usb 2-8.2: New USB device found, idVendor=0461, idProduct=4d15
usb 2-8.2: New USB device strings: Mfr=0, Product=2, SerialNumber=0
usb 2-8.2: Product: USB Optical Mouse
usb 2-8.2: configuration #1 chosen from 1 choice
input: USB Optical Mouse as /devices/pci0000:00/0000:00:0b.0/usb2/2-8/2-8.2/2-8.2:1.0/input/input13
generic-usb 0003:0461:4D15.0004: input,hidraw3: USB HID v1.11 Mouse [USB Optical Mouse] on usb-0000:00:0b.0-8.2/input0
kjournald starting. Commit interval 5 seconds
EXT3 FS on sda2, internal journal
EXT3-fs: mounted filesystem with ordered data mode.
SELinux: initialized (dev sda2, type ext3), uses xattr
kjournald starting. Commit interval 5 seconds
EXT3 FS on dm-2, internal journal
EXT3-fs: mounted filesystem with ordered data mode.
SELinux: initialized (dev dm-2, type ext3), uses xattr
Btrfs loaded
device fsid da47d71df5df7585-ed28d13e6c2fdf8b devid 1 transid 11898 /dev/sdb1
Btrfs detected SSD devices, enabling SSD mode
SELinux: initialized (dev sdb1, type btrfs), uses xattr
Adding 2031608k swap on /dev/mapper/VolGroup00-LogVol00. Priority:-1 extents:1 across:2031608k
SELinux: initialized (dev binfmt_misc, type binfmt_misc), uses genfs_contexts
NET: Registered protocol family 10
lo: Disabled Privacy Extensions
ip6_tables: (C) 2000-2006 Netfilter Core Team
nf_conntrack version 0.5.0 (16384 buckets, 65536 max)
ip_tables: (C) 2000-2006 Netfilter Core Team
alloc irq_desc for 35 on node -1
alloc kstat_irqs on node -1
tg3 0000:06:00.0: irq 35 for MSI/MSI-X
ADDRCONF(NETDEV_UP): eth0: link is not ready
tg3: eth0: Link is up at 1000 Mbps, full duplex.
tg3: eth0: Flow control is on for TX and on for RX.
ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
SELinux: initialized (dev autofs, type autofs), uses genfs_contexts
SELinux: initialized (dev autofs, type autofs), uses genfs_contexts
SELinux: initialized (dev autofs, type autofs), uses genfs_contexts
eth0: no IPv6 routers present
hda-intel: IRQ timing workaround is activated for card #1. Suggest a bigger bdl_pos_adj.
fuse init (API version 7.13)
[-- Attachment #3: 2.6.35-debuglog --]
[-- Type: application/octet-stream, Size: 26191 bytes --]
Linux version 2.6.35+ (airlied@clockmaker-el6) (gcc version 4.4.4 20100726 (Red Hat 4.4.4-13) (GCC) ) #34 SMP Mon Aug 2 14:29:28 EST 2010
BIOS-provided physical RAM map:
BIOS-e820: 0000000000000000 - 000000000009fc00 (usable)
BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved)
BIOS-e820: 0000000000100000 - 000000007fdbcc00 (usable)
BIOS-e820: 000000007fdbcc00 - 000000007fdbec00 (ACPI NVS)
BIOS-e820: 000000007fdbec00 - 000000007fdc0c00 (ACPI data)
BIOS-e820: 000000007fdc0c00 - 0000000080000000 (reserved)
BIOS-e820: 00000000e0000000 - 00000000f0000000 (reserved)
BIOS-e820: 00000000fec00000 - 00000000fed01000 (reserved)
BIOS-e820: 00000000fee00000 - 00000000fef00000 (reserved)
BIOS-e820: 00000000ffb00000 - 0000000100000000 (reserved)
NX (Execute Disable) protection: active
DMI 2.3 present.
e820 update range: 0000000000000000 - 0000000000001000 (usable) ==> (reserved)
e820 remove range: 00000000000a0000 - 0000000000100000 (usable)
last_pfn = 0x7fdbc max_arch_pfn = 0x1000000
MTRR default type: uncachable
MTRR fixed ranges enabled:
00000-9FFFF write-back
A0000-BFFFF uncachable
C0000-DFFFF write-protect
E0000-EFFFF uncachable
F0000-FFFFF write-back
MTRR variable ranges enabled:
0 base 000000000 mask F80000000 write-back
1 base 07FF00000 mask FFFF00000 uncachable
2 disabled
3 disabled
4 disabled
5 disabled
6 disabled
7 disabled
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
e820 update range: 0000000000002000 - 0000000000010000 (usable) ==> (reserved)
Scanning 1 areas for low memory corruption
modified physical RAM map:
modified: 0000000000000000 - 0000000000001000 (reserved)
modified: 0000000000001000 - 0000000000002000 (usable)
modified: 0000000000002000 - 0000000000010000 (reserved)
modified: 0000000000010000 - 000000000009fc00 (usable)
modified: 00000000000f0000 - 0000000000100000 (reserved)
modified: 0000000000100000 - 000000007fdbcc00 (usable)
modified: 000000007fdbcc00 - 000000007fdbec00 (ACPI NVS)
modified: 000000007fdbec00 - 000000007fdc0c00 (ACPI data)
modified: 000000007fdc0c00 - 0000000080000000 (reserved)
modified: 00000000e0000000 - 00000000f0000000 (reserved)
modified: 00000000fec00000 - 00000000fed01000 (reserved)
modified: 00000000fee00000 - 00000000fef00000 (reserved)
modified: 00000000ffb00000 - 0000000100000000 (reserved)
initial memory mapped : 0 - 00e00000
Scan SMP from c0000000 for 1024 bytes.
Scan SMP from c009fc00 for 1024 bytes.
Scan SMP from c00f0000 for 65536 bytes.
found SMP MP-table at [c00fe710] fe710
mpc: f0000-f024c
init_memory_mapping: 0000000000000000-00000000379fe000
0000000000 - 0000200000 page 4k
0000200000 - 0037800000 page 2M
0037800000 - 00379fe000 page 4k
kernel direct mapping tables up to 379fe000 @ 11000-17000
RAMDISK: 37181000 - 37ff0000
Allocated new RAMDISK: 00955000 - 017c3566
Move RAMDISK from 0000000037181000 - 0000000037fef565 to 00955000 - 017c3565
1155MB HIGHMEM available.
889MB LOWMEM available.
mapped low ram: 0 - 379fe000
low ram: 0 - 379fe000
Zone PFN ranges:
DMA 0x00000001 -> 0x00001000
Normal 0x00001000 -> 0x000379fe
HighMem 0x000379fe -> 0x0007fdbc
Movable zone start PFN for each node
early_node_map[3] active PFN ranges
0: 0x00000001 -> 0x00000002
0: 0x00000010 -> 0x0000009f
0: 0x00000100 -> 0x0007fdbc
On node 0 totalpages: 523596
free_area_init_node: node 0, pgdat c0860580, node_mem_map c17c5020
DMA zone: 32 pages used for memmap
DMA zone: 0 pages reserved
DMA zone: 3952 pages, LIFO batch:0
Normal zone: 1748 pages used for memmap
Normal zone: 221994 pages, LIFO batch:31
HighMem zone: 2312 pages used for memmap
HighMem zone: 293558 pages, LIFO batch:31
Using APIC driver default
Intel MultiProcessor Specification v1.4
Virtual Wire compatibility mode.
mpc: f0000-f024c
MPTABLE: OEM ID: DELL
MPTABLE: Product ID: Dell XPS710
MPTABLE: APIC at: 0xFEE00000
Processor #0 (Bootup-CPU)
Processor #1
Bus #0 is PCI
Bus #1 is PCI
Bus #2 is PCI
Bus #3 is PCI
Bus #4 is PCI
Bus #5 is PCI
Bus #6 is PCI
Bus #7 is PCI
Bus #8 is PCI
Bus #9 is PCI
Bus #10 is ISA
I/O APIC #8 Version 17 at 0xFEC00000.
IOAPIC[0]: apic_id 8, version 17, address 0xfec00000, GSI 0-23
Int: type 0, pol 0, trig 0, bus 0a, IRQ 00, APIC ID 8, APIC INT 00
Int: type 0, pol 0, trig 0, bus 0a, IRQ 01, APIC ID 8, APIC INT 01
Int: type 3, pol 1, trig 1, bus 0a, IRQ 00, APIC ID 8, APIC INT 02
Int: type 0, pol 0, trig 0, bus 0a, IRQ 03, APIC ID 8, APIC INT 03
Int: type 0, pol 0, trig 0, bus 0a, IRQ 04, APIC ID 8, APIC INT 04
Int: type 0, pol 0, trig 0, bus 0a, IRQ 05, APIC ID 8, APIC INT 05
Int: type 0, pol 0, trig 0, bus 0a, IRQ 06, APIC ID 8, APIC INT 06
Int: type 0, pol 0, trig 0, bus 0a, IRQ 07, APIC ID 8, APIC INT 07
Int: type 0, pol 0, trig 0, bus 0a, IRQ 08, APIC ID 8, APIC INT 08
Int: type 0, pol 0, trig 0, bus 0a, IRQ 09, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0a, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0b, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0c, APIC ID 8, APIC INT 0c
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0e, APIC ID 8, APIC INT 0e
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0f, APIC ID 8, APIC INT 0f
Int: type 0, pol 0, trig 0, bus 00, IRQ 28, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 00, IRQ 2c, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 00, IRQ 2d, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 00, IRQ 34, APIC ID 8, APIC INT 0e
Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 00, IRQ 34, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 01, IRQ 00, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 01, IRQ 01, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 01, IRQ 02, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 03, IRQ 00, APIC ID 0, APIC INT 10
Int: type 0, pol 0, trig 0, bus 04, IRQ 00, APIC ID 0, APIC INT 10
Int: type 0, pol 0, trig 0, bus 04, IRQ 01, APIC ID 0, APIC INT 11
Int: type 0, pol 0, trig 0, bus 05, IRQ 00, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 05, IRQ 01, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 05, IRQ 03, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 06, IRQ 00, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 07, IRQ 0c, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 07, IRQ 0e, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 07, IRQ 0f, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 07, IRQ 10, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 07, IRQ 11, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 07, IRQ 12, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 07, IRQ 14, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 07, IRQ 15, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 07, IRQ 17, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 07, IRQ 28, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 08, IRQ 00, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 08, IRQ 01, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 08, IRQ 03, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 09, IRQ 00, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 09, IRQ 01, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 09, IRQ 02, APIC ID 8, APIC INT 09
Lint: type 3, pol 1, trig 1, bus 0a, IRQ 00, APIC ID ff, APIC LINT 00
Lint: type 1, pol 1, trig 1, bus 0a, IRQ 00, APIC ID ff, APIC LINT 01
Processors: 2
SMP: Allowing 2 CPUs, 0 hotplug CPUs
mapped APIC to ffffb000 (fee00000)
mapped IOAPIC to ffffa000 (fec00000)
nr_irqs_gsi: 40
early_res array is doubled to 64 at [12000 - 127ff]
Allocating PCI resources starting at 80000000 (gap: 80000000:60000000)
setup_percpu: NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:2 nr_node_ids:1
PERCPU: Embedded 16 pages/cpu @c2800000 s41856 r0 d23680 u1048576
pcpu-alloc: s41856 r0 d23680 u1048576 alloc=1*2097152
pcpu-alloc: [0] 0 1
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 519504
Kernel command line: ro root=/dev/mapper/VolGroup00-RHEL500 rd_LVM_LV=VolGroup00/RHEL500 rd_NO_LUKS rd_NO_MD rd_NO_DM LANG=en_US.UTF-8 SYSFONT=latarcyrheb-sun16 KEYBOARDTYPE=pc KEYTABLE=us debug apic=debug pci=routeirq console=ttyS0,115200
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Initializing CPU#0
Subtract (45 early reservations)
#1 [0000001000 - 0000002000] EX TRAMPOLINE
#2 [0000400000 - 000094ca1c] TEXT DATA BSS
#3 [000094d000 - 00009541c8] BRK
#4 [00000fe720 - 0000100000] BIOS reserved
#5 [00000fe710 - 00000fe720] MP-table mpf
#6 [000009fc00 - 00000f0000] BIOS reserved
#7 [00000f024c - 00000fe710] BIOS reserved
#8 [00000f0000 - 00000f024c] MP-table mpc
#9 [0000010000 - 0000011000] TRAMPOLINE
#10 [0000011000 - 0000012000] PGTABLE
#11 [0000955000 - 00017c4000] NEW RAMDISK
#12 [00017c4000 - 00017c5000] BOOTMEM
#13 [00017c5000 - 00027c5000] BOOTMEM
#14 [00027c5000 - 00027c5004] BOOTMEM
#15 [00027c5040 - 00027c5100] BOOTMEM
#16 [00027c5100 - 00027c51a4] BOOTMEM
#17 [00027c51c0 - 00027c81c0] BOOTMEM
#18 [00027c81c0 - 00027c829c] BOOTMEM
#19 [00027c82c0 - 00027ce2c0] BOOTMEM
#20 [00027ce2c0 - 00027ce2ef] BOOTMEM
#21 [00027ce300 - 00027ce4d4] BOOTMEM
#22 [00027ce500 - 00027ce540] BOOTMEM
#23 [00027ce540 - 00027ce580] BOOTMEM
#24 [00027ce580 - 00027ce5c0] BOOTMEM
#25 [00027ce5c0 - 00027ce600] BOOTMEM
#26 [00027ce600 - 00027ce640] BOOTMEM
#27 [00027ce640 - 00027ce680] BOOTMEM
#28 [00027ce680 - 00027ce6c0] BOOTMEM
#29 [00027ce6c0 - 00027ce700] BOOTMEM
#30 [00027ce700 - 00027ce740] BOOTMEM
#31 [00027ce740 - 00027ce780] BOOTMEM
#32 [00027ce780 - 00027ce85b] BOOTMEM
#33 [00027ce880 - 00027ce95b] BOOTMEM
#34 [0002800000 - 0002810000] BOOTMEM
#35 [0002900000 - 0002910000] BOOTMEM
#36 [00027d0980 - 00027d0984] BOOTMEM
#37 [00027d09c0 - 00027d09c4] BOOTMEM
#38 [00027d0a00 - 00027d0a08] BOOTMEM
#39 [00027d0a40 - 00027d0a48] BOOTMEM
#40 [00027d0a80 - 00027d0b20] BOOTMEM
#41 [00027d0b40 - 00027d0b88] BOOTMEM
#42 [00027d0bc0 - 00027d4bc0] BOOTMEM
#43 [0002810000 - 0002890000] BOOTMEM
#44 [0002890000 - 00028d0000] BOOTMEM
Initializing HighMem for node 0 (000379fe:0007fdbc)
Memory: 2056788k/2094832k available (2753k kernel code, 37596k reserved, 1761k data, 360k init, 1183480k highmem)
virtual kernel memory layout:
fixmap : 0xffe70000 - 0xfffff000 (1596 kB)
pkmap : 0xffa00000 - 0xffc00000 (2048 kB)
vmalloc : 0xf81fe000 - 0xff9fe000 ( 120 MB)
lowmem : 0xc0000000 - 0xf79fe000 ( 889 MB)
.init : 0xc0869000 - 0xc08c3000 ( 360 kB)
.data : 0xc06b05fd - 0xc0868ac8 (1761 kB)
.text : 0xc0400000 - 0xc06b05fd (2753 kB)
Checking if this processor honours the WP bit even in supervisor mode...Ok.
SLUB: Genslabs=13, HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
Hierarchical RCU implementation.
RCU-based detection of stalled CPUs is disabled.
Verbose stalled-CPUs detection is disabled.
NR_IRQS:512
CPU 0 irqstacks, hard=c2800000 soft=c2801000
spurious 8259A interrupt: IRQ7.
Console: colour VGA+ 80x25
console [ttyS0] enabled
Fast TSC calibration using PIT
Detected 2660.493 MHz processor.
Calibrating delay loop (skipped), value calculated using timer frequency.. 5320.98 BogoMIPS (lpj=2660493)
pid_max: default: 32768 minimum: 301
Security Framework initialized
SELinux: Initializing.
SELinux: Starting in permissive mode
Mount-cache hash table entries: 512
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
mce: CPU supports 6 MCE banks
CPU0: Thermal monitoring enabled (TM2)
using mwait in idle threads.
Performance Events: PEBS fmt0-, Core2 events, Intel PMU driver.
PEBS disabled due to CPU errata.
... version: 2
... bit width: 40
... generic registers: 2
... value mask: 000000ffffffffff
... max period: 000000007fffffff
... fixed-purpose events: 3
... event mask: 0000000700000003
Enabling APIC mode: Flat. Using 1 I/O APICs
Getting VERSION: 50014
Getting VERSION: 50014
Getting ID: 0
Getting ID: 0
enabled ExtINT on CPU#0
ExtINT not setup in hardware but reported by MP table
ESR value before enabling vector: 0x00000040 after: 0x00000000
ENABLING IO-APIC IRQs
init IO_APIC IRQs
IOAPIC[0]: Set routing entry (8-0 -> 0x30 -> IRQ 0 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-1 -> 0x31 -> IRQ 1 Mode:0 Active:0)
8-2 (apicid-pin) not connected
IOAPIC[0]: Set routing entry (8-3 -> 0x33 -> IRQ 3 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-4 -> 0x34 -> IRQ 4 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-5 -> 0x35 -> IRQ 5 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-6 -> 0x36 -> IRQ 6 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-7 -> 0x37 -> IRQ 7 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-8 -> 0x38 -> IRQ 8 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-9 -> 0x39 -> IRQ 9 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-10 -> 0x3a -> IRQ 10 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-11 -> 0x3b -> IRQ 11 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-12 -> 0x3c -> IRQ 12 Mode:0 Active:0)
8-13 (apicid-pin) not connected
IOAPIC[0]: Set routing entry (8-14 -> 0x3e -> IRQ 14 Mode:0 Active:0)
IOAPIC[0]: Set routing entry (8-15 -> 0x3f -> IRQ 15 Mode:0 Active:0)
8-16 8-17 8-18 8-19 8-20 8-21 8-22 8-23 (apicid-pin) not connected
..TIMER: vector=0x30 apic1=0 pin1=0 apic2=0 pin2=2
..MP-BIOS bug: 8254 timer not connected to IO-APIC
...trying to set up timer (IRQ0) through the 8259A ...
..... (found apic 0 pin 2) ...
....... works.
CPU0: Intel(R) Core(TM)2 CPU 6700 @ 2.66GHz stepping 06
Using local APIC timer interrupts.
calibrating APIC timer ...
... lapic delta = 1662258
..... delta 1662258
..... mult: 71404290
..... calibration result: 265961
..... CPU clock speed is 2659.0613 MHz.
..... host bus clock speed is 265.0961 MHz.
... verify APIC timer
... jiffies delta = 100
... jiffies result ok
CPU 1 irqstacks, hard=c2900000 soft=c2901000
Booting Node 0, Processors #1 Ok.
Initializing CPU#1
masked ExtINT on CPU#1
Brought up 2 CPUs
Total of 2 processors activated (10640.11 BogoMIPS).
khelper used greatest stack depth: 3252 bytes left
Dell XPS710 series board detected. Selecting BIOS-method for reboots.
NET: Registered protocol family 16
PCI: PCI BIOS revision 2.10 entry at 0xfbc45, last bus=9
PCI: Using configuration type 1 for base access
khelper used greatest stack depth: 3216 bytes left
bio: create slab <bio-0> at 0
vgaarb: loaded
SCSI subsystem initialized
libata version 3.00 loaded.
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI: Probing PCI hardware
PCI: Probing PCI hardware (bus 00)
pci 0000:00:02.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:02.0: PME# disabled
pci 0000:00:04.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:04.0: PME# disabled
pci 0000:00:05.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:05.0: PME# disabled
pci 0000:00:0a.0: reg 18: [io 0x4f00-0x4fff]
HPET not enabled in BIOS. You might try hpet=force boot option
pci 0000:00:0a.1: reg 10: [io 0x4c00-0x4c3f]
pci 0000:00:0a.1: reg 20: [io 0x5000-0x503f]
pci 0000:00:0a.1: reg 24: [io 0x5100-0x513f]
pci 0000:00:0a.1: PME# supported from D3hot D3cold
pci 0000:00:0a.1: PME# disabled
pci 0000:00:0b.0: reg 10: [mem 0xdfff8000-0xdfff8fff]
pci 0000:00:0b.0: supports D1 D2
pci 0000:00:0b.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:0b.0: PME# disabled
pci 0000:00:0b.1: reg 10: [mem 0xdfff7f00-0xdfff7fff]
pci 0000:00:0b.1: supports D1 D2
pci 0000:00:0b.1: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:0b.1: PME# disabled
pci 0000:00:0d.0: reg 20: [io 0xecf0-0xecff]
pci 0000:00:0e.0: reg 10: [io 0xfe00-0xfe07]
pci 0000:00:0e.0: reg 14: [io 0xfe10-0xfe13]
pci 0000:00:0e.0: reg 18: [io 0xfe20-0xfe27]
pci 0000:00:0e.0: reg 1c: [io 0xfe30-0xfe33]
pci 0000:00:0e.0: reg 20: [io 0xfec0-0xfecf]
pci 0000:00:0e.0: reg 24: [mem 0xdfff9000-0xdfff9fff]
pci 0000:00:0e.1: reg 10: [io 0xfe40-0xfe47]
pci 0000:00:0e.1: reg 14: [io 0xfe50-0xfe53]
pci 0000:00:0e.1: reg 18: [io 0xfe60-0xfe67]
pci 0000:00:0e.1: reg 1c: [io 0xfe70-0xfe73]
pci 0000:00:0e.1: reg 20: [io 0xfed0-0xfedf]
pci 0000:00:0e.1: reg 24: [mem 0xdfffa000-0xdfffafff]
pci 0000:00:0e.2: reg 10: [io 0xfe80-0xfe87]
pci 0000:00:0e.2: reg 14: [io 0xfe90-0xfe93]
pci 0000:00:0e.2: reg 18: [io 0xfea0-0xfea7]
pci 0000:00:0e.2: reg 1c: [io 0xfeb0-0xfeb3]
pci 0000:00:0e.2: reg 20: [io 0xfef0-0xfeff]
pci 0000:00:0e.2: reg 24: [mem 0xdfffb000-0xdfffbfff]
pci 0000:00:0f.1: reg 10: [mem 0xdfffc000-0xdfffffff]
pci 0000:00:0f.1: PME# supported from D3hot D3cold
pci 0000:00:0f.1: PME# disabled
pci 0000:00:13.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:13.0: PME# disabled
pci 0000:00:18.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:00:18.0: PME# disabled
pci 0000:01:00.0: reg 10: [mem 0xdefe0000-0xdeffffff]
pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
pci 0000:01:00.0: PME# disabled
pci 0000:00:02.0: PCI bridge to [bus 01-04]
pci 0000:00:02.0: bridge window [io 0xc000-0xdfff]
pci 0000:00:02.0: bridge window [mem 0xdc000000-0xdeffffff]
pci 0000:00:02.0: bridge window [mem 0xb0000000-0xcfffffff 64bit pref]
pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
pci 0000:02:00.0: PME# disabled
pci 0000:02:0c.0: PME# supported from D0 D3hot D3cold
pci 0000:02:0c.0: PME# disabled
pci 0000:01:00.0: PCI bridge to [bus 02-04]
pci 0000:01:00.0: bridge window [io 0xc000-0xdfff]
pci 0000:01:00.0: bridge window [mem 0xdc000000-0xddffffff]
pci 0000:01:00.0: bridge window [mem 0xb0000000-0xcfffffff 64bit pref]
pci 0000:03:00.0: reg 10: [mem 0xb0000000-0xbfffffff 64bit pref]
pci 0000:03:00.0: reg 18: [mem 0xddef0000-0xddefffff 64bit]
pci 0000:03:00.0: reg 20: [io 0xdc00-0xdcff]
pci 0000:03:00.0: reg 30: [mem 0xddf00000-0xddf1ffff pref]
pci 0000:03:00.0: supports D1 D2
pci 0000:02:00.0: PCI bridge to [bus 03-03]
pci 0000:02:00.0: bridge window [io 0xd000-0xdfff]
pci 0000:02:00.0: bridge window [mem 0xdd000000-0xddffffff]
pci 0000:02:00.0: bridge window [mem 0xb0000000-0xbfffffff 64bit pref]
pci 0000:04:00.0: reg 10: [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:04:00.0: reg 18: [mem 0xdcef0000-0xdcefffff 64bit]
pci 0000:04:00.0: reg 20: [io 0xcc00-0xccff]
pci 0000:04:00.0: reg 30: [mem 0xdcf00000-0xdcf1ffff pref]
pci 0000:04:00.0: supports D1 D2
pci 0000:04:00.1: reg 10: [mem 0xdceec000-0xdceeffff 64bit]
pci 0000:04:00.1: supports D1 D2
pci 0000:02:0c.0: PCI bridge to [bus 04-04]
pci 0000:02:0c.0: bridge window [io 0xc000-0xcfff]
pci 0000:02:0c.0: bridge window [mem 0xdc000000-0xdcffffff]
pci 0000:02:0c.0: bridge window [mem 0xc0000000-0xcfffffff 64bit pref]
pci 0000:00:04.0: PCI bridge to [bus 05-05]
pci 0000:00:04.0: bridge window [io 0xf000-0x0000] (disabled)
pci 0000:00:04.0: bridge window [mem 0xfff00000-0x000fffff] (disabled)
pci 0000:00:04.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:06:00.0: reg 10: [mem 0xdbff0000-0xdbffffff 64bit]
pci 0000:06:00.0: PME# supported from D3hot D3cold
pci 0000:06:00.0: PME# disabled
pci 0000:06:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'
pci 0000:00:05.0: PCI bridge to [bus 06-06]
pci 0000:00:05.0: bridge window [io 0xf000-0x0000] (disabled)
pci 0000:00:05.0: bridge window [mem 0xdb000000-0xdbffffff]
pci 0000:00:05.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:07:0a.0: reg 10: [mem 0xdaffb800-0xdaffbfff]
pci 0000:07:0a.0: reg 14: [mem 0xdaffc000-0xdaffffff]
pci 0000:07:0a.0: supports D1 D2
pci 0000:07:0a.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:07:0a.0: PME# disabled
pci 0000:00:0f.0: PCI bridge to [bus 07-07] (subtractive decode)
pci 0000:00:0f.0: bridge window [io 0xf000-0x0000] (disabled)
pci 0000:00:0f.0: bridge window [mem 0xda000000-0xdaffffff]
pci 0000:00:0f.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:00:0f.0: bridge window [io 0x0000-0xffff] (subtractive decode)
pci 0000:00:0f.0: bridge window [mem 0x00000000-0xffffffffffffffff] (subtractive decode)
pci 0000:00:13.0: PCI bridge to [bus 08-08]
pci 0000:00:13.0: bridge window [io 0xf000-0x0000] (disabled)
pci 0000:00:13.0: bridge window [mem 0xfff00000-0x000fffff] (disabled)
pci 0000:00:13.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
pci 0000:00:18.0: PCI bridge to [bus 09-09]
pci 0000:00:18.0: bridge window [io 0xf000-0x0000] (disabled)
pci 0000:00:18.0: bridge window [mem 0xfff00000-0x000fffff] (disabled)
pci 0000:00:18.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled)
vgaarb: device added: PCI:0000:04:00.0,decodes=io+mem,owns=io+mem,locks=none
pci 0000:00:0a.0: default IRQ router [10de:0360]
PCI: Routing PCI interrupts for all devices because "pci=routeirq" specified
querying PCI -> IRQ mapping bus:0, slot:10, pin:0.
IOAPIC[0]: Set routing entry (8-9 -> 0x29 -> IRQ 33 Mode:1 Active:1)
pci 0000:00:0a.1: PCI->APIC IRQ transform: INT A -> IRQ 33
querying PCI -> IRQ mapping bus:0, slot:11, pin:0.
IOAPIC[0]: Set routing entry (8-10 -> 0x41 -> IRQ 34 Mode:1 Active:1)
pci 0000:00:0b.0: PCI->APIC IRQ transform: INT A -> IRQ 34
querying PCI -> IRQ mapping bus:0, slot:11, pin:1.
pci 0000:00:0b.1: PCI->APIC IRQ transform: INT B -> IRQ 34
querying PCI -> IRQ mapping bus:0, slot:14, pin:0.
IOAPIC[0]: Set routing entry (8-11 -> 0x49 -> IRQ 35 Mode:1 Active:1)
pci 0000:00:0e.0: PCI->APIC IRQ transform: INT A -> IRQ 35
querying PCI -> IRQ mapping bus:0, slot:14, pin:1.
pci 0000:00:0e.1: PCI->APIC IRQ transform: INT B -> IRQ 35
querying PCI -> IRQ mapping bus:0, slot:14, pin:2.
pci 0000:00:0e.2: PCI->APIC IRQ transform: INT C -> IRQ 35
querying PCI -> IRQ mapping bus:0, slot:15, pin:1.
pci 0000:00:0f.1: can't find IRQ for PCI INT B; probably buggy MP table
querying PCI -> IRQ mapping bus:1, slot:0, pin:0.
pci 0000:01:00.0: PCI->APIC IRQ transform: INT A -> IRQ 35
querying PCI -> IRQ mapping bus:2, slot:0, pin:0.
querying PCI -> IRQ mapping bus:1, slot:0, pin:0.
pci 0000:02:00.0: using bridge 0000:01:00.0 INT A to get IRQ 35
pci 0000:02:00.0: PCI->APIC IRQ transform: INT A -> IRQ 35
querying PCI -> IRQ mapping bus:2, slot:12, pin:0.
querying PCI -> IRQ mapping bus:1, slot:0, pin:0.
pci 0000:02:0c.0: using bridge 0000:01:00.0 INT A to get IRQ 35
pci 0000:02:0c.0: PCI->APIC IRQ transform: INT A -> IRQ 35
querying PCI -> IRQ mapping bus:3, slot:0, pin:0.
IOAPIC[1]: Set routing entry (0-16 -> 0x51 -> IRQ 16 Mode:1 Active:1)
BUG: unable to handle kernel paging request at ffff9000
IP: [<c0417511>] ioapic_write_entry+0x41/0x7a
*pdpt = 00000000008ca001 *pde = 00000000008cb067 *pte = 0000000000000000
Oops: 0002 [#1] SMP
last sysfs file:
Modules linked in:
Pid: 1, comm: swapper Not tainted 2.6.35+ #34 0UY253/Dell XPS710
EIP: 0060:[<c0417511>] EFLAGS: 00010086 CPU: 1
EIP is at ioapic_write_entry+0x41/0x7a
EAX: 00000282 EBX: 00000001 ECX: ffff9000 EDX: 03000000
ESI: 00000010 EDI: 00006000 EBP: 00000031 ESP: f7429f08
DS: 007b ES: 007b FS: 00d8 GS: 0000 SS: 0068
Process swapper (pid: 1, ti=f7429000 task=f7440000 task.ti=f7429000)
Stack:
0001a951 c08d427c 00000010 c07a6f7e 00000001 c0417857 0001a951 03000000
<0> 00000001 00000010 0001a951 03000000 00000001 00000010 c0827380 ffffffff
<0> c041793c c0827380 00000001 00000001 00000001 00000010 00000001 f7590000
Call Trace:
[<c0417857>] ? setup_IO_APIC_irq+0x270/0x27a
[<c041793c>] ? io_apic_set_pci_routing+0xdb/0xea
[<c0627d39>] ? pirq_enable_irq+0x16d/0x208
[<c056b3be>] ? pci_get_subsys+0x90/0x9e
[<c088e279>] ? pcibios_irq_init+0x26b/0x283
[<c088dac6>] ? pci_subsys_init+0x37/0x40
[<c088da8f>] ? pci_subsys_init+0x0/0x40
[<c0401045>] ? do_one_initcall+0x44/0x120
[<c0869337>] ? kernel_init+0x123/0x1a0
[<c0869214>] ? kernel_init+0x0/0x1a0
[<c0402b36>] ? kernel_thread_helper+0x6/0x10
Code: 1c 89 04 24 b8 50 41 8d c0 e8 44 3a 29 00 8b 0c dd 44 35 8d c0 89 fa 8d 7b 05 c1 e7 0c 81 e1 ff 0f 00 00 03 0d 70 bd 83 c0 29 f9 <89> 29 89 51 10 8b 14 dd 44 35 8d c0 8d 74 36 10 8b 0c 24 81 e2
EIP: [<c0417511>] ioapic_write_entry+0x41/0x7a SS:ESP 0068:f7429f08
CR2: 00000000ffff9000
---[ end trace 4eaa2a86a8e2da22 ]---
swapper used greatest stack depth: 2652 bytes left
Kernel panic - not syncing: Attempted to kill init!
Pid: 1, comm: swapper Tainted: G D 2.6.35+ #34
Call Trace:
[<c06a90cb>] ? panic+0x4a/0xbb
[<c0431064>] ? do_exit+0x5a/0x61e
[<c042eb48>] ? kmsg_dump+0x80/0xf3
[<c06ac17f>] ? oops_end+0x90/0x94
[<c041b53e>] ? no_context+0x13b/0x145
[<c06ad7c8>] ? do_page_fault+0x0/0x371
[<c041b64c>] ? bad_area_nosemaphore+0xa/0xc
[<c06ad980>] ? do_page_fault+0x1b8/0x371
[<c042007b>] ? account_idle_time+0x35/0x3a
[<c042eaa6>] ? vprintk+0x2e6/0x308
[<c06ad7c8>] ? do_page_fault+0x0/0x371
[<c06ab87e>] ? error_code+0x66/0x6c
[<c06ad7c8>] ? do_page_fault+0x0/0x371
[<c0417511>] ? ioapic_write_entry+0x41/0x7a
[<c0417857>] ? setup_IO_APIC_irq+0x270/0x27a
[<c041793c>] ? io_apic_set_pci_routing+0xdb/0xea
[<c0627d39>] ? pirq_enable_irq+0x16d/0x208
[<c056b3be>] ? pci_get_subsys+0x90/0x9e
[<c088e279>] ? pcibios_irq_init+0x26b/0x283
[<c088dac6>] ? pci_subsys_init+0x37/0x40
[<c088da8f>] ? pci_subsys_init+0x0/0x40
[<c0401045>] ? do_one_initcall+0x44/0x120
[<c0869337>] ? kernel_init+0x123/0x1a0
[<c0869214>] ? kernel_init+0x0/0x1a0
[<c0402b36>] ? kernel_thread_helper+0x6/0x10
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-02 23:17 ` Dave Airlie
@ 2010-08-03 1:32 ` Yinghai Lu
2010-08-03 1:34 ` Yinghai Lu
2010-08-03 3:26 ` Eric W. Biederman
1 sibling, 1 reply; 31+ messages in thread
From: Yinghai Lu @ 2010-08-03 1:32 UTC (permalink / raw)
To: Dave Airlie; +Cc: LKML, Eric W. Biederman, Ingo Molnar
On 08/02/2010 04:17 PM, Dave Airlie wrote:
>>
>> the kernel is using mptable, and the system have mcp55, so how come
>> with irq 35?
>> assume we should only have ioapic irq 0 - 23 ...
>>
>> Can you send out boot log with "debug apic=debug pci=routeirq" with
>> 2.6.32 and 2.6.35?
>
> Okay el6log is from a RHEL6 2.6.32 kernel, but it should give a good
> baseline, the 2.6.35 oops even earlier with all those options and is
> in the second attachment.
please check
[PATCH] x86: fix pin_2_irq mapping
We should not twist gsi to irq mapping if acpi is not used.
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
arch/x86/include/asm/io_apic.h | 14 ++++++++++++++
arch/x86/kernel/acpi/boot.c | 4 ++--
arch/x86/kernel/apic/io_apic.c | 5 +----
3 files changed, 17 insertions(+), 6 deletions(-)
Index: linux-2.6/arch/x86/include/asm/io_apic.h
===================================================================
--- linux-2.6.orig/arch/x86/include/asm/io_apic.h
+++ linux-2.6/arch/x86/include/asm/io_apic.h
@@ -185,6 +185,20 @@ int mp_find_ioapic_pin(int ioapic, u32 g
void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
extern void __init pre_init_apic_IRQ0(void);
+#ifdef CONFIG_ACPI
+unsigned int gsi_to_irq(unsigned int gsi);
+u32 irq_to_gsi(int irq);
+#else
+static inline unsigned int gsi_to_irq(unsigned int gsi)
+{
+ return gsi;
+}
+static u32 irq_to_gsi(int irq)
+{
+ return irq;
+}
+#endif
+
#else /* !CONFIG_X86_IO_APIC */
#define io_apic_assign_pci_irqs 0
Index: linux-2.6/arch/x86/kernel/acpi/boot.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/acpi/boot.c
+++ linux-2.6/arch/x86/kernel/acpi/boot.c
@@ -100,7 +100,7 @@ static u32 isa_irq_to_gsi[NR_IRQS_LEGACY
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
};
-static unsigned int gsi_to_irq(unsigned int gsi)
+unsigned int gsi_to_irq(unsigned int gsi)
{
unsigned int irq = gsi + NR_IRQS_LEGACY;
unsigned int i;
@@ -123,7 +123,7 @@ static unsigned int gsi_to_irq(unsigned
return irq;
}
-static u32 irq_to_gsi(int irq)
+u32 irq_to_gsi(int irq)
{
unsigned int gsi;
Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
+++ linux-2.6/arch/x86/kernel/apic/io_apic.c
@@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
} else {
u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
- if (gsi >= NR_IRQS_LEGACY)
- irq = gsi;
- else
- irq = gsi_top + gsi;
+ irq = gsi_to_irq(gsi);
}
#ifdef CONFIG_X86_32
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 1:32 ` Yinghai Lu
@ 2010-08-03 1:34 ` Yinghai Lu
2010-08-03 3:13 ` Eric W. Biederman
0 siblings, 1 reply; 31+ messages in thread
From: Yinghai Lu @ 2010-08-03 1:34 UTC (permalink / raw)
To: Dave Airlie; +Cc: LKML, Eric W. Biederman, Ingo Molnar
On 08/02/2010 06:32 PM, Yinghai Lu wrote:
> On 08/02/2010 04:17 PM, Dave Airlie wrote:
>>>
>>> the kernel is using mptable, and the system have mcp55, so how come
>>> with irq 35?
>>> assume we should only have ioapic irq 0 - 23 ...
>>>
>>> Can you send out boot log with "debug apic=debug pci=routeirq" with
>>> 2.6.32 and 2.6.35?
>>
>> Okay el6log is from a RHEL6 2.6.32 kernel, but it should give a good
>> baseline, the 2.6.35 oops even earlier with all those options and is
>> in the second attachment.
>
please use this one instead..., forget to run quilt refresh before sending it.
[PATCH -v2] x86: fix pin_2_irq mapping
We should not twist gsi to irq mapping if acpi is not used.
-v2 remove not used irq_to_gsi()
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
arch/x86/include/asm/io_apic.h | 10 ++++++++++
arch/x86/kernel/acpi/boot.c | 4 ++--
arch/x86/kernel/apic/io_apic.c | 5 +----
3 files changed, 13 insertions(+), 6 deletions(-)
Index: linux-2.6/arch/x86/include/asm/io_apic.h
===================================================================
--- linux-2.6.orig/arch/x86/include/asm/io_apic.h
+++ linux-2.6/arch/x86/include/asm/io_apic.h
@@ -185,6 +185,16 @@ int mp_find_ioapic_pin(int ioapic, u32 g
void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
extern void __init pre_init_apic_IRQ0(void);
+#ifdef CONFIG_ACPI
+unsigned int gsi_to_irq(unsigned int gsi);
+u32 irq_to_gsi(int irq);
+#else
+static inline unsigned int gsi_to_irq(unsigned int gsi)
+{
+ return gsi;
+}
+#endif
+
#else /* !CONFIG_X86_IO_APIC */
#define io_apic_assign_pci_irqs 0
Index: linux-2.6/arch/x86/kernel/acpi/boot.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/acpi/boot.c
+++ linux-2.6/arch/x86/kernel/acpi/boot.c
@@ -100,7 +100,7 @@ static u32 isa_irq_to_gsi[NR_IRQS_LEGACY
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
};
-static unsigned int gsi_to_irq(unsigned int gsi)
+unsigned int gsi_to_irq(unsigned int gsi)
{
unsigned int irq = gsi + NR_IRQS_LEGACY;
unsigned int i;
@@ -123,7 +123,7 @@ static unsigned int gsi_to_irq(unsigned
return irq;
}
-static u32 irq_to_gsi(int irq)
+u32 irq_to_gsi(int irq)
{
unsigned int gsi;
Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
+++ linux-2.6/arch/x86/kernel/apic/io_apic.c
@@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
} else {
u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
- if (gsi >= NR_IRQS_LEGACY)
- irq = gsi;
- else
- irq = gsi_top + gsi;
+ irq = gsi_to_irq(gsi);
}
#ifdef CONFIG_X86_32
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 1:34 ` Yinghai Lu
@ 2010-08-03 3:13 ` Eric W. Biederman
2010-08-03 7:19 ` Yinghai Lu
0 siblings, 1 reply; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-03 3:13 UTC (permalink / raw)
To: Yinghai Lu; +Cc: Dave Airlie, LKML, Ingo Molnar
Yinghai Lu <yinghai@kernel.org> writes:
> On 08/02/2010 06:32 PM, Yinghai Lu wrote:
>> On 08/02/2010 04:17 PM, Dave Airlie wrote:
>>>>
>>>> the kernel is using mptable, and the system have mcp55, so how come
>>>> with irq 35?
>>>> assume we should only have ioapic irq 0 - 23 ...
>>>>
>>>> Can you send out boot log with "debug apic=debug pci=routeirq" with
>>>> 2.6.32 and 2.6.35?
>>>
>>> Okay el6log is from a RHEL6 2.6.32 kernel, but it should give a good
>>> baseline, the 2.6.35 oops even earlier with all those options and is
>>> in the second attachment.
>>
>
This patch is wrong and there is no reason to even suspect it will
affect this problem. At best this patch will trade one set of bugs
for another because at least on some platforms we always did something
like this. Having an irq 35 is odd and certainly a result of recent
changes, but in this case it doesn't look like it has anything to do
with the problem.
Nacked-by: "Eric W. Biederman" <ebiederm@xmission.com>
> please use this one instead..., forget to run quilt refresh before sending it.
>
> [PATCH -v2] x86: fix pin_2_irq mapping
>
> We should not twist gsi to irq mapping if acpi is not used.
>
> -v2 remove not used irq_to_gsi()
>
> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
>
> ---
> arch/x86/include/asm/io_apic.h | 10 ++++++++++
> arch/x86/kernel/acpi/boot.c | 4 ++--
> arch/x86/kernel/apic/io_apic.c | 5 +----
> 3 files changed, 13 insertions(+), 6 deletions(-)
>
> Index: linux-2.6/arch/x86/include/asm/io_apic.h
> ===================================================================
> --- linux-2.6.orig/arch/x86/include/asm/io_apic.h
> +++ linux-2.6/arch/x86/include/asm/io_apic.h
> @@ -185,6 +185,16 @@ int mp_find_ioapic_pin(int ioapic, u32 g
> void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
> extern void __init pre_init_apic_IRQ0(void);
>
> +#ifdef CONFIG_ACPI
> +unsigned int gsi_to_irq(unsigned int gsi);
> +u32 irq_to_gsi(int irq);
> +#else
> +static inline unsigned int gsi_to_irq(unsigned int gsi)
> +{
> + return gsi;
> +}
> +#endif
> +
> #else /* !CONFIG_X86_IO_APIC */
>
> #define io_apic_assign_pci_irqs 0
> Index: linux-2.6/arch/x86/kernel/acpi/boot.c
> ===================================================================
> --- linux-2.6.orig/arch/x86/kernel/acpi/boot.c
> +++ linux-2.6/arch/x86/kernel/acpi/boot.c
> @@ -100,7 +100,7 @@ static u32 isa_irq_to_gsi[NR_IRQS_LEGACY
> 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
> };
>
> -static unsigned int gsi_to_irq(unsigned int gsi)
> +unsigned int gsi_to_irq(unsigned int gsi)
> {
> unsigned int irq = gsi + NR_IRQS_LEGACY;
> unsigned int i;
> @@ -123,7 +123,7 @@ static unsigned int gsi_to_irq(unsigned
> return irq;
> }
>
> -static u32 irq_to_gsi(int irq)
> +u32 irq_to_gsi(int irq)
> {
> unsigned int gsi;
>
> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
> ===================================================================
> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
> @@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
> } else {
> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>
> - if (gsi >= NR_IRQS_LEGACY)
> - irq = gsi;
> - else
> - irq = gsi_top + gsi;
> + irq = gsi_to_irq(gsi);
> }
>
> #ifdef CONFIG_X86_32
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-02 23:17 ` Dave Airlie
2010-08-03 1:32 ` Yinghai Lu
@ 2010-08-03 3:26 ` Eric W. Biederman
[not found] ` <AANLkTi=qtLkY0=h77=EVL+y1q41b_cMBODvL4Hu6A6wL@mail.gmail.com>
1 sibling, 1 reply; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-03 3:26 UTC (permalink / raw)
To: Dave Airlie; +Cc: Yinghai Lu, LKML, Ingo Molnar
Dave Airlie <airlied@gmail.com> writes:
>>
>> the kernel is using mptable, and the system have mcp55, so how come
>> with irq 35?
>> assume we should only have ioapic irq 0 - 23 ...
>>
>> Can you send out boot log with "debug apic=debug pci=routeirq" with
>> 2.6.32 and 2.6.35?
>
> Okay el6log is from a RHEL6 2.6.32 kernel, but it should give a good
> baseline, the 2.6.35 oops even earlier with all those options and is
> in the second attachment.
It appears we have a smoking gun:
For some reason setup_IO_APIC_IRQS thinks we at least 2 io_apics,
but we have only setup 1 io_apic. Since io_apics need a kmap entry
accessing an apic that hasn't been setup will definitely give a
page fault. It sounds like something is stomping nr_ioapics.
From: 2.6.35-debuglog
IOAPIC[0]: apic_id 8, version 17, address 0xfec00000, GSI 0-23
....
IOAPIC[1]: Set routing entry (0-16 -> 0x51 -> IRQ 16 Mode:1 Active:1)
Can we get your System.map of the failing kernel (so we can see what
is close to nr_ioapics), and could you add a print statement in
arch/x86/kernel/apic/io_apic:setup_IO_APIC_irqs to print nr_ioapics?
I would be surprised if drm changes could have affected this.
Eric
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
[not found] ` <AANLkTi=qtLkY0=h77=EVL+y1q41b_cMBODvL4Hu6A6wL@mail.gmail.com>
@ 2010-08-03 6:00 ` Eric W. Biederman
0 siblings, 0 replies; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-03 6:00 UTC (permalink / raw)
To: Dave Airlie; +Cc: Yinghai Lu, LKML, Ingo Molnar
Dave Airlie <airlied@gmail.com> writes:
> On Tue, Aug 3, 2010 at 1:26 PM, Eric W. Biederman <ebiederm@xmission.com> wrote:
>> Dave Airlie <airlied@gmail.com> writes:
>>> Okay el6log is from a RHEL6 2.6.32 kernel, but it should give a good
>>> baseline, the 2.6.35 oops even earlier with all those options and is
>>> in the second attachment.
>>
>> It appears we have a smoking gun:
>>
>> For some reason setup_IO_APIC_IRQS thinks we at least 2 io_apics,
>> but we have only setup 1 io_apic. Since io_apics need a kmap entry
>> accessing an apic that hasn't been setup will definitely give a
>> page fault. It sounds like something is stomping nr_ioapics.
>>
>> From: 2.6.35-debuglog
>> IOAPIC[0]: apic_id 8, version 17, address 0xfec00000, GSI 0-23
>> ....
>> IOAPIC[1]: Set routing entry (0-16 -> 0x51 -> IRQ 16 Mode:1 Active:1)
>>
>> Can we get your System.map of the failing kernel (so we can see what
>> is close to nr_ioapics), and could you add a print statement in
>> arch/x86/kernel/apic/io_apic:setup_IO_APIC_irqs to print nr_ioapics?
>>
>> I would be surprised if drm changes could have affected this.
>>
>
> Okay, from my debug addition it still only seems to have one ioapic
Thanks. I goofed reading that code. I saw setup_IO_APIC_irq and made
the incorrect leap that said we came from setup_IO_APIC_irqs, when
in fact we are coming from io_apic_set_pci_routing.
So let's see can I figure out why we are getting a bad apic_id.
For that I need to track back to pirq_enable_irq, which leads
me to IO_APIC_get_PCI_irq_vector. The likely canidate is that we
simply are not finding the apicid that is present in the mp_irqs
entry that we decided to return. The patch below should add
appropriate debugging and fix the lookup
The real difference appears to be that acpi is disabled where it
is not disabled in your reference kernel.
Dave can you verify this fixes the oops for you?
It would be nice if we didn't crash early in boot even without
acpi present.
Eric
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index e41ed24..e824e14 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1067,7 +1067,7 @@ static int pin_2_irq(int idx, int apic, int pin)
int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
struct io_apic_irq_attr *irq_attr)
{
- int apic, i, best_guess = -1;
+ int i, best_guess = -1;
apic_printk(APIC_DEBUG,
"querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n",
@@ -1080,16 +1080,29 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
for (i = 0; i < mp_irq_entries; i++) {
int lbus = mp_irqs[i].srcbus;
- for (apic = 0; apic < nr_ioapics; apic++)
- if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic ||
- mp_irqs[i].dstapic == MP_APIC_ALL)
- break;
-
if (!test_bit(lbus, mp_bus_not_pci) &&
!mp_irqs[i].irqtype &&
(bus == lbus) &&
(slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
- int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq);
+ int apic;
+ int irq;
+
+ /* Lookup the ioapic by id */
+ for (apic = 0; apic < nr_ioapics; apic++)
+ if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic ||
+ mp_irqs[i].dstapic == MP_APIC_ALL)
+ break;
+
+ /* Verify we found the ioapic */
+ if (apic >= nr_ioapics) {
+ printk(KERN_ERR
+ "%02x:%02x.%c: APIC_ID %u pin: %u not found BIOS bug?\n",
+ bus, slot, 'A' + pin - 1,
+ mp_irqs[i].dstapic, mp_irqs[i].dstirq);
+ continue;
+ }
+
+ irq = pin_2_irq(i, apic, mp_irqs[i].dstirq);
if (!(apic || IO_APIC_IRQ(irq)))
continue;
@@ -1099,7 +1112,8 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
mp_irqs[i].dstirq,
irq_trigger(i),
irq_polarity(i));
- return irq;
+ best_guess = irq;
+ goto out;
}
/*
* Use the first all-but-pin matching entry as a
@@ -1114,6 +1128,12 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
}
}
}
+out:
+ if (best_guess >= 0)
+ apic_printk(APIC_DEBUG,
+ "%02x:%02x.%c: IRQ %u IOAPIC: %u pin: %u",
+ bus, slot, 'A' + pin - 1,
+ best_guess, irq_attr->ioapic, irq_attr->ioapic_pin);
return best_guess;
}
EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector);
^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 3:13 ` Eric W. Biederman
@ 2010-08-03 7:19 ` Yinghai Lu
2010-08-03 8:00 ` Eric W. Biederman
2010-08-03 8:00 ` Yinghai Lu
0 siblings, 2 replies; 31+ messages in thread
From: Yinghai Lu @ 2010-08-03 7:19 UTC (permalink / raw)
To: Eric W. Biederman; +Cc: Dave Airlie, LKML, Ingo Molnar
On 08/02/2010 08:13 PM, Eric W. Biederman wrote:
> Yinghai Lu <yinghai@kernel.org> writes:
>
>> On 08/02/2010 06:32 PM, Yinghai Lu wrote:
>>> On 08/02/2010 04:17 PM, Dave Airlie wrote:
>>>>>
>>>>> the kernel is using mptable, and the system have mcp55, so how come
>>>>> with irq 35?
>>>>> assume we should only have ioapic irq 0 - 23 ...
>>>>>
>>>>> Can you send out boot log with "debug apic=debug pci=routeirq" with
>>>>> 2.6.32 and 2.6.35?
>>>>
>>>> Okay el6log is from a RHEL6 2.6.32 kernel, but it should give a good
>>>> baseline, the 2.6.35 oops even earlier with all those options and is
>>>> in the second attachment.
>>>
>>
>
> This patch is wrong and there is no reason to even suspect it will
> affect this problem. At best this patch will trade one set of bugs
> for another because at least on some platforms we always did something
> like this. Having an irq 35 is odd and certainly a result of recent
> changes, but in this case it doesn't look like it has anything to do
> with the problem.
>
> Nacked-by: "Eric W. Biederman" <ebiederm@xmission.com>
>
>> please use this one instead..., forget to run quilt refresh before sending it.
>>
>> [PATCH -v2] x86: fix pin_2_irq mapping
>>
>> We should not twist gsi to irq mapping if acpi is not used.
>>
>> -v2 remove not used irq_to_gsi()
>>
>> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
>>
>> ---
>> arch/x86/include/asm/io_apic.h | 10 ++++++++++
>> arch/x86/kernel/acpi/boot.c | 4 ++--
>> arch/x86/kernel/apic/io_apic.c | 5 +----
>> 3 files changed, 13 insertions(+), 6 deletions(-)
>>
>> Index: linux-2.6/arch/x86/include/asm/io_apic.h
>> ===================================================================
>> --- linux-2.6.orig/arch/x86/include/asm/io_apic.h
>> +++ linux-2.6/arch/x86/include/asm/io_apic.h
>> @@ -185,6 +185,16 @@ int mp_find_ioapic_pin(int ioapic, u32 g
>> void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
>> extern void __init pre_init_apic_IRQ0(void);
>>
>> +#ifdef CONFIG_ACPI
>> +unsigned int gsi_to_irq(unsigned int gsi);
>> +u32 irq_to_gsi(int irq);
>> +#else
>> +static inline unsigned int gsi_to_irq(unsigned int gsi)
>> +{
>> + return gsi;
>> +}
>> +#endif
>> +
>> #else /* !CONFIG_X86_IO_APIC */
>>
>> #define io_apic_assign_pci_irqs 0
>> Index: linux-2.6/arch/x86/kernel/acpi/boot.c
>> ===================================================================
>> --- linux-2.6.orig/arch/x86/kernel/acpi/boot.c
>> +++ linux-2.6/arch/x86/kernel/acpi/boot.c
>> @@ -100,7 +100,7 @@ static u32 isa_irq_to_gsi[NR_IRQS_LEGACY
>> 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
>> };
>>
>> -static unsigned int gsi_to_irq(unsigned int gsi)
>> +unsigned int gsi_to_irq(unsigned int gsi)
>> {
>> unsigned int irq = gsi + NR_IRQS_LEGACY;
>> unsigned int i;
>> @@ -123,7 +123,7 @@ static unsigned int gsi_to_irq(unsigned
>> return irq;
>> }
>>
>> -static u32 irq_to_gsi(int irq)
>> +u32 irq_to_gsi(int irq)
>> {
>> unsigned int gsi;
>>
>> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
>> ===================================================================
>> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
>> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
>> @@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
>> } else {
>> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>>
>> - if (gsi >= NR_IRQS_LEGACY)
>> - irq = gsi;
>> - else
>> - irq = gsi_top + gsi;
>> + irq = gsi_to_irq(gsi);
>> }
>>
>> #ifdef CONFIG_X86_32
what is the point for making irq = gsi_top + gsi when mptable is used instead of acpi?
Yinghai
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 7:19 ` Yinghai Lu
@ 2010-08-03 8:00 ` Eric W. Biederman
2010-08-03 8:04 ` Yinghai Lu
2010-08-03 8:00 ` Yinghai Lu
1 sibling, 1 reply; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-03 8:00 UTC (permalink / raw)
To: Yinghai Lu; +Cc: Dave Airlie, LKML, Ingo Molnar
Yinghai Lu <yinghai@kernel.org> writes:
>>> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
>>> ===================================================================
>>> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
>>> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
>>> @@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
>>> } else {
>>> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>>>
>>> - if (gsi >= NR_IRQS_LEGACY)
>>> - irq = gsi;
>>> - else
>>> - irq = gsi_top + gsi;
>>> + irq = gsi_to_irq(gsi);
>>> }
>>>
>>> #ifdef CONFIG_X86_32
>
> what is the point for making irq = gsi_top + gsi when mptable is used instead of acpi?
Because it is only convention that when mptables are used that the
first apic pins 0-15 are the ISA irqs. This thread witnessed and a
pci irq that came in pin < 16 that was not an ISA irq. The truly rare
and exotic case would be for the ISA irqs to be outside the first 16
ioapic pins but the es7000 did exactly that.
Eric
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 7:19 ` Yinghai Lu
2010-08-03 8:00 ` Eric W. Biederman
@ 2010-08-03 8:00 ` Yinghai Lu
2010-08-03 8:27 ` Eric W. Biederman
1 sibling, 1 reply; 31+ messages in thread
From: Yinghai Lu @ 2010-08-03 8:00 UTC (permalink / raw)
To: Eric W. Biederman; +Cc: Dave Airlie, LKML, Ingo Molnar
On 08/03/2010 12:19 AM, Yinghai Lu wrote:
> On 08/02/2010 08:13 PM, Eric W. Biederman wrote:
>> Yinghai Lu <yinghai@kernel.org> writes:
>>
>>> On 08/02/2010 06:32 PM, Yinghai Lu wrote:
>>>> On 08/02/2010 04:17 PM, Dave Airlie wrote:
>>>>>>
>>>>>> the kernel is using mptable, and the system have mcp55, so how come
>>>>>> with irq 35?
>>>>>> assume we should only have ioapic irq 0 - 23 ...
>>>>>>
>>>>>> Can you send out boot log with "debug apic=debug pci=routeirq" with
>>>>>> 2.6.32 and 2.6.35?
>>>>>
>>>>> Okay el6log is from a RHEL6 2.6.32 kernel, but it should give a good
>>>>> baseline, the 2.6.35 oops even earlier with all those options and is
>>>>> in the second attachment.
>>>>
>>>
>>
>> This patch is wrong and there is no reason to even suspect it will
>> affect this problem. At best this patch will trade one set of bugs
>> for another because at least on some platforms we always did something
>> like this. Having an irq 35 is odd and certainly a result of recent
>> changes, but in this case it doesn't look like it has anything to do
>> with the problem.
>>
>> Nacked-by: "Eric W. Biederman" <ebiederm@xmission.com>
>>
>>> please use this one instead..., forget to run quilt refresh before sending it.
>>>
>>> [PATCH -v2] x86: fix pin_2_irq mapping
>>>
>>> We should not twist gsi to irq mapping if acpi is not used.
>>>
>>> -v2 remove not used irq_to_gsi()
>>>
>>> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
>>>
>>> ---
>>> arch/x86/include/asm/io_apic.h | 10 ++++++++++
>>> arch/x86/kernel/acpi/boot.c | 4 ++--
>>> arch/x86/kernel/apic/io_apic.c | 5 +----
>>> 3 files changed, 13 insertions(+), 6 deletions(-)
>>>
>>> Index: linux-2.6/arch/x86/include/asm/io_apic.h
>>> ===================================================================
>>> --- linux-2.6.orig/arch/x86/include/asm/io_apic.h
>>> +++ linux-2.6/arch/x86/include/asm/io_apic.h
>>> @@ -185,6 +185,16 @@ int mp_find_ioapic_pin(int ioapic, u32 g
>>> void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
>>> extern void __init pre_init_apic_IRQ0(void);
>>>
>>> +#ifdef CONFIG_ACPI
>>> +unsigned int gsi_to_irq(unsigned int gsi);
>>> +u32 irq_to_gsi(int irq);
>>> +#else
>>> +static inline unsigned int gsi_to_irq(unsigned int gsi)
>>> +{
>>> + return gsi;
>>> +}
>>> +#endif
>>> +
>>> #else /* !CONFIG_X86_IO_APIC */
>>>
>>> #define io_apic_assign_pci_irqs 0
>>> Index: linux-2.6/arch/x86/kernel/acpi/boot.c
>>> ===================================================================
>>> --- linux-2.6.orig/arch/x86/kernel/acpi/boot.c
>>> +++ linux-2.6/arch/x86/kernel/acpi/boot.c
>>> @@ -100,7 +100,7 @@ static u32 isa_irq_to_gsi[NR_IRQS_LEGACY
>>> 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
>>> };
>>>
>>> -static unsigned int gsi_to_irq(unsigned int gsi)
>>> +unsigned int gsi_to_irq(unsigned int gsi)
>>> {
>>> unsigned int irq = gsi + NR_IRQS_LEGACY;
>>> unsigned int i;
>>> @@ -123,7 +123,7 @@ static unsigned int gsi_to_irq(unsigned
>>> return irq;
>>> }
>>>
>>> -static u32 irq_to_gsi(int irq)
>>> +u32 irq_to_gsi(int irq)
>>> {
>>> unsigned int gsi;
>>>
>>> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
>>> ===================================================================
>>> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
>>> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
>>> @@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
>>> } else {
>>> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>>>
>>> - if (gsi >= NR_IRQS_LEGACY)
>>> - irq = gsi;
>>> - else
>>> - irq = gsi_top + gsi;
>>> + irq = gsi_to_irq(gsi);
>>> }
>>>
>>> #ifdef CONFIG_X86_32
>
> what is the point for making irq = gsi_top + gsi when mptable is used instead of acpi?
>
just tried those blind shifting gsi cause kernel with acpi crash in virtual box.
[ 5.536000] querying PCI -> IRQ mapping bus:0, slot:11, pin:0.
[ 5.540000] ehci_hcd 0000:00:0b.0: can't find IRQ for PCI INT A; probably buggy MP table
[
and on kvm it got:
[ 4.352280] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k6-NAPI
[ 4.356012] e1000: Copyright (c) 1999-2006 Intel Corporation.
[ 4.360120] querying PCI -> IRQ mapping bus:0, slot:3, pin:0.
[ 4.364006] PCI BIOS passed nonexistent PCI bus 0!
[ 4.368007] e1000 0000:00:03.0: can't find IRQ for PCI INT A; probably buggy MP table
[ 4.372049] e1000 0000:00:03.0: setting latency timer to 64
Yinghai
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 8:00 ` Eric W. Biederman
@ 2010-08-03 8:04 ` Yinghai Lu
2010-08-03 8:56 ` Eric W. Biederman
0 siblings, 1 reply; 31+ messages in thread
From: Yinghai Lu @ 2010-08-03 8:04 UTC (permalink / raw)
To: Eric W. Biederman; +Cc: Dave Airlie, LKML, Ingo Molnar
On 08/03/2010 01:00 AM, Eric W. Biederman wrote:
> Yinghai Lu <yinghai@kernel.org> writes:
>
>>>> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>> ===================================================================
>>>> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
>>>> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>> @@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
>>>> } else {
>>>> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>>>>
>>>> - if (gsi >= NR_IRQS_LEGACY)
>>>> - irq = gsi;
>>>> - else
>>>> - irq = gsi_top + gsi;
>>>> + irq = gsi_to_irq(gsi);
>>>> }
>>>>
>>>> #ifdef CONFIG_X86_32
>>
>> what is the point for making irq = gsi_top + gsi when mptable is used instead of acpi?
>
> Because it is only convention that when mptables are used that the
> first apic pins 0-15 are the ISA irqs. This thread witnessed and a
> pci irq that came in pin < 16 that was not an ISA irq. The truly rare
> and exotic case would be for the ISA irqs to be outside the first 16
> ioapic pins but the es7000 did exactly that.
nvidia chipset if acpi is enabled, external pci device will use ioapic from 16 to 23.
if mptable is used, external pci device will not use pin from 16 to 23..., and lot of devices will share same pin.
Yinghai
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 8:00 ` Yinghai Lu
@ 2010-08-03 8:27 ` Eric W. Biederman
0 siblings, 0 replies; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-03 8:27 UTC (permalink / raw)
To: Yinghai Lu; +Cc: Dave Airlie, LKML, Ingo Molnar
Yinghai Lu <yinghai@kernel.org> writes:
> On 08/03/2010 12:19 AM, Yinghai Lu wrote:
>> On 08/02/2010 08:13 PM, Eric W. Biederman wrote:
>>> Yinghai Lu <yinghai@kernel.org> writes:
>>>> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>> ===================================================================
>>>> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
>>>> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>> @@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
>>>> } else {
>>>> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>>>>
>>>> - if (gsi >= NR_IRQS_LEGACY)
>>>> - irq = gsi;
>>>> - else
>>>> - irq = gsi_top + gsi;
>>>> + irq = gsi_to_irq(gsi);
>>>> }
>>>>
>>>> #ifdef CONFIG_X86_32
>>
>> what is the point for making irq = gsi_top + gsi when mptable is used instead of acpi?
>>
>
> just tried those blind shifting gsi cause kernel with acpi crash in virtual box.
What configuration did you try and had problems with?
> [ 5.536000] querying PCI -> IRQ mapping bus:0, slot:11, pin:0.
> [ 5.540000] ehci_hcd 0000:00:0b.0: can't find IRQ for PCI INT A; probably buggy MP table
> [
I don't have a clue what the mpptable looks like in virtual box. My guess is that it
is buggy and untested like so many mptables these days.
> and on kvm it got:
> [ 4.352280] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k6-NAPI
> [ 4.356012] e1000: Copyright (c) 1999-2006 Intel Corporation.
> [ 4.360120] querying PCI -> IRQ mapping bus:0, slot:3, pin:0.
> [ 4.364006] PCI BIOS passed nonexistent PCI bus 0!
> [ 4.368007] e1000 0000:00:03.0: can't find IRQ for PCI INT A; probably buggy MP table
> [ 4.372049] e1000 0000:00:03.0: setting latency timer to 64
This example failed because mpparse said bus 0 was ISA. Which is a
pretty bizarre thing to do, especially when bus 0 is pretty clearly
PCI. That does sound like a buggy MP table.
Eric
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 8:04 ` Yinghai Lu
@ 2010-08-03 8:56 ` Eric W. Biederman
2010-08-03 9:01 ` Yinghai Lu
0 siblings, 1 reply; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-03 8:56 UTC (permalink / raw)
To: Yinghai Lu; +Cc: Dave Airlie, LKML, Ingo Molnar
Yinghai Lu <yinghai@kernel.org> writes:
> On 08/03/2010 01:00 AM, Eric W. Biederman wrote:
>> Yinghai Lu <yinghai@kernel.org> writes:
>>
>>>>> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>>> ===================================================================
>>>>> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
>>>>> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>>> @@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
>>>>> } else {
>>>>> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>>>>>
>>>>> - if (gsi >= NR_IRQS_LEGACY)
>>>>> - irq = gsi;
>>>>> - else
>>>>> - irq = gsi_top + gsi;
>>>>> + irq = gsi_to_irq(gsi);
>>>>> }
>>>>>
>>>>> #ifdef CONFIG_X86_32
>>>
>>> what is the point for making irq = gsi_top + gsi when mptable is used instead of acpi?
>>
>> Because it is only convention that when mptables are used that the
>> first apic pins 0-15 are the ISA irqs. This thread witnessed and a
>> pci irq that came in pin < 16 that was not an ISA irq. The truly rare
>> and exotic case would be for the ISA irqs to be outside the first 16
>> ioapic pins but the es7000 did exactly that.
>
> nvidia chipset if acpi is enabled, external pci device will use ioapic from 16 to 23.
>
> if mptable is used, external pci device will not use pin from 16 to 23..., and lot of devices will share same pin.
Exactly. Pins < 16 are not necessarily ISA irqs, and can be possibly
shared level triggered PCI irqs. Unfortunately there are strange
boards like the es7000 where pins > 16 are ISA irqs.
The other thing that is gained by having pin_2_irq always remap pins <
16 is we can get away with the numerous hard codes in the arch/x86 and elsewhere
that assume irq < 16 is an ISA irq.
Eric
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 8:56 ` Eric W. Biederman
@ 2010-08-03 9:01 ` Yinghai Lu
2010-08-03 9:15 ` Eric W. Biederman
0 siblings, 1 reply; 31+ messages in thread
From: Yinghai Lu @ 2010-08-03 9:01 UTC (permalink / raw)
To: Eric W. Biederman; +Cc: Dave Airlie, LKML, Ingo Molnar
On 08/03/2010 01:56 AM, Eric W. Biederman wrote:
> Yinghai Lu <yinghai@kernel.org> writes:
>
>> On 08/03/2010 01:00 AM, Eric W. Biederman wrote:
>>> Yinghai Lu <yinghai@kernel.org> writes:
>>>
>>>>>> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>>>> ===================================================================
>>>>>> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
>>>>>> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>>>> @@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
>>>>>> } else {
>>>>>> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>>>>>>
>>>>>> - if (gsi >= NR_IRQS_LEGACY)
>>>>>> - irq = gsi;
>>>>>> - else
>>>>>> - irq = gsi_top + gsi;
>>>>>> + irq = gsi_to_irq(gsi);
>>>>>> }
>>>>>>
>>>>>> #ifdef CONFIG_X86_32
>>>>
>>>> what is the point for making irq = gsi_top + gsi when mptable is used instead of acpi?
>>>
>>> Because it is only convention that when mptables are used that the
>>> first apic pins 0-15 are the ISA irqs. This thread witnessed and a
>>> pci irq that came in pin < 16 that was not an ISA irq. The truly rare
>>> and exotic case would be for the ISA irqs to be outside the first 16
>>> ioapic pins but the es7000 did exactly that.
>>
>> nvidia chipset if acpi is enabled, external pci device will use ioapic from 16 to 23.
>>
>> if mptable is used, external pci device will not use pin from 16 to 23..., and lot of devices will share same pin.
>
> Exactly. Pins < 16 are not necessarily ISA irqs, and can be possibly
> shared level triggered PCI irqs. Unfortunately there are strange
> boards like the es7000 where pins > 16 are ISA irqs.
>
> The other thing that is gained by having pin_2_irq always remap pins <
> 16 is we can get away with the numerous hard codes in the arch/x86 and elsewhere
> that assume irq < 16 is an ISA irq.
how about this one ?
---
arch/x86/kernel/apic/io_apic.c | 31 ++++++++++++++++++++++++++++---
1 file changed, 28 insertions(+), 3 deletions(-)
Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
+++ linux-2.6/arch/x86/kernel/apic/io_apic.c
@@ -1013,6 +1013,28 @@ static inline int irq_trigger(int idx)
return MPBIOS_trigger(idx);
}
+static int shared_with_legacy(int apic, int pin)
+{
+ int i;
+
+ for (i = 0; i < mp_irq_entries; i++) {
+ int bus = mp_irqs[i].srcbus;
+
+ if (!test_bit(bus, mp_bus_not_pci))
+ continue;
+
+ if (mp_ioapics[apic].apicid != mp_irqs[i].dstapic)
+ continue;
+
+ if (mp_irqs[i].dstirq != pin)
+ continue;
+
+ return mp_irqs[i].srcbusirq;
+ }
+
+ return -1;
+}
+
static int pin_2_irq(int idx, int apic, int pin)
{
int irq;
@@ -1029,10 +1051,13 @@ static int pin_2_irq(int idx, int apic,
} else {
u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
- if (gsi >= NR_IRQS_LEGACY)
+ if (gsi >= NR_IRQS_LEGACY) {
irq = gsi;
- else
- irq = gsi_top + gsi;
+ } else {
+ irq = shared_with_legacy(apic, pin);
+ if (irq < 0)
+ irq = gsi_top + gsi;
+ }
}
#ifdef CONFIG_X86_32
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 9:01 ` Yinghai Lu
@ 2010-08-03 9:15 ` Eric W. Biederman
2010-08-03 9:36 ` Yinghai Lu
0 siblings, 1 reply; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-03 9:15 UTC (permalink / raw)
To: Yinghai Lu; +Cc: Dave Airlie, LKML, Ingo Molnar
Yinghai Lu <yinghai@kernel.org> writes:
> On 08/03/2010 01:56 AM, Eric W. Biederman wrote:
>> Yinghai Lu <yinghai@kernel.org> writes:
>>
>>> On 08/03/2010 01:00 AM, Eric W. Biederman wrote:
>>>> Yinghai Lu <yinghai@kernel.org> writes:
>>>>
>>>>>>> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>>>>> ===================================================================
>>>>>>> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
>>>>>>> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>>>>> @@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
>>>>>>> } else {
>>>>>>> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>>>>>>>
>>>>>>> - if (gsi >= NR_IRQS_LEGACY)
>>>>>>> - irq = gsi;
>>>>>>> - else
>>>>>>> - irq = gsi_top + gsi;
>>>>>>> + irq = gsi_to_irq(gsi);
>>>>>>> }
>>>>>>>
>>>>>>> #ifdef CONFIG_X86_32
>>>>>
>>>>> what is the point for making irq = gsi_top + gsi when mptable is used instead of acpi?
>>>>
>>>> Because it is only convention that when mptables are used that the
>>>> first apic pins 0-15 are the ISA irqs. This thread witnessed and a
>>>> pci irq that came in pin < 16 that was not an ISA irq. The truly rare
>>>> and exotic case would be for the ISA irqs to be outside the first 16
>>>> ioapic pins but the es7000 did exactly that.
>>>
>>> nvidia chipset if acpi is enabled, external pci device will use ioapic from 16 to 23.
>>>
>>> if mptable is used, external pci device will not use pin from 16 to 23..., and lot of devices will share same pin.
>>
>> Exactly. Pins < 16 are not necessarily ISA irqs, and can be possibly
>> shared level triggered PCI irqs. Unfortunately there are strange
>> boards like the es7000 where pins > 16 are ISA irqs.
>>
>> The other thing that is gained by having pin_2_irq always remap pins <
>> 16 is we can get away with the numerous hard codes in the arch/x86 and elsewhere
>> that assume irq < 16 is an ISA irq.
>
> how about this one ?
You can't share an edge triggered ISA irq, it isn't really physically
possible. So I don't see how this extra complexity will change anything.
Eric
> ---
> arch/x86/kernel/apic/io_apic.c | 31 ++++++++++++++++++++++++++++---
> 1 file changed, 28 insertions(+), 3 deletions(-)
>
> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
> ===================================================================
> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
> @@ -1013,6 +1013,28 @@ static inline int irq_trigger(int idx)
> return MPBIOS_trigger(idx);
> }
>
> +static int shared_with_legacy(int apic, int pin)
> +{
> + int i;
> +
> + for (i = 0; i < mp_irq_entries; i++) {
> + int bus = mp_irqs[i].srcbus;
> +
> + if (!test_bit(bus, mp_bus_not_pci))
> + continue;
> +
> + if (mp_ioapics[apic].apicid != mp_irqs[i].dstapic)
> + continue;
> +
> + if (mp_irqs[i].dstirq != pin)
> + continue;
> +
> + return mp_irqs[i].srcbusirq;
> + }
> +
> + return -1;
> +}
> +
> static int pin_2_irq(int idx, int apic, int pin)
> {
> int irq;
> @@ -1029,10 +1051,13 @@ static int pin_2_irq(int idx, int apic,
> } else {
> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>
> - if (gsi >= NR_IRQS_LEGACY)
> + if (gsi >= NR_IRQS_LEGACY) {
> irq = gsi;
> - else
> - irq = gsi_top + gsi;
> + } else {
> + irq = shared_with_legacy(apic, pin);
> + if (irq < 0)
> + irq = gsi_top + gsi;
> + }
> }
>
> #ifdef CONFIG_X86_32
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 9:15 ` Eric W. Biederman
@ 2010-08-03 9:36 ` Yinghai Lu
2010-08-03 11:08 ` Eric W. Biederman
0 siblings, 1 reply; 31+ messages in thread
From: Yinghai Lu @ 2010-08-03 9:36 UTC (permalink / raw)
To: Eric W. Biederman; +Cc: Dave Airlie, LKML, Ingo Molnar
On 08/03/2010 02:15 AM, Eric W. Biederman wrote:
> Yinghai Lu <yinghai@kernel.org> writes:
>
>> On 08/03/2010 01:56 AM, Eric W. Biederman wrote:
>>> Yinghai Lu <yinghai@kernel.org> writes:
>>>
>>>> On 08/03/2010 01:00 AM, Eric W. Biederman wrote:
>>>>> Yinghai Lu <yinghai@kernel.org> writes:
>>>>>
>>>>>>>> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>>>>>> ===================================================================
>>>>>>>> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
>>>>>>>> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
>>>>>>>> @@ -1029,10 +1029,7 @@ static int pin_2_irq(int idx, int apic,
>>>>>>>> } else {
>>>>>>>> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>>>>>>>>
>>>>>>>> - if (gsi >= NR_IRQS_LEGACY)
>>>>>>>> - irq = gsi;
>>>>>>>> - else
>>>>>>>> - irq = gsi_top + gsi;
>>>>>>>> + irq = gsi_to_irq(gsi);
>>>>>>>> }
>>>>>>>>
>>>>>>>> #ifdef CONFIG_X86_32
>>>>>>
>>>>>> what is the point for making irq = gsi_top + gsi when mptable is used instead of acpi?
>>>>>
>>>>> Because it is only convention that when mptables are used that the
>>>>> first apic pins 0-15 are the ISA irqs. This thread witnessed and a
>>>>> pci irq that came in pin < 16 that was not an ISA irq. The truly rare
>>>>> and exotic case would be for the ISA irqs to be outside the first 16
>>>>> ioapic pins but the es7000 did exactly that.
>>>>
>>>> nvidia chipset if acpi is enabled, external pci device will use ioapic from 16 to 23.
>>>>
>>>> if mptable is used, external pci device will not use pin from 16 to 23..., and lot of devices will share same pin.
>>>
>>> Exactly. Pins < 16 are not necessarily ISA irqs, and can be possibly
>>> shared level triggered PCI irqs. Unfortunately there are strange
>>> boards like the es7000 where pins > 16 are ISA irqs.
>>>
>>> The other thing that is gained by having pin_2_irq always remap pins <
>>> 16 is we can get away with the numerous hard codes in the arch/x86 and elsewhere
>>> that assume irq < 16 is an ISA irq.
>>
>> how about this one ?
>
> You can't share an edge triggered ISA irq, it isn't really physically
> possible. So I don't see how this extra complexity will change anything.
>
Dave's system mptble:
MPTABLE: OEM ID: DELL
MPTABLE: Product ID: Dell XPS710
MPTABLE: APIC at: 0xFEE00000
Processor #0 (Bootup-CPU)
Processor #1
Bus #0 is PCI
Bus #1 is PCI
Bus #2 is PCI
Bus #3 is PCI
Bus #4 is PCI
Bus #5 is PCI
Bus #6 is PCI
Bus #7 is PCI
Bus #8 is PCI
Bus #9 is PCI
Bus #10 is ISA
I/O APIC #8 Version 17 at 0xFEC00000.
IOAPIC[0]: apic_id 8, version 17, address 0xfec00000, GSI 0-23
Int: type 0, pol 0, trig 0, bus 0a, IRQ 00, APIC ID 8, APIC INT 00
Int: type 0, pol 0, trig 0, bus 0a, IRQ 01, APIC ID 8, APIC INT 01
Int: type 3, pol 1, trig 1, bus 0a, IRQ 00, APIC ID 8, APIC INT 02
Int: type 0, pol 0, trig 0, bus 0a, IRQ 03, APIC ID 8, APIC INT 03
Int: type 0, pol 0, trig 0, bus 0a, IRQ 04, APIC ID 8, APIC INT 04
Int: type 0, pol 0, trig 0, bus 0a, IRQ 05, APIC ID 8, APIC INT 05
Int: type 0, pol 0, trig 0, bus 0a, IRQ 06, APIC ID 8, APIC INT 06
Int: type 0, pol 0, trig 0, bus 0a, IRQ 07, APIC ID 8, APIC INT 07
Int: type 0, pol 0, trig 0, bus 0a, IRQ 08, APIC ID 8, APIC INT 08
Int: type 0, pol 0, trig 0, bus 0a, IRQ 09, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0a, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0b, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0c, APIC ID 8, APIC INT 0c
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0e, APIC ID 8, APIC INT 0e
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0f, APIC ID 8, APIC INT 0f
Int: type 0, pol 0, trig 0, bus 00, IRQ 28, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 00, IRQ 2c, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 00, IRQ 2d, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 00, IRQ 34, APIC ID 8, APIC INT 0e
Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 00, IRQ 34, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 01, IRQ 00, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 01, IRQ 01, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 01, IRQ 02, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 03, IRQ 00, APIC ID 0, APIC INT 10
Int: type 0, pol 0, trig 0, bus 04, IRQ 00, APIC ID 0, APIC INT 10
Int: type 0, pol 0, trig 0, bus 04, IRQ 01, APIC ID 0, APIC INT 11
Int: type 0, pol 0, trig 0, bus 05, IRQ 00, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 05, IRQ 01, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 05, IRQ 03, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 06, IRQ 00, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 07, IRQ 0c, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 07, IRQ 0e, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 07, IRQ 0f, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 07, IRQ 10, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 07, IRQ 11, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 07, IRQ 12, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 07, IRQ 14, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 07, IRQ 15, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 07, IRQ 17, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 07, IRQ 28, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 08, IRQ 00, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 08, IRQ 01, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 08, IRQ 03, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 09, IRQ 00, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 09, IRQ 01, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 09, IRQ 02, APIC ID 8, APIC INT 09
Lint: type 3, pol 1, trig 1, bus 0a, IRQ 00, APIC ID ff, APIC LINT 00
Lint: type 1, pol 1, trig 1, bus 0a, IRQ 00, APIC ID ff, APIC LINT 01
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 9:36 ` Yinghai Lu
@ 2010-08-03 11:08 ` Eric W. Biederman
2010-08-03 19:45 ` Yinghai Lu
0 siblings, 1 reply; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-03 11:08 UTC (permalink / raw)
To: Yinghai Lu; +Cc: Dave Airlie, LKML, Ingo Molnar
Yinghai Lu <yinghai@kernel.org> writes:
> On 08/03/2010 02:15 AM, Eric W. Biederman wrote:
>> Yinghai Lu <yinghai@kernel.org> writes:
>>
>>
>> You can't share an edge triggered ISA irq, it isn't really physically
>> possible. So I don't see how this extra complexity will change anything.
>>
>
> Dave's system mptble:
Interesting he has ISA irqs on bus #10 on the same apic id and pin as
pci irqs. Blink. I had missed we had that print out.
The immediate issue are these lines:
> Int: type 0, pol 0, trig 0, bus 03, IRQ 00, APIC ID 0, APIC INT 10
> Int: type 0, pol 0, trig 0, bus 04, IRQ 00, APIC ID 0, APIC INT 10
> Int: type 0, pol 0, trig 0, bus 04, IRQ 01, APIC ID 0, APIC INT 11
Which get the apic id wrong, and thus cause us to mishandle them and
get
You are right Dave's mptable does the arguably broken:
> Int: type 0, pol 0, trig 0, bus 00, IRQ 28, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 00, IRQ 34, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 01, IRQ 02, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 05, IRQ 01, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 06, IRQ 00, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 07, IRQ 0c, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 07, IRQ 12, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 07, IRQ 15, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 07, IRQ 28, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 08, IRQ 01, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 09, IRQ 02, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 09, APIC ID 8, APIC INT 09
Where busses 0,1,5,6,7,8,9 result in level triggered interrupts and
bus 0x0a results in an edge triggered interrupt.
As I read the code. First we will do a generic isa setup, marking the
interrupt ioapic table entry edge triggered. Then we will do a pci
setup for any pin we use as pci, and then we will set pin_programmed
stopping us from updating the pin any more, during setup.
For the common case I think we still do the right thing, even now, for
these broken bios tables. There is likely an uncommon case for which
something like your shared_legacy_irq deserves to be used, especially
at it preserves our well tested historical behavior.
Eric
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 11:08 ` Eric W. Biederman
@ 2010-08-03 19:45 ` Yinghai Lu
2010-08-03 20:02 ` Yinghai Lu
2010-08-03 21:38 ` Eric W. Biederman
0 siblings, 2 replies; 31+ messages in thread
From: Yinghai Lu @ 2010-08-03 19:45 UTC (permalink / raw)
To: Dave Airlie, Iranna D Ankad, Gary Hade
Cc: Eric W. Biederman, LKML, Ingo Molnar, Thomas Renninger
On 08/03/2010 04:08 AM, Eric W. Biederman wrote:
>
> For the common case I think we still do the right thing, even now, for
> these broken bios tables. There is likely an uncommon case for which
> something like your shared_legacy_irq deserves to be used, especially
> at it preserves our well tested historical behavior.
Dave, Irnna, Gary:
can you check this patch on your systems?
Thanks
Yinghai
[PATCH] x86: check if apic/pin is shared with legacy one
fix system that external device that have io apic on apic0/pin(0-15)
also
for the io apic out of order system:
<6>ACPI: IOAPIC (id[0x10] address[0xfecff000] gsi_base[0])
<6>IOAPIC[0]: apic_id 16, version 0, address 0xfecff000, GSI 0-2
<6>ACPI: IOAPIC (id[0x0f] address[0xfec00000] gsi_base[3])
<6>IOAPIC[1]: apic_id 15, version 0, address 0xfec00000, GSI 3-38
<6>ACPI: IOAPIC (id[0x0e] address[0xfec01000] gsi_base[39])
<6>IOAPIC[2]: apic_id 14, version 0, address 0xfec01000, GSI 39-74
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 1 global_irq 4 dfl dfl)
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 5 dfl dfl)
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 3 global_irq 6 dfl dfl)
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 4 global_irq 7 dfl dfl)
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 6 global_irq 9 dfl dfl)
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 7 global_irq 10 dfl dfl)
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 8 global_irq 11 low edge)
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 12 dfl dfl)
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 12 global_irq 15 dfl dfl)
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 13 global_irq 16 dfl dfl)
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 14 global_irq 17 low edge)
<6>ACPI: INT_SRC_OVR (bus 0 bus_irq 15 global_irq 18 dfl dfl)
after this patch will get
apic0, pin0, GSI 0: irq 0+75
apic0, pin1, GSI 1: irq 1+75
apic0, pin2, GSI 2: irq 2
apic1, pin0, GSI 3: irq 3+75
apic1, pin5, GSI 8: irq 8+75
apic1, pin10,GSI 13: irq 13+75
apic1, pin11,GSI 14: irq 14+75
because mp_config_acpi_legacy_irqs will put apic0, pin2, irq2 in mp_irqs...
so pin_2_irq_legacy will report 2.
irq_to_gsi will still report 2. so it is right.
gsi_to_irq will report 2.
for GSI 0, 1, 3, 8, 13, 14: still right as before.
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
arch/x86/kernel/apic/io_apic.c | 31 ++++++++++++++++++++++++++++---
1 file changed, 28 insertions(+), 3 deletions(-)
Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
+++ linux-2.6/arch/x86/kernel/apic/io_apic.c
@@ -1013,6 +1013,28 @@ static inline int irq_trigger(int idx)
return MPBIOS_trigger(idx);
}
+static int pin_2_irq_leagcy(int apic, int pin)
+{
+ int i;
+
+ for (i = 0; i < mp_irq_entries; i++) {
+ int bus = mp_irqs[i].srcbus;
+
+ if (!test_bit(bus, mp_bus_not_pci))
+ continue;
+
+ if (mp_ioapics[apic].apicid != mp_irqs[i].dstapic)
+ continue;
+
+ if (mp_irqs[i].dstirq != pin)
+ continue;
+
+ return mp_irqs[i].srcbusirq;
+ }
+
+ return -1;
+}
+
static int pin_2_irq(int idx, int apic, int pin)
{
int irq;
@@ -1029,10 +1051,13 @@ static int pin_2_irq(int idx, int apic,
} else {
u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
- if (gsi >= NR_IRQS_LEGACY)
+ if (gsi >= NR_IRQS_LEGACY) {
irq = gsi;
- else
- irq = gsi_top + gsi;
+ } else {
+ irq = pin_2_irq_legacy(apic, pin);
+ if (irq < 0)
+ irq = gsi_top + gsi;
+ }
}
#ifdef CONFIG_X86_32
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 19:45 ` Yinghai Lu
@ 2010-08-03 20:02 ` Yinghai Lu
2010-08-03 21:38 ` Eric W. Biederman
1 sibling, 0 replies; 31+ messages in thread
From: Yinghai Lu @ 2010-08-03 20:02 UTC (permalink / raw)
To: Dave Airlie, Iranna D Ankad, Gary Hade
Cc: Eric W. Biederman, LKML, Ingo Molnar, Thomas Renninger
On 08/03/2010 12:45 PM, Yinghai Lu wrote:
> On 08/03/2010 04:08 AM, Eric W. Biederman wrote:
>>
>> For the common case I think we still do the right thing, even now, for
>> these broken bios tables. There is likely an uncommon case for which
>> something like your shared_legacy_irq deserves to be used, especially
>> at it preserves our well tested historical behavior.
>
> Dave, Irnna, Gary:
>
> can you check this patch on your systems?
>
> Thanks
>
> Yinghai
>
> [PATCH] x86: check if apic/pin is shared with legacy one
>
> fix system that external device that have io apic on apic0/pin(0-15)
>
> also
> for the io apic out of order system:
> <6>ACPI: IOAPIC (id[0x10] address[0xfecff000] gsi_base[0])
> <6>IOAPIC[0]: apic_id 16, version 0, address 0xfecff000, GSI 0-2
> <6>ACPI: IOAPIC (id[0x0f] address[0xfec00000] gsi_base[3])
> <6>IOAPIC[1]: apic_id 15, version 0, address 0xfec00000, GSI 3-38
> <6>ACPI: IOAPIC (id[0x0e] address[0xfec01000] gsi_base[39])
> <6>IOAPIC[2]: apic_id 14, version 0, address 0xfec01000, GSI 39-74
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 1 global_irq 4 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 5 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 3 global_irq 6 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 4 global_irq 7 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 6 global_irq 9 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 7 global_irq 10 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 8 global_irq 11 low edge)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 12 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 12 global_irq 15 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 13 global_irq 16 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 14 global_irq 17 low edge)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 15 global_irq 18 dfl dfl)
>
> after this patch will get
>
> apic0, pin0, GSI 0: irq 0+75
> apic0, pin1, GSI 1: irq 1+75
> apic0, pin2, GSI 2: irq 2
> apic1, pin0, GSI 3: irq 3+75
> apic1, pin5, GSI 8: irq 8+75
> apic1, pin10,GSI 13: irq 13+75
> apic1, pin11,GSI 14: irq 14+75
>
> because mp_config_acpi_legacy_irqs will put apic0, pin2, irq2 in mp_irqs...
> so pin_2_irq_legacy will report 2.
> irq_to_gsi will still report 2. so it is right.
> gsi_to_irq will report 2.
>
> for GSI 0, 1, 3, 8, 13, 14: still right as before.
>
> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
>
> ---
> arch/x86/kernel/apic/io_apic.c | 31 ++++++++++++++++++++++++++++---
> 1 file changed, 28 insertions(+), 3 deletions(-)
>
> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
> ===================================================================
> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
> @@ -1013,6 +1013,28 @@ static inline int irq_trigger(int idx)
> return MPBIOS_trigger(idx);
> }
>
> +static int pin_2_irq_leagcy(int apic, int pin)
should be pin_2_irq_legacy here..., change the function name without compiling...
> +{
> + int i;
> +
> + for (i = 0; i < mp_irq_entries; i++) {
> + int bus = mp_irqs[i].srcbus;
> +
> + if (!test_bit(bus, mp_bus_not_pci))
> + continue;
> +
> + if (mp_ioapics[apic].apicid != mp_irqs[i].dstapic)
> + continue;
> +
> + if (mp_irqs[i].dstirq != pin)
> + continue;
> +
> + return mp_irqs[i].srcbusirq;
> + }
> +
> + return -1;
> +}
> +
> static int pin_2_irq(int idx, int apic, int pin)
> {
> int irq;
> @@ -1029,10 +1051,13 @@ static int pin_2_irq(int idx, int apic,
> } else {
> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>
> - if (gsi >= NR_IRQS_LEGACY)
> + if (gsi >= NR_IRQS_LEGACY) {
> irq = gsi;
> - else
> - irq = gsi_top + gsi;
> + } else {
> + irq = pin_2_irq_legacy(apic, pin);
> + if (irq < 0)
> + irq = gsi_top + gsi;
> + }
> }
>
> #ifdef CONFIG_X86_32
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 19:45 ` Yinghai Lu
2010-08-03 20:02 ` Yinghai Lu
@ 2010-08-03 21:38 ` Eric W. Biederman
2010-08-03 23:12 ` Dave Airlie
` (3 more replies)
1 sibling, 4 replies; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-03 21:38 UTC (permalink / raw)
To: Yinghai Lu
Cc: Dave Airlie, Iranna D Ankad, Gary Hade, LKML, Ingo Molnar,
Thomas Renninger, H. Peter Anvin
Yinghai Lu <yinghai@kernel.org> writes:
> On 08/03/2010 04:08 AM, Eric W. Biederman wrote:
>>
>> For the common case I think we still do the right thing, even now, for
>> these broken bios tables. There is likely an uncommon case for which
>> something like your shared_legacy_irq deserves to be used, especially
>> at it preserves our well tested historical behavior.
>
> Dave, Irnna, Gary:
>
> can you check this patch on your systems?
>
> Thanks
>
> Yinghai
>
> [PATCH] x86: check if apic/pin is shared with legacy one
>
> fix system that external device that have io apic on apic0/pin(0-15)
Nacked-by: "Eric W. Biederman" <ebiederm@xmission.com>
Your patch addresses what appears to be a theoretical issue, caused by
a BIOS bug. So far you have not presented a credible scenario where
this would affect anything in real life except the user visible irq
number.
Will you please stop, think, and describe what is going on clearly
and how you expect this patch to affect anything, and please stop
selling this patch as the solution to all of the world's ills. You
are being sloppy and wasting everyone's time.
This patch definitely does not solve Dave Airlie's problem. That was
clearly caused by a (ACPI being disabled compared to the test case)
and a bad BIOS provided MP table with an invalid apic_id, and our
attempt to lookup the ioapic and failed.
This patch doesn't have much of a chance of solving the no VGA output
on boot problem. It comes much much to late affect anything there.
> also
> for the io apic out of order system:
> <6>ACPI: IOAPIC (id[0x10] address[0xfecff000] gsi_base[0])
> <6>IOAPIC[0]: apic_id 16, version 0, address 0xfecff000, GSI 0-2
> <6>ACPI: IOAPIC (id[0x0f] address[0xfec00000] gsi_base[3])
> <6>IOAPIC[1]: apic_id 15, version 0, address 0xfec00000, GSI 3-38
> <6>ACPI: IOAPIC (id[0x0e] address[0xfec01000] gsi_base[39])
> <6>IOAPIC[2]: apic_id 14, version 0, address 0xfec01000, GSI 39-74
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 1 global_irq 4 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 5 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 3 global_irq 6 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 4 global_irq 7 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 6 global_irq 9 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 7 global_irq 10 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 8 global_irq 11 low edge)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 12 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 12 global_irq 15 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 13 global_irq 16 dfl dfl)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 14 global_irq 17 low edge)
> <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 15 global_irq 18 dfl dfl)
>
> after this patch will get
>
> apic0, pin0, GSI 0: irq 0+75
> apic0, pin1, GSI 1: irq 1+75
> apic0, pin2, GSI 2: irq 2
> apic1, pin0, GSI 3: irq 3+75
> apic1, pin5, GSI 8: irq 8+75
> apic1, pin10,GSI 13: irq 13+75
> apic1, pin11,GSI 14: irq 14+75
If your description of what this patch will do is correct we very
definitely do not want this patch. For the previously mentioned
acpi tables we want GSI17 -> apic1, pin 14 -> irq 14.
Not that your description is correct, but a buggy description is an
equally valid reason to reject this incarnation of the patch.
> because mp_config_acpi_legacy_irqs will put apic0, pin2, irq2 in mp_irqs...
> so pin_2_irq_legacy will report 2.
> irq_to_gsi will still report 2. so it is right.
> gsi_to_irq will report 2.
>
> for GSI 0, 1, 3, 8, 13, 14: still right as before.
YH you have a point that a certain class of buggy firmware exists,
that reports some ioapic pins as both edge triggered ISA irqs
and level triggered PCI irqs, and assigning different irqs to the
same ioapic pin is confusing and suboptimal.
In practice I don't see that behavior affecting how we program that
pin, especially since I don't expect any bios that exports that setup
to actually use the ISA irq. So we should just have an unused irq
number.
A clean solution would be to scrub the input from the MP table before
we attempt to use of it, instead of scrubbing the data as we use in
code paths like pin_2_irq. Just touching pin_2_irq is certainly an
incomplete solution because you have not resolved if the pins should
be edge or level triggered, and what polarity we should be sampling
them at.
Until I see a plausible scenario where not handling buggy MP tables
exactly as we have done in the past I don't see hacks like you
are proposing making much sense at all.
Eric
> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
>
> ---
> arch/x86/kernel/apic/io_apic.c | 31 ++++++++++++++++++++++++++++---
> 1 file changed, 28 insertions(+), 3 deletions(-)
>
> Index: linux-2.6/arch/x86/kernel/apic/io_apic.c
> ===================================================================
> --- linux-2.6.orig/arch/x86/kernel/apic/io_apic.c
> +++ linux-2.6/arch/x86/kernel/apic/io_apic.c
> @@ -1013,6 +1013,28 @@ static inline int irq_trigger(int idx)
> return MPBIOS_trigger(idx);
> }
>
> +static int pin_2_irq_leagcy(int apic, int pin)
> +{
> + int i;
> +
> + for (i = 0; i < mp_irq_entries; i++) {
> + int bus = mp_irqs[i].srcbus;
> +
> + if (!test_bit(bus, mp_bus_not_pci))
> + continue;
> +
> + if (mp_ioapics[apic].apicid != mp_irqs[i].dstapic)
> + continue;
> +
> + if (mp_irqs[i].dstirq != pin)
> + continue;
> +
> + return mp_irqs[i].srcbusirq;
> + }
> +
> + return -1;
> +}
> +
> static int pin_2_irq(int idx, int apic, int pin)
> {
> int irq;
> @@ -1029,10 +1051,13 @@ static int pin_2_irq(int idx, int apic,
> } else {
> u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
>
> - if (gsi >= NR_IRQS_LEGACY)
> + if (gsi >= NR_IRQS_LEGACY) {
> irq = gsi;
> - else
> - irq = gsi_top + gsi;
> + } else {
> + irq = pin_2_irq_legacy(apic, pin);
> + if (irq < 0)
> + irq = gsi_top + gsi;
> + }
> }
>
> #ifdef CONFIG_X86_32
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 21:38 ` Eric W. Biederman
@ 2010-08-03 23:12 ` Dave Airlie
2010-08-04 0:00 ` Yinghai Lu
` (2 subsequent siblings)
3 siblings, 0 replies; 31+ messages in thread
From: Dave Airlie @ 2010-08-03 23:12 UTC (permalink / raw)
To: Eric W. Biederman
Cc: Yinghai Lu, Iranna D Ankad, Gary Hade, LKML, Ingo Molnar,
Thomas Renninger, H. Peter Anvin
On Wed, Aug 4, 2010 at 7:38 AM, Eric W. Biederman <ebiederm@xmission.com> wrote:
> Yinghai Lu <yinghai@kernel.org> writes:
>
>> On 08/03/2010 04:08 AM, Eric W. Biederman wrote:
>>>
>>> For the common case I think we still do the right thing, even now, for
>>> these broken bios tables. There is likely an uncommon case for which
>>> something like your shared_legacy_irq deserves to be used, especially
>>> at it preserves our well tested historical behavior.
>>
>> Dave, Irnna, Gary:
>>
>> can you check this patch on your systems?
>
>
>
>>
>> Thanks
>>
>> Yinghai
>>
>> [PATCH] x86: check if apic/pin is shared with legacy one
>>
>> fix system that external device that have io apic on apic0/pin(0-15)
>
> Nacked-by: "Eric W. Biederman" <ebiederm@xmission.com>
>
> Your patch addresses what appears to be a theoretical issue, caused by
> a BIOS bug. So far you have not presented a credible scenario where
> this would affect anything in real life except the user visible irq
> number.
>
> Will you please stop, think, and describe what is going on clearly
> and how you expect this patch to affect anything, and please stop
> selling this patch as the solution to all of the world's ills. You
> are being sloppy and wasting everyone's time.
>
> This patch definitely does not solve Dave Airlie's problem. That was
> clearly caused by a (ACPI being disabled compared to the test case)
> and a bad BIOS provided MP table with an invalid apic_id, and our
> attempt to lookup the ioapic and failed.
Oh wow, I totally missed I had ACPI off on this build, I turned it off
a few kernels back to test the build didn't break, and forgot to turn
it back on.
So clearly my mptable is just busted and we can probably move along,
I'll rebuild/boot with ACPI now, and I think you can assume it works
fine unless I get back to you.
Thanks, and sorry for wasting time.
Dave.
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 21:38 ` Eric W. Biederman
2010-08-03 23:12 ` Dave Airlie
@ 2010-08-04 0:00 ` Yinghai Lu
2010-08-04 1:19 ` Eric W. Biederman
2010-08-04 7:33 ` Ingo Molnar
2010-08-04 8:59 ` Yinghai Lu
3 siblings, 1 reply; 31+ messages in thread
From: Yinghai Lu @ 2010-08-04 0:00 UTC (permalink / raw)
To: Eric W. Biederman
Cc: Dave Airlie, Iranna D Ankad, Gary Hade, LKML, Ingo Molnar,
Thomas Renninger, H. Peter Anvin
On 08/03/2010 02:38 PM, Eric W. Biederman wrote:
> Yinghai Lu <yinghai@kernel.org> writes:
>
>> On 08/03/2010 04:08 AM, Eric W. Biederman wrote:
>>>
>>> For the common case I think we still do the right thing, even now, for
>>> these broken bios tables. There is likely an uncommon case for which
>>> something like your shared_legacy_irq deserves to be used, especially
>>> at it preserves our well tested historical behavior.
>>
>> Dave, Irnna, Gary:
>>
>> can you check this patch on your systems?
>>
>> [PATCH] x86: check if apic/pin is shared with legacy one
>>
>> fix system that external device that have io apic on apic0/pin(0-15)
>
> Nacked-by: "Eric W. Biederman" <ebiederm@xmission.com>
>
> Your patch addresses what appears to be a theoretical issue, caused by
> a BIOS bug. So far you have not presented a credible scenario where
> this would affect anything in real life except the user visible irq
> number.
>
> Will you please stop, think, and describe what is going on clearly
> and how you expect this patch to affect anything, and please stop
> selling this patch as the solution to all of the world's ills. You
> are being sloppy and wasting everyone's time.
That is real problem in pin_2_irq()
Nvidia chipset system with legacy bios will have problem when user try to boot with acpi is disabled.
LinuxBIOS should be ok, already have external devices to use pin above 15.
Also your patch does cause kernel crash when acpi is disabled in virtualbox even there
could be BIOS problem there.
kernel before your patch does work in that conf.
Yinghai
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-04 0:00 ` Yinghai Lu
@ 2010-08-04 1:19 ` Eric W. Biederman
0 siblings, 0 replies; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-04 1:19 UTC (permalink / raw)
To: Yinghai Lu
Cc: Dave Airlie, Iranna D Ankad, Gary Hade, LKML, Ingo Molnar,
Thomas Renninger, H. Peter Anvin
Yinghai Lu <yinghai@kernel.org> writes:
> On 08/03/2010 02:38 PM, Eric W. Biederman wrote:
>> Yinghai Lu <yinghai@kernel.org> writes:
>>
>>> On 08/03/2010 04:08 AM, Eric W. Biederman wrote:
>>>>
>>>> For the common case I think we still do the right thing, even now, for
>>>> these broken bios tables. There is likely an uncommon case for which
>>>> something like your shared_legacy_irq deserves to be used, especially
>>>> at it preserves our well tested historical behavior.
>>>
>>> Dave, Irnna, Gary:
>>>
>>> can you check this patch on your systems?
>>>
>>> [PATCH] x86: check if apic/pin is shared with legacy one
>>>
>>> fix system that external device that have io apic on apic0/pin(0-15)
>>
>> Nacked-by: "Eric W. Biederman" <ebiederm@xmission.com>
>>
>> Your patch addresses what appears to be a theoretical issue, caused by
>> a BIOS bug. So far you have not presented a credible scenario where
>> this would affect anything in real life except the user visible irq
>> number.
>>
>> Will you please stop, think, and describe what is going on clearly
>> and how you expect this patch to affect anything, and please stop
>> selling this patch as the solution to all of the world's ills. You
>> are being sloppy and wasting everyone's time.
>
> That is real problem in pin_2_irq()
>
> Nvidia chipset system with legacy bios will have problem when user try to boot with acpi is disabled.
> LinuxBIOS should be ok, already have external devices to use pin above 15.
The Nvidia chipset will have what problem?
> Also your patch does cause kernel crash when acpi is disabled in virtualbox even there
> could be BIOS problem there.
> kernel before your patch does work in that conf.
What is the kernel crash?
I believe you have told me earlier that the problems you see with 2.6.35 are
roughly, while those setups work with 2.3.34?
> cause kernel with acpi crash in virtual box.
>
> [ 5.536000] querying PCI -> IRQ mapping bus:0, slot:11, pin:0.
> [ 5.540000] ehci_hcd 0000:00:0b.0: can't find IRQ for PCI INT A; probably buggy MP table
> [
>
> and on kvm it got:
> [ 4.352280] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k6-NAPI
> [ 4.356012] e1000: Copyright (c) 1999-2006 Intel Corporation.
> [ 4.360120] querying PCI -> IRQ mapping bus:0, slot:3, pin:0.
> [ 4.364006] PCI BIOS passed nonexistent PCI bus 0!
> [ 4.368007] e1000 0000:00:03.0: can't find IRQ for PCI INT A; probably buggy MP table
> [ 4.372049] e1000 0000:00:03.0: setting latency timer to 64
Can you send out boot log with "debug apic=debug pci=routeirq" for the
working 2.6.34, the failing 2.6.35, and your .config?
With a little luck that will be enough to allow us to pinpoint the
problem case.
Eric
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 21:38 ` Eric W. Biederman
2010-08-03 23:12 ` Dave Airlie
2010-08-04 0:00 ` Yinghai Lu
@ 2010-08-04 7:33 ` Ingo Molnar
2010-08-04 8:59 ` Yinghai Lu
3 siblings, 0 replies; 31+ messages in thread
From: Ingo Molnar @ 2010-08-04 7:33 UTC (permalink / raw)
To: Eric W. Biederman
Cc: Yinghai Lu, Dave Airlie, Iranna D Ankad, Gary Hade, LKML,
Thomas Renninger, H. Peter Anvin
* Eric W. Biederman <ebiederm@xmission.com> wrote:
> This patch definitely does not solve Dave Airlie's problem. That was
> clearly caused by a (ACPI being disabled compared to the test case) and a
> bad BIOS provided MP table with an invalid apic_id, and our attempt to
> lookup the ioapic and failed.
The kernel should not crash obviously, so that's a bug that has to be
addressed - or failing any timely resolution the original patch which
introduced the regression [if it's a regression] needs to be reverted.
Thanks,
Ingo
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-03 21:38 ` Eric W. Biederman
` (2 preceding siblings ...)
2010-08-04 7:33 ` Ingo Molnar
@ 2010-08-04 8:59 ` Yinghai Lu
2010-08-04 9:26 ` Ingo Molnar
2010-08-04 12:12 ` Eric W. Biederman
3 siblings, 2 replies; 31+ messages in thread
From: Yinghai Lu @ 2010-08-04 8:59 UTC (permalink / raw)
To: Eric W. Biederman
Cc: Dave Airlie, Iranna D Ankad, Gary Hade, LKML, Ingo Molnar,
Thomas Renninger, H. Peter Anvin
On 08/03/2010 02:38 PM, Eric W. Biederman wrote:
>
> A clean solution would be to scrub the input from the MP table before
> we attempt to use of it, instead of scrubbing the data as we use in
> code paths like pin_2_irq. Just touching pin_2_irq is certainly an
> incomplete solution because you have not resolved if the pins should
> be edge or level triggered, and what polarity we should be sampling
> them at.
>
> Until I see a plausible scenario where not handling buggy MP tables
> exactly as we have done in the past I don't see hacks like you
> are proposing making much sense at all.
ok, how about this one?
it will try to add entries to mp_irqs[] with some checking.
Yinghai
---
arch/x86/kernel/mpparse.c | 44 +++++++++++++++++++++++++++++++++++++-------
1 file changed, 37 insertions(+), 7 deletions(-)
Index: linux-2.6/arch/x86/kernel/mpparse.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/mpparse.c
+++ linux-2.6/arch/x86/kernel/mpparse.c
@@ -173,17 +173,17 @@ static int __init mp_irq_mpc_intsrc_cmp(
{
if (mp_irq->dstapic != m->dstapic)
return 1;
- if (mp_irq->type != m->type)
+ if (mp_irq->dstirq != m->dstirq)
return 2;
- if (mp_irq->irqtype != m->irqtype)
+ if (mp_irq->srcbus != m->srcbus)
return 3;
- if (mp_irq->irqflag != m->irqflag)
+ if (mp_irq->type != m->type)
return 4;
- if (mp_irq->srcbus != m->srcbus)
+ if (mp_irq->irqtype != m->irqtype)
return 5;
- if (mp_irq->srcbusirq != m->srcbusirq)
+ if (mp_irq->irqflag != m->irqflag)
return 6;
- if (mp_irq->dstirq != m->dstirq)
+ if (mp_irq->srcbusirq != m->srcbusirq)
return 7;
return 0;
@@ -195,9 +195,39 @@ static void __init MP_intsrc_info(struct
print_MP_intsrc_info(m);
+ /*
+ * Assume BUS, and IOAPIC entries come first all before
+ * INTSRC entries
+ */
+
+ /* check if dstapic is right */
+ for (i = 0; i < nr_ioapics; i++) {
+ if (mp_ioapics[idx].apicid == m->dstapic)
+ break;
+ }
+ if (i == nr_ioapics)
+ return;
+
for (i = 0; i < mp_irq_entries; i++) {
- if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
+ int ret = mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m);
+
+ /* duplicated entries ? */
+ if (!ret)
return;
+
+ /* same apic/pin, but different bus */
+ if (ret == 3) {
+ /* overwrite wrong legacy one */
+ if (test_bit(mp_irqs[i].srcbus, mp_bus_not_pci) &&
+ !test_bit(m->srcbus, mp_bus_not_pci)) {
+ assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
+ return;
+ }
+ /* dump this legacy one */
+ if (!test_bit(mp_irqs[i].srcbus, mp_bus_not_pci) &&
+ test_bit(m->srcbus, mp_bus_not_pci))
+ return;
+ }
}
assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-04 8:59 ` Yinghai Lu
@ 2010-08-04 9:26 ` Ingo Molnar
2010-08-04 12:12 ` Eric W. Biederman
1 sibling, 0 replies; 31+ messages in thread
From: Ingo Molnar @ 2010-08-04 9:26 UTC (permalink / raw)
To: Yinghai Lu
Cc: Eric W. Biederman, Dave Airlie, Iranna D Ankad, Gary Hade, LKML,
Thomas Renninger, H. Peter Anvin
* Yinghai Lu <yinghai@kernel.org> wrote:
> On 08/03/2010 02:38 PM, Eric W. Biederman wrote:
> >
> > A clean solution would be to scrub the input from the MP table before
> > we attempt to use of it, instead of scrubbing the data as we use in
> > code paths like pin_2_irq. Just touching pin_2_irq is certainly an
> > incomplete solution because you have not resolved if the pins should
> > be edge or level triggered, and what polarity we should be sampling
> > them at.
> >
> > Until I see a plausible scenario where not handling buggy MP tables
> > exactly as we have done in the past I don't see hacks like you
> > are proposing making much sense at all.
>
> ok, how about this one?
>
> it will try to add entries to mp_irqs[] with some checking.
Yep, more sanity testing of BIOS data is welcome.
Ingo
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-04 8:59 ` Yinghai Lu
2010-08-04 9:26 ` Ingo Molnar
@ 2010-08-04 12:12 ` Eric W. Biederman
2010-08-04 19:22 ` Yinghai Lu
1 sibling, 1 reply; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-04 12:12 UTC (permalink / raw)
To: Yinghai Lu
Cc: Dave Airlie, Iranna D Ankad, Gary Hade, LKML, Ingo Molnar,
Thomas Renninger, H. Peter Anvin
Yinghai Lu <yinghai@kernel.org> writes:
> On 08/03/2010 02:38 PM, Eric W. Biederman wrote:
>>
>> A clean solution would be to scrub the input from the MP table before
>> we attempt to use of it, instead of scrubbing the data as we use in
>> code paths like pin_2_irq. Just touching pin_2_irq is certainly an
>> incomplete solution because you have not resolved if the pins should
>> be edge or level triggered, and what polarity we should be sampling
>> them at.
>>
>> Until I see a plausible scenario where not handling buggy MP tables
>> exactly as we have done in the past I don't see hacks like you
>> are proposing making much sense at all.
>
> ok, how about this one?
>
> it will try to add entries to mp_irqs[] with some checking.
This looks roughly like the right approach.
However I don't see what would force the ioapic entries before
the intsrc entries in the table. Especially when the assumption
is we are dealing with a buggy bios.
> ---
> arch/x86/kernel/mpparse.c | 44 +++++++++++++++++++++++++++++++++++++-------
> 1 file changed, 37 insertions(+), 7 deletions(-)
>
> Index: linux-2.6/arch/x86/kernel/mpparse.c
> ===================================================================
> --- linux-2.6.orig/arch/x86/kernel/mpparse.c
> +++ linux-2.6/arch/x86/kernel/mpparse.c
> @@ -173,17 +173,17 @@ static int __init mp_irq_mpc_intsrc_cmp(
> {
> if (mp_irq->dstapic != m->dstapic)
> return 1;
> - if (mp_irq->type != m->type)
> + if (mp_irq->dstirq != m->dstirq)
> return 2;
> - if (mp_irq->irqtype != m->irqtype)
> + if (mp_irq->srcbus != m->srcbus)
> return 3;
> - if (mp_irq->irqflag != m->irqflag)
> + if (mp_irq->type != m->type)
> return 4;
> - if (mp_irq->srcbus != m->srcbus)
> + if (mp_irq->irqtype != m->irqtype)
> return 5;
> - if (mp_irq->srcbusirq != m->srcbusirq)
> + if (mp_irq->irqflag != m->irqflag)
> return 6;
> - if (mp_irq->dstirq != m->dstirq)
> + if (mp_irq->srcbusirq != m->srcbusirq)
> return 7;
>
> return 0;
> @@ -195,9 +195,39 @@ static void __init MP_intsrc_info(struct
>
> print_MP_intsrc_info(m);
>
> + /*
> + * Assume BUS, and IOAPIC entries come first all before
> + * INTSRC entries
> + */
> +
> + /* check if dstapic is right */
> + for (i = 0; i < nr_ioapics; i++) {
> + if (mp_ioapics[idx].apicid == m->dstapic)
> + break;
> + }
> + if (i == nr_ioapics)
> + return;
If we can make the algorithm two pass picking up the ioapic
entries first this should be fine.
> for (i = 0; i < mp_irq_entries; i++) {
> - if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
> + int ret = mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m);
> +
> + /* duplicated entries ? */
> + if (!ret)
> return;
> +
> + /* same apic/pin, but different bus */
> + if (ret == 3) {
> + /* overwrite wrong legacy one */
In practice your test of looking at mp_bus_not_pci is essentially what
we do. I wonder if it could be made to be a test of polarity and edge
mismatch instead.
Also if we are ditching a non-duplicate intsrc we want to print a message
so there is a chance of debugging things if our heuristic for fixing
up broken BIOS's goes wrong, on some common configuration.
> + if (test_bit(mp_irqs[i].srcbus, mp_bus_not_pci) &&
> + !test_bit(m->srcbus, mp_bus_not_pci)) {
> + assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
That should be.
> + assign_to_mp_irq(m, &mp_irqs[i]);
> + return;
> + }
> + /* dump this legacy one */
> + if (!test_bit(mp_irqs[i].srcbus, mp_bus_not_pci) &&
> + test_bit(m->srcbus, mp_bus_not_pci))
> + return;
> + }
> }
>
> assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
Eric
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-04 12:12 ` Eric W. Biederman
@ 2010-08-04 19:22 ` Yinghai Lu
2010-08-04 20:34 ` Eric W. Biederman
0 siblings, 1 reply; 31+ messages in thread
From: Yinghai Lu @ 2010-08-04 19:22 UTC (permalink / raw)
To: Eric W. Biederman
Cc: Dave Airlie, Iranna D Ankad, Gary Hade, LKML, Ingo Molnar,
Thomas Renninger, H. Peter Anvin
On 08/04/2010 05:12 AM, Eric W. Biederman wrote:
>
> In practice your test of looking at mp_bus_not_pci is essentially what
> we do. I wonder if it could be made to be a test of polarity and edge
> mismatch instead.
>
Dave's system mptable pol and trig is wrong ...
Int: type 0, pol 0, trig 0, bus 0a, IRQ 00, APIC ID 8, APIC INT 00
Int: type 0, pol 0, trig 0, bus 0a, IRQ 01, APIC ID 8, APIC INT 01
Int: type 3, pol 1, trig 1, bus 0a, IRQ 00, APIC ID 8, APIC INT 02
Int: type 0, pol 0, trig 0, bus 0a, IRQ 03, APIC ID 8, APIC INT 03
Int: type 0, pol 0, trig 0, bus 0a, IRQ 04, APIC ID 8, APIC INT 04
Int: type 0, pol 0, trig 0, bus 0a, IRQ 05, APIC ID 8, APIC INT 05
Int: type 0, pol 0, trig 0, bus 0a, IRQ 06, APIC ID 8, APIC INT 06
Int: type 0, pol 0, trig 0, bus 0a, IRQ 07, APIC ID 8, APIC INT 07
Int: type 0, pol 0, trig 0, bus 0a, IRQ 08, APIC ID 8, APIC INT 08
Int: type 0, pol 0, trig 0, bus 0a, IRQ 09, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0a, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0b, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0c, APIC ID 8, APIC INT 0c
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0e, APIC ID 8, APIC INT 0e
Int: type 0, pol 0, trig 0, bus 0a, IRQ 0f, APIC ID 8, APIC INT 0f
Int: type 0, pol 0, trig 0, bus 00, IRQ 28, APIC ID 8, APIC INT 09
Int: type 0, pol 0, trig 0, bus 00, IRQ 2c, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 00, IRQ 2d, APIC ID 8, APIC INT 0a
Int: type 0, pol 0, trig 0, bus 00, IRQ 34, APIC ID 8, APIC INT 0e
Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
Do you mean check pol/trig in addition to bus in this case?
Yinghai
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-04 19:22 ` Yinghai Lu
@ 2010-08-04 20:34 ` Eric W. Biederman
2010-08-04 22:06 ` Yinghai Lu
0 siblings, 1 reply; 31+ messages in thread
From: Eric W. Biederman @ 2010-08-04 20:34 UTC (permalink / raw)
To: Yinghai Lu
Cc: Dave Airlie, Iranna D Ankad, Gary Hade, LKML, Ingo Molnar,
Thomas Renninger, H. Peter Anvin
Yinghai Lu <yinghai@kernel.org> writes:
> On 08/04/2010 05:12 AM, Eric W. Biederman wrote:
>
>
>>
>> In practice your test of looking at mp_bus_not_pci is essentially what
>> we do. I wonder if it could be made to be a test of polarity and edge
>> mismatch instead.
>>
>
> Dave's system mptable pol and trig is wrong ...
The are inconsistent. Everything is set to the default for the bus.
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 00, APIC ID 8, APIC INT 00
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 01, APIC ID 8, APIC INT 01
> Int: type 3, pol 1, trig 1, bus 0a, IRQ 00, APIC ID 8, APIC INT 02
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 03, APIC ID 8, APIC INT 03
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 04, APIC ID 8, APIC INT 04
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 05, APIC ID 8, APIC INT 05
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 06, APIC ID 8, APIC INT 06
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 07, APIC ID 8, APIC INT 07
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 08, APIC ID 8, APIC INT 08
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 09, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 0a, APIC ID 8, APIC INT 0a
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 0b, APIC ID 8, APIC INT 0b
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 0c, APIC ID 8, APIC INT 0c
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 0e, APIC ID 8, APIC INT 0e
> Int: type 0, pol 0, trig 0, bus 0a, IRQ 0f, APIC ID 8, APIC INT 0f
> Int: type 0, pol 0, trig 0, bus 00, IRQ 28, APIC ID 8, APIC INT 09
> Int: type 0, pol 0, trig 0, bus 00, IRQ 2c, APIC ID 8, APIC INT 0a
> Int: type 0, pol 0, trig 0, bus 00, IRQ 2d, APIC ID 8, APIC INT 0a
> Int: type 0, pol 0, trig 0, bus 00, IRQ 34, APIC ID 8, APIC INT 0e
> Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
> Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
> Int: type 0, pol 0, trig 0, bus 00, IRQ 38, APIC ID 8, APIC INT 0b
>
> Do you mean check pol/trig in addition to bus in this case?
No. I was thinking it would be nice if we could check the
polarity and the irq trigger mode in this case. Unfortunately
I don't think we have access to everything thing we need to perform
that check this early.
Eric
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: oops in ioapic_write_entry
2010-08-04 20:34 ` Eric W. Biederman
@ 2010-08-04 22:06 ` Yinghai Lu
0 siblings, 0 replies; 31+ messages in thread
From: Yinghai Lu @ 2010-08-04 22:06 UTC (permalink / raw)
To: Eric W. Biederman
Cc: Dave Airlie, Iranna D Ankad, Gary Hade, LKML, Ingo Molnar,
Thomas Renninger, H. Peter Anvin
Please check if this one address your concerns.
Thanks
Yinghai
---
arch/x86/kernel/mpparse.c | 88 ++++++++++++++++++++++++++++++++++++++++------
1 file changed, 77 insertions(+), 11 deletions(-)
Index: linux-2.6/arch/x86/kernel/mpparse.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/mpparse.c
+++ linux-2.6/arch/x86/kernel/mpparse.c
@@ -173,17 +173,17 @@ static int __init mp_irq_mpc_intsrc_cmp(
{
if (mp_irq->dstapic != m->dstapic)
return 1;
- if (mp_irq->type != m->type)
+ if (mp_irq->dstirq != m->dstirq)
return 2;
- if (mp_irq->irqtype != m->irqtype)
+ if (mp_irq->srcbus != m->srcbus)
return 3;
- if (mp_irq->irqflag != m->irqflag)
+ if (mp_irq->type != m->type)
return 4;
- if (mp_irq->srcbus != m->srcbus)
+ if (mp_irq->irqtype != m->irqtype)
return 5;
- if (mp_irq->srcbusirq != m->srcbusirq)
+ if (mp_irq->irqflag != m->irqflag)
return 6;
- if (mp_irq->dstirq != m->dstirq)
+ if (mp_irq->srcbusirq != m->srcbusirq)
return 7;
return 0;
@@ -195,9 +195,45 @@ static void __init MP_intsrc_info(struct
print_MP_intsrc_info(m);
+ /*
+ * All BUS, and IOAPIC entries are processed already
+ */
+
+ /* check if dstapic is right */
+ for (i = 0; i < nr_ioapics; i++) {
+ if (mp_ioapics[i].apicid == m->dstapic)
+ break;
+ }
+ if (i == nr_ioapics) {
+ apic_printk(APIC_VERBOSE, "intsrc with wrong apic id is skipped\n");
+ return;
+ }
+
for (i = 0; i < mp_irq_entries; i++) {
- if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
+ int ret = mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m);
+
+ /* duplicated entries ? */
+ if (!ret) {
+ apic_printk(APIC_VERBOSE, "Duplicated intsrc is skipped\n");
return;
+ }
+
+ /* same apic/pin, but different bus */
+ if (ret == 3) {
+ /* overwrite wrong legacy one */
+ if (test_bit(mp_irqs[i].srcbus, mp_bus_not_pci) &&
+ !test_bit(m->srcbus, mp_bus_not_pci)) {
+ apic_printk(APIC_VERBOSE, "Wrong legacy entry with same apic/pin is removed\n");
+ assign_to_mp_irq(m, &mp_irqs[i]);
+ return;
+ }
+ /* dump this legacy one */
+ if (!test_bit(mp_irqs[i].srcbus, mp_bus_not_pci) &&
+ test_bit(m->srcbus, mp_bus_not_pci)) {
+ apic_printk(APIC_VERBOSE, "Wrong legacy entry is skipped\n");
+ return;
+ }
+ }
}
assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
@@ -280,8 +316,8 @@ static int __init smp_read_mpc(struct mp
char str[16];
char oem[10];
- int count = sizeof(*mpc);
- unsigned char *mpt = ((unsigned char *)mpc) + count;
+ int count;
+ unsigned char *mpt;
if (!smp_check_mpc(mpc, oem, str))
return 0;
@@ -305,8 +341,9 @@ static int __init smp_read_mpc(struct mp
/*
* Now process the configuration blocks.
*/
+ count = sizeof(*mpc);
+ mpt = ((unsigned char *)mpc) + count;
x86_init.mpparse.mpc_record(0);
-
while (count < mpc->length) {
switch (*mpt) {
case MP_PROCESSOR:
@@ -324,7 +361,7 @@ static int __init smp_read_mpc(struct mp
skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
break;
case MP_INTSRC:
- MP_intsrc_info((struct mpc_intsrc *)mpt);
+ /* check that next pass */
skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
break;
case MP_LINTSRC:
@@ -337,6 +374,35 @@ static int __init smp_read_mpc(struct mp
count = mpc->length;
break;
}
+ x86_init.mpparse.mpc_record(1);
+ }
+
+ /* second pass for INTSRC */
+ count = sizeof(*mpc);
+ mpt = ((unsigned char *)mpc) + count;
+ x86_init.mpparse.mpc_record(0);
+ while (count < mpc->length) {
+ switch (*mpt) {
+ case MP_PROCESSOR:
+ skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
+ break;
+ case MP_BUS:
+ skip_entry(&mpt, &count, sizeof(struct mpc_bus));
+ break;
+ case MP_IOAPIC:
+ skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
+ break;
+ case MP_INTSRC:
+ MP_intsrc_info((struct mpc_intsrc *)mpt);
+ skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
+ break;
+ case MP_LINTSRC:
+ skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
+ break;
+ default:
+ count = mpc->length;
+ break;
+ }
x86_init.mpparse.mpc_record(1);
}
^ permalink raw reply [flat|nested] 31+ messages in thread
end of thread, other threads:[~2010-08-04 22:07 UTC | newest]
Thread overview: 31+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-08-02 5:28 oops in ioapic_write_entry Dave Airlie
2010-08-02 6:49 ` Yinghai Lu
2010-08-02 23:17 ` Dave Airlie
2010-08-03 1:32 ` Yinghai Lu
2010-08-03 1:34 ` Yinghai Lu
2010-08-03 3:13 ` Eric W. Biederman
2010-08-03 7:19 ` Yinghai Lu
2010-08-03 8:00 ` Eric W. Biederman
2010-08-03 8:04 ` Yinghai Lu
2010-08-03 8:56 ` Eric W. Biederman
2010-08-03 9:01 ` Yinghai Lu
2010-08-03 9:15 ` Eric W. Biederman
2010-08-03 9:36 ` Yinghai Lu
2010-08-03 11:08 ` Eric W. Biederman
2010-08-03 19:45 ` Yinghai Lu
2010-08-03 20:02 ` Yinghai Lu
2010-08-03 21:38 ` Eric W. Biederman
2010-08-03 23:12 ` Dave Airlie
2010-08-04 0:00 ` Yinghai Lu
2010-08-04 1:19 ` Eric W. Biederman
2010-08-04 7:33 ` Ingo Molnar
2010-08-04 8:59 ` Yinghai Lu
2010-08-04 9:26 ` Ingo Molnar
2010-08-04 12:12 ` Eric W. Biederman
2010-08-04 19:22 ` Yinghai Lu
2010-08-04 20:34 ` Eric W. Biederman
2010-08-04 22:06 ` Yinghai Lu
2010-08-03 8:00 ` Yinghai Lu
2010-08-03 8:27 ` Eric W. Biederman
2010-08-03 3:26 ` Eric W. Biederman
[not found] ` <AANLkTi=qtLkY0=h77=EVL+y1q41b_cMBODvL4Hu6A6wL@mail.gmail.com>
2010-08-03 6:00 ` Eric W. Biederman
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