* [PATCH] docs/system: riscv: Update description of CPU
@ 2022-02-08 13:07 ` Yu Li
0 siblings, 0 replies; 8+ messages in thread
From: Yu Li @ 2022-02-08 13:07 UTC (permalink / raw)
To: qemu-devel, qemu-riscv; +Cc: bmeng.cn, alistair.francis, liyu.yukiteru
Since the hypervisor extension been non experimental and enabled for
default CPU, the previous command is no longer available and the
option `x-h=true` or `h=true` is also no longer required.
Signed-off-by: Yu Li <liyu.yukiteru@bytedance.com>
---
docs/system/riscv/virt.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
index fa016584bf..08ce3c4177 100644
--- a/docs/system/riscv/virt.rst
+++ b/docs/system/riscv/virt.rst
@@ -23,9 +23,9 @@ The ``virt`` machine supports the following devices:
* 1 generic PCIe host bridge
* The fw_cfg device that allows a guest to obtain data from QEMU
-Note that the default CPU is a generic RV32GC/RV64GC. Optional extensions
-can be enabled via command line parameters, e.g.: ``-cpu rv64,x-h=true``
-enables the hypervisor extension for RV64.
+The hypervisor extension has been enabled for the default CPU, so virtual
+machines with hypervisor extension can simply be used without explicitly
+declaring.
Hardware configuration information
----------------------------------
--
2.20.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH] docs/system: riscv: Update description of CPU
@ 2022-02-08 13:07 ` Yu Li
0 siblings, 0 replies; 8+ messages in thread
From: Yu Li @ 2022-02-08 13:07 UTC (permalink / raw)
To: qemu-devel, qemu-riscv; +Cc: alistair.francis, bmeng.cn, liyu.yukiteru
Since the hypervisor extension been non experimental and enabled for
default CPU, the previous command is no longer available and the
option `x-h=true` or `h=true` is also no longer required.
Signed-off-by: Yu Li <liyu.yukiteru@bytedance.com>
---
docs/system/riscv/virt.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
index fa016584bf..08ce3c4177 100644
--- a/docs/system/riscv/virt.rst
+++ b/docs/system/riscv/virt.rst
@@ -23,9 +23,9 @@ The ``virt`` machine supports the following devices:
* 1 generic PCIe host bridge
* The fw_cfg device that allows a guest to obtain data from QEMU
-Note that the default CPU is a generic RV32GC/RV64GC. Optional extensions
-can be enabled via command line parameters, e.g.: ``-cpu rv64,x-h=true``
-enables the hypervisor extension for RV64.
+The hypervisor extension has been enabled for the default CPU, so virtual
+machines with hypervisor extension can simply be used without explicitly
+declaring.
Hardware configuration information
----------------------------------
--
2.20.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH] docs/system: riscv: Update description of CPU
2022-02-08 13:07 ` Yu Li
@ 2022-02-10 1:28 ` Alistair Francis
-1 siblings, 0 replies; 8+ messages in thread
From: Alistair Francis @ 2022-02-10 1:28 UTC (permalink / raw)
To: Yu Li
Cc: Alistair Francis, Bin Meng, open list:RISC-V,
qemu-devel@nongnu.org Developers
On Wed, Feb 9, 2022 at 1:49 AM Yu Li <liyu.yukiteru@bytedance.com> wrote:
>
> Since the hypervisor extension been non experimental and enabled for
> default CPU, the previous command is no longer available and the
> option `x-h=true` or `h=true` is also no longer required.
>
> Signed-off-by: Yu Li <liyu.yukiteru@bytedance.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> docs/system/riscv/virt.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
> index fa016584bf..08ce3c4177 100644
> --- a/docs/system/riscv/virt.rst
> +++ b/docs/system/riscv/virt.rst
> @@ -23,9 +23,9 @@ The ``virt`` machine supports the following devices:
> * 1 generic PCIe host bridge
> * The fw_cfg device that allows a guest to obtain data from QEMU
>
> -Note that the default CPU is a generic RV32GC/RV64GC. Optional extensions
> -can be enabled via command line parameters, e.g.: ``-cpu rv64,x-h=true``
> -enables the hypervisor extension for RV64.
> +The hypervisor extension has been enabled for the default CPU, so virtual
> +machines with hypervisor extension can simply be used without explicitly
> +declaring.
>
> Hardware configuration information
> ----------------------------------
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] docs/system: riscv: Update description of CPU
@ 2022-02-10 1:28 ` Alistair Francis
0 siblings, 0 replies; 8+ messages in thread
From: Alistair Francis @ 2022-02-10 1:28 UTC (permalink / raw)
To: Yu Li
Cc: qemu-devel@nongnu.org Developers, open list:RISC-V, Bin Meng,
Alistair Francis
On Wed, Feb 9, 2022 at 1:49 AM Yu Li <liyu.yukiteru@bytedance.com> wrote:
>
> Since the hypervisor extension been non experimental and enabled for
> default CPU, the previous command is no longer available and the
> option `x-h=true` or `h=true` is also no longer required.
>
> Signed-off-by: Yu Li <liyu.yukiteru@bytedance.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> docs/system/riscv/virt.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
> index fa016584bf..08ce3c4177 100644
> --- a/docs/system/riscv/virt.rst
> +++ b/docs/system/riscv/virt.rst
> @@ -23,9 +23,9 @@ The ``virt`` machine supports the following devices:
> * 1 generic PCIe host bridge
> * The fw_cfg device that allows a guest to obtain data from QEMU
>
> -Note that the default CPU is a generic RV32GC/RV64GC. Optional extensions
> -can be enabled via command line parameters, e.g.: ``-cpu rv64,x-h=true``
> -enables the hypervisor extension for RV64.
> +The hypervisor extension has been enabled for the default CPU, so virtual
> +machines with hypervisor extension can simply be used without explicitly
> +declaring.
>
> Hardware configuration information
> ----------------------------------
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] docs/system: riscv: Update description of CPU
2022-02-08 13:07 ` Yu Li
@ 2022-02-10 3:10 ` Alistair Francis
-1 siblings, 0 replies; 8+ messages in thread
From: Alistair Francis @ 2022-02-10 3:10 UTC (permalink / raw)
To: Yu Li
Cc: Alistair Francis, Bin Meng, open list:RISC-V,
qemu-devel@nongnu.org Developers
On Wed, Feb 9, 2022 at 1:49 AM Yu Li <liyu.yukiteru@bytedance.com> wrote:
>
> Since the hypervisor extension been non experimental and enabled for
> default CPU, the previous command is no longer available and the
> option `x-h=true` or `h=true` is also no longer required.
>
> Signed-off-by: Yu Li <liyu.yukiteru@bytedance.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> docs/system/riscv/virt.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
> index fa016584bf..08ce3c4177 100644
> --- a/docs/system/riscv/virt.rst
> +++ b/docs/system/riscv/virt.rst
> @@ -23,9 +23,9 @@ The ``virt`` machine supports the following devices:
> * 1 generic PCIe host bridge
> * The fw_cfg device that allows a guest to obtain data from QEMU
>
> -Note that the default CPU is a generic RV32GC/RV64GC. Optional extensions
> -can be enabled via command line parameters, e.g.: ``-cpu rv64,x-h=true``
> -enables the hypervisor extension for RV64.
> +The hypervisor extension has been enabled for the default CPU, so virtual
> +machines with hypervisor extension can simply be used without explicitly
> +declaring.
>
> Hardware configuration information
> ----------------------------------
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] docs/system: riscv: Update description of CPU
@ 2022-02-10 3:10 ` Alistair Francis
0 siblings, 0 replies; 8+ messages in thread
From: Alistair Francis @ 2022-02-10 3:10 UTC (permalink / raw)
To: Yu Li
Cc: qemu-devel@nongnu.org Developers, open list:RISC-V, Bin Meng,
Alistair Francis
On Wed, Feb 9, 2022 at 1:49 AM Yu Li <liyu.yukiteru@bytedance.com> wrote:
>
> Since the hypervisor extension been non experimental and enabled for
> default CPU, the previous command is no longer available and the
> option `x-h=true` or `h=true` is also no longer required.
>
> Signed-off-by: Yu Li <liyu.yukiteru@bytedance.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> docs/system/riscv/virt.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
> index fa016584bf..08ce3c4177 100644
> --- a/docs/system/riscv/virt.rst
> +++ b/docs/system/riscv/virt.rst
> @@ -23,9 +23,9 @@ The ``virt`` machine supports the following devices:
> * 1 generic PCIe host bridge
> * The fw_cfg device that allows a guest to obtain data from QEMU
>
> -Note that the default CPU is a generic RV32GC/RV64GC. Optional extensions
> -can be enabled via command line parameters, e.g.: ``-cpu rv64,x-h=true``
> -enables the hypervisor extension for RV64.
> +The hypervisor extension has been enabled for the default CPU, so virtual
> +machines with hypervisor extension can simply be used without explicitly
> +declaring.
>
> Hardware configuration information
> ----------------------------------
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] docs/system: riscv: Update description of CPU
2022-02-08 13:07 ` Yu Li
@ 2022-03-03 20:55 ` Palmer Dabbelt
-1 siblings, 0 replies; 8+ messages in thread
From: Palmer Dabbelt @ 2022-03-03 20:55 UTC (permalink / raw)
To: liyu.yukiteru
Cc: Alistair Francis, Bin Meng, qemu-riscv, qemu-devel, liyu.yukiteru
On Tue, 08 Feb 2022 05:07:23 PST (-0800), liyu.yukiteru@bytedance.com wrote:
> Since the hypervisor extension been non experimental and enabled for
> default CPU, the previous command is no longer available and the
> option `x-h=true` or `h=true` is also no longer required.
>
> Signed-off-by: Yu Li <liyu.yukiteru@bytedance.com>
> ---
> docs/system/riscv/virt.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
> index fa016584bf..08ce3c4177 100644
> --- a/docs/system/riscv/virt.rst
> +++ b/docs/system/riscv/virt.rst
> @@ -23,9 +23,9 @@ The ``virt`` machine supports the following devices:
> * 1 generic PCIe host bridge
> * The fw_cfg device that allows a guest to obtain data from QEMU
>
> -Note that the default CPU is a generic RV32GC/RV64GC. Optional extensions
> -can be enabled via command line parameters, e.g.: ``-cpu rv64,x-h=true``
> -enables the hypervisor extension for RV64.
> +The hypervisor extension has been enabled for the default CPU, so virtual
> +machines with hypervisor extension can simply be used without explicitly
> +declaring.
>
> Hardware configuration information
> ----------------------------------
I saw this landed, but I'm not sure the wording is quite right. I think
it's at least missing what is being declared, so something like this
diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
index 08ce3c4177..fe40d6565a 100644
--- a/docs/system/riscv/virt.rst
+++ b/docs/system/riscv/virt.rst
@@ -24,8 +24,8 @@ The ``virt`` machine supports the following devices:
* The fw_cfg device that allows a guest to obtain data from QEMU
The hypervisor extension has been enabled for the default CPU, so virtual
-machines with hypervisor extension can simply be used without explicitly
-declaring.
+machines with the hypervisor extension can simply be used without explicitly
+declaring it as enabled.
Hardware configuration information
----------------------------------
That said, I think we'd be better off just picking a different example
extension to enable -- IMO this was less about the hypervisor extension
and more about the syntax for enabling extensions, that's certianly what
I end up looking at the docs for. So IMO we'd be better off with
something like
diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
index 08ce3c4177..f59e8777b2 100644
--- a/docs/system/riscv/virt.rst
+++ b/docs/system/riscv/virt.rst
@@ -23,9 +23,9 @@ The ``virt`` machine supports the following devices:
* 1 generic PCIe host bridge
* The fw_cfg device that allows a guest to obtain data from QEMU
-The hypervisor extension has been enabled for the default CPU, so virtual
-machines with hypervisor extension can simply be used without explicitly
-declaring.
+Note that the default CPU is a generic RV32GC/RV64GC. Optional extensions
+can be enabled via command line parameters, e.g.: ``-cpu rv64,c=false``
+disables the C extension.
Hardware configuration information
----------------------------------
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] docs/system: riscv: Update description of CPU
@ 2022-03-03 20:55 ` Palmer Dabbelt
0 siblings, 0 replies; 8+ messages in thread
From: Palmer Dabbelt @ 2022-03-03 20:55 UTC (permalink / raw)
To: liyu.yukiteru
Cc: qemu-devel, qemu-riscv, Bin Meng, Alistair Francis, liyu.yukiteru
On Tue, 08 Feb 2022 05:07:23 PST (-0800), liyu.yukiteru@bytedance.com wrote:
> Since the hypervisor extension been non experimental and enabled for
> default CPU, the previous command is no longer available and the
> option `x-h=true` or `h=true` is also no longer required.
>
> Signed-off-by: Yu Li <liyu.yukiteru@bytedance.com>
> ---
> docs/system/riscv/virt.rst | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
> index fa016584bf..08ce3c4177 100644
> --- a/docs/system/riscv/virt.rst
> +++ b/docs/system/riscv/virt.rst
> @@ -23,9 +23,9 @@ The ``virt`` machine supports the following devices:
> * 1 generic PCIe host bridge
> * The fw_cfg device that allows a guest to obtain data from QEMU
>
> -Note that the default CPU is a generic RV32GC/RV64GC. Optional extensions
> -can be enabled via command line parameters, e.g.: ``-cpu rv64,x-h=true``
> -enables the hypervisor extension for RV64.
> +The hypervisor extension has been enabled for the default CPU, so virtual
> +machines with hypervisor extension can simply be used without explicitly
> +declaring.
>
> Hardware configuration information
> ----------------------------------
I saw this landed, but I'm not sure the wording is quite right. I think
it's at least missing what is being declared, so something like this
diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
index 08ce3c4177..fe40d6565a 100644
--- a/docs/system/riscv/virt.rst
+++ b/docs/system/riscv/virt.rst
@@ -24,8 +24,8 @@ The ``virt`` machine supports the following devices:
* The fw_cfg device that allows a guest to obtain data from QEMU
The hypervisor extension has been enabled for the default CPU, so virtual
-machines with hypervisor extension can simply be used without explicitly
-declaring.
+machines with the hypervisor extension can simply be used without explicitly
+declaring it as enabled.
Hardware configuration information
----------------------------------
That said, I think we'd be better off just picking a different example
extension to enable -- IMO this was less about the hypervisor extension
and more about the syntax for enabling extensions, that's certianly what
I end up looking at the docs for. So IMO we'd be better off with
something like
diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
index 08ce3c4177..f59e8777b2 100644
--- a/docs/system/riscv/virt.rst
+++ b/docs/system/riscv/virt.rst
@@ -23,9 +23,9 @@ The ``virt`` machine supports the following devices:
* 1 generic PCIe host bridge
* The fw_cfg device that allows a guest to obtain data from QEMU
-The hypervisor extension has been enabled for the default CPU, so virtual
-machines with hypervisor extension can simply be used without explicitly
-declaring.
+Note that the default CPU is a generic RV32GC/RV64GC. Optional extensions
+can be enabled via command line parameters, e.g.: ``-cpu rv64,c=false``
+disables the C extension.
Hardware configuration information
----------------------------------
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-03-03 20:58 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-02-08 13:07 [PATCH] docs/system: riscv: Update description of CPU Yu Li
2022-02-08 13:07 ` Yu Li
2022-02-10 1:28 ` Alistair Francis
2022-02-10 1:28 ` Alistair Francis
2022-02-10 3:10 ` Alistair Francis
2022-02-10 3:10 ` Alistair Francis
2022-03-03 20:55 ` Palmer Dabbelt
2022-03-03 20:55 ` Palmer Dabbelt
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.