* [PATCH 0/1] RISC-V: Make stub compile without c extension
@ 2022-01-17 17:39 Florian Wagner
2022-01-17 17:39 ` [PATCH 1/1] RISC-V: Change signature header field to use `.ascii` instead of opcode Florian Wagner
0 siblings, 1 reply; 7+ messages in thread
From: Florian Wagner @ 2022-01-17 17:39 UTC (permalink / raw)
To: paul.walmsley, palmer, aou, linux-riscv; +Cc: yaron.dinkin, Florian Wagner
This is a small patch to get the `head.S` for riscv compiling without
the compressed instructions extension for riscv.
Specifically a magic number in a signature field was described as an
instruction instead of a constant in the assembly. The patch changes
this to encode the value via `.ascii` which is closer to the original
specification.
The generated code should is byte-by-byte equal.
Best Regards
Florian
Florian Wagner (1):
RISC-V: Change signature header field to use `.ascii` instead of
opcode
arch/riscv/kernel/head.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
2.25.1
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^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 1/1] RISC-V: Change signature header field to use `.ascii` instead of opcode 2022-01-17 17:39 [PATCH 0/1] RISC-V: Make stub compile without c extension Florian Wagner @ 2022-01-17 17:39 ` Florian Wagner 2022-01-17 18:44 ` Andreas Schwab 2022-01-17 18:59 ` Jessica Clarke 0 siblings, 2 replies; 7+ messages in thread From: Florian Wagner @ 2022-01-17 17:39 UTC (permalink / raw) To: paul.walmsley, palmer, aou, linux-riscv; +Cc: yaron.dinkin, Florian Wagner The `MZ` in the signature header field is now encoded via `.ascii` to make the kernel compile without the `c` extension. Signed-off-by: Florian Wagner <florian.wagner@nextsilicon.com> Signed-off-by: Yaron Dinkin <yaron.dinkin@nextsilicon.com> --- arch/riscv/kernel/head.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index f52f01ecbeea..931b63464b90 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -48,7 +48,7 @@ ENTRY(_start) /* * This instruction decodes to "MZ" ASCII required by UEFI. */ - c.li s4,-13 + .ascii "MZ" j _start_kernel #else /* jump to start kernel */ -- 2.25.1 -- This e-mail message and any attachments thereto are intended only for the person or entity to which it is addressed and may contain confidential and/or privileged material. Any retransmission, dissemination, copying or other use of, or taking of any action in reliance upon this information is prohibited. If you are not the intended addressee, please contact the sender immediately and delete the materials and information from your device and system and confirm the deletion by reply e-mail. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/1] RISC-V: Change signature header field to use `.ascii` instead of opcode 2022-01-17 17:39 ` [PATCH 1/1] RISC-V: Change signature header field to use `.ascii` instead of opcode Florian Wagner @ 2022-01-17 18:44 ` Andreas Schwab 2022-01-17 18:59 ` Jessica Clarke 1 sibling, 0 replies; 7+ messages in thread From: Andreas Schwab @ 2022-01-17 18:44 UTC (permalink / raw) To: Florian Wagner; +Cc: paul.walmsley, palmer, aou, linux-riscv, yaron.dinkin On Jan 17 2022, Florian Wagner wrote: > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > index f52f01ecbeea..931b63464b90 100644 > --- a/arch/riscv/kernel/head.S > +++ b/arch/riscv/kernel/head.S > @@ -48,7 +48,7 @@ ENTRY(_start) > /* > * This instruction decodes to "MZ" ASCII required by UEFI. > */ > - c.li s4,-13 > + .ascii "MZ" The comment above no longer makes sense. -- Andreas Schwab, schwab@linux-m68k.org GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1 "And now for something completely different." _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/1] RISC-V: Change signature header field to use `.ascii` instead of opcode 2022-01-17 17:39 ` [PATCH 1/1] RISC-V: Change signature header field to use `.ascii` instead of opcode Florian Wagner 2022-01-17 18:44 ` Andreas Schwab @ 2022-01-17 18:59 ` Jessica Clarke 2022-01-18 1:23 ` Kefeng Wang 2022-01-18 1:25 ` Atish Patra 1 sibling, 2 replies; 7+ messages in thread From: Jessica Clarke @ 2022-01-17 18:59 UTC (permalink / raw) To: Florian Wagner; +Cc: Paul Walmsley, palmer, aou, linux-riscv, yaron.dinkin On 17 Jan 2022, at 17:39, Florian Wagner <florian.wagner@nextsilicon.com> wrote: > > The `MZ` in the signature header field is now encoded via `.ascii` to make > the kernel compile without the `c` extension. > > Signed-off-by: Florian Wagner <florian.wagner@nextsilicon.com> > Signed-off-by: Yaron Dinkin <yaron.dinkin@nextsilicon.com> > --- > arch/riscv/kernel/head.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > index f52f01ecbeea..931b63464b90 100644 > --- a/arch/riscv/kernel/head.S > +++ b/arch/riscv/kernel/head.S > @@ -48,7 +48,7 @@ ENTRY(_start) > /* > * This instruction decodes to "MZ" ASCII required by UEFI. > */ > - c.li s4,-13 > + .ascii "MZ" > j _start_kernel CONFIG_EFI has select RISCV_ISA_C, so this doesn’t seem to achieve anything? If you then remove that select, well, you get an EFI binary that works, but if you jump to it directly as a non-EFI binary then you’ll trap on a non-RVC system as that won’t be a valid instruction. So I think this needs more explanation and discussion. Jess _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/1] RISC-V: Change signature header field to use `.ascii` instead of opcode 2022-01-17 18:59 ` Jessica Clarke @ 2022-01-18 1:23 ` Kefeng Wang 2022-01-18 1:25 ` Atish Patra 1 sibling, 0 replies; 7+ messages in thread From: Kefeng Wang @ 2022-01-18 1:23 UTC (permalink / raw) To: Jessica Clarke, Florian Wagner Cc: Paul Walmsley, palmer, aou, linux-riscv, yaron.dinkin On 2022/1/18 2:59, Jessica Clarke wrote: > On 17 Jan 2022, at 17:39, Florian Wagner <florian.wagner@nextsilicon.com> wrote: >> The `MZ` in the signature header field is now encoded via `.ascii` to make >> the kernel compile without the `c` extension. >> >> Signed-off-by: Florian Wagner <florian.wagner@nextsilicon.com> >> Signed-off-by: Yaron Dinkin <yaron.dinkin@nextsilicon.com> >> --- >> arch/riscv/kernel/head.S | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S >> index f52f01ecbeea..931b63464b90 100644 >> --- a/arch/riscv/kernel/head.S >> +++ b/arch/riscv/kernel/head.S >> @@ -48,7 +48,7 @@ ENTRY(_start) >> /* >> * This instruction decodes to "MZ" ASCII required by UEFI. >> */ >> - c.li s4,-13 >> + .ascii "MZ" >> j _start_kernel > CONFIG_EFI has select RISCV_ISA_C, so this doesn’t seem to achieve > anything? If you then remove that select, well, you get an EFI binary > that works, but if you jump to it directly as a non-EFI binary then > you’ll trap on a non-RVC system as that won’t be a valid instruction. > So I think this needs more explanation and discussion. I sent a question[1] before, and there are some advises from Arnd and Palmer. [1] https://lore.kernel.org/linux-riscv/350c7458-c77b-56de-de5e-8c96ce9c16ae@huawei.com/ > Jess > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/1] RISC-V: Change signature header field to use `.ascii` instead of opcode 2022-01-17 18:59 ` Jessica Clarke 2022-01-18 1:23 ` Kefeng Wang @ 2022-01-18 1:25 ` Atish Patra 2022-01-20 19:06 ` Palmer Dabbelt 1 sibling, 1 reply; 7+ messages in thread From: Atish Patra @ 2022-01-18 1:25 UTC (permalink / raw) To: Jessica Clarke Cc: Florian Wagner, Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-riscv, yaron.dinkin On Mon, Jan 17, 2022 at 11:00 AM Jessica Clarke <jrtc27@jrtc27.com> wrote: > > On 17 Jan 2022, at 17:39, Florian Wagner <florian.wagner@nextsilicon.com> wrote: > > > > The `MZ` in the signature header field is now encoded via `.ascii` to make > > the kernel compile without the `c` extension. > > > > Signed-off-by: Florian Wagner <florian.wagner@nextsilicon.com> > > Signed-off-by: Yaron Dinkin <yaron.dinkin@nextsilicon.com> > > --- > > arch/riscv/kernel/head.S | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > > index f52f01ecbeea..931b63464b90 100644 > > --- a/arch/riscv/kernel/head.S > > +++ b/arch/riscv/kernel/head.S > > @@ -48,7 +48,7 @@ ENTRY(_start) > > /* > > * This instruction decodes to "MZ" ASCII required by UEFI. > > */ > > - c.li s4,-13 > > + .ascii "MZ" > > j _start_kernel > > CONFIG_EFI has select RISCV_ISA_C, so this doesn’t seem to achieve > anything? If you then remove that select, well, you get an EFI binary > that works, but if you jump to it directly as a non-EFI binary then > you’ll trap on a non-RVC system as that won’t be a valid instruction. > So I think this needs more explanation and discussion. > Here is the previous discussion regarding this. http://lists.infradead.org/pipermail/linux-riscv/2021-March/004998.html TLDR, there is no cleaner way to support both EFI & non-UEFI booting on a platform without C extension. Linux kernel anyways recommend rv64gc for platforms. > Jess > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv -- Regards, Atish _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/1] RISC-V: Change signature header field to use `.ascii` instead of opcode 2022-01-18 1:25 ` Atish Patra @ 2022-01-20 19:06 ` Palmer Dabbelt 0 siblings, 0 replies; 7+ messages in thread From: Palmer Dabbelt @ 2022-01-20 19:06 UTC (permalink / raw) To: florian.wagner, atishp Cc: jrtc27, florian.wagner, Paul Walmsley, aou, linux-riscv, yaron.dinkin On Mon, 17 Jan 2022 17:25:40 PST (-0800), atishp@atishpatra.org wrote: > On Mon, Jan 17, 2022 at 11:00 AM Jessica Clarke <jrtc27@jrtc27.com> wrote: >> >> On 17 Jan 2022, at 17:39, Florian Wagner <florian.wagner@nextsilicon.com> wrote: >> > >> > The `MZ` in the signature header field is now encoded via `.ascii` to make >> > the kernel compile without the `c` extension. >> > >> > Signed-off-by: Florian Wagner <florian.wagner@nextsilicon.com> >> > Signed-off-by: Yaron Dinkin <yaron.dinkin@nextsilicon.com> >> > --- >> > arch/riscv/kernel/head.S | 2 +- >> > 1 file changed, 1 insertion(+), 1 deletion(-) >> > >> > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S >> > index f52f01ecbeea..931b63464b90 100644 >> > --- a/arch/riscv/kernel/head.S >> > +++ b/arch/riscv/kernel/head.S >> > @@ -48,7 +48,7 @@ ENTRY(_start) >> > /* >> > * This instruction decodes to "MZ" ASCII required by UEFI. >> > */ >> > - c.li s4,-13 >> > + .ascii "MZ" >> > j _start_kernel >> >> CONFIG_EFI has select RISCV_ISA_C, so this doesn’t seem to achieve >> anything? If you then remove that select, well, you get an EFI binary >> that works, but if you jump to it directly as a non-EFI binary then >> you’ll trap on a non-RVC system as that won’t be a valid instruction. >> So I think this needs more explanation and discussion. >> > > Here is the previous discussion regarding this. > > http://lists.infradead.org/pipermail/linux-riscv/2021-March/004998.html > > TLDR, there is no cleaner way to support both EFI & non-UEFI booting > on a platform > without C extension. Linux kernel anyways recommend rv64gc for platforms. Yep, though if there's a use case for yes-EFI, no-C then we could always allow users to build EFI-only kernels (as pointed out in the thread). Is there hardware that actually does that? _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-01-20 19:07 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-01-17 17:39 [PATCH 0/1] RISC-V: Make stub compile without c extension Florian Wagner 2022-01-17 17:39 ` [PATCH 1/1] RISC-V: Change signature header field to use `.ascii` instead of opcode Florian Wagner 2022-01-17 18:44 ` Andreas Schwab 2022-01-17 18:59 ` Jessica Clarke 2022-01-18 1:23 ` Kefeng Wang 2022-01-18 1:25 ` Atish Patra 2022-01-20 19:06 ` Palmer Dabbelt
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