All of lore.kernel.org
 help / color / mirror / Atom feed
From: Palmer Dabbelt <palmer@dabbelt.com>
To: jszhang@kernel.org
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	aou@eecs.berkeley.edu, atishp@atishpatra.org,
	anup@brainfault.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/2] introduce unified static key mechanism for ISA ext
Date: Thu, 16 Jun 2022 15:04:50 -0700 (PDT)	[thread overview]
Message-ID: <mhng-ea1ebe26-82ad-4a9d-b024-f6d79a0cb699@palmer-ri-x1c9> (raw)
In-Reply-To: <20220522153543.2656-1-jszhang@kernel.org>

On Sun, 22 May 2022 08:35:41 PDT (-0700), jszhang@kernel.org wrote:
> Currently, riscv has several extensions which may not be supported on all
> riscv platforms, for example, FPU and so on. To support unified kernel
> Image style, we need to check whether the feature is supported or not.
> If the check sits at hot code path, the performance will be impacted a
> lot. static key can be used to solve the issue. In the past, FPU
> support has been converted to use static key mechanism. I believe we
> will have similar cases in the future.
>
> Since v1:
>   - fix typo, thank Atish
>   - remove riscv_isa_have_key_extension() instead use the isa ext keys
>     directly as pointed out by Atish.
>
> Jisheng Zhang (2):
>   riscv: introduce unified static key mechanism for ISA extensions
>   riscv: switch has_fpu() to the unified static key mechanism
>
>  arch/riscv/include/asm/hwcap.h     | 25 +++++++++++++++++++++++++
>  arch/riscv/include/asm/switch_to.h |  4 ++--
>  arch/riscv/kernel/cpufeature.c     | 14 +++++++-------
>  3 files changed, 34 insertions(+), 9 deletions(-)

Thanks, this is on for-next.

WARNING: multiple messages have this Message-ID (diff)
From: Palmer Dabbelt <palmer@dabbelt.com>
To: jszhang@kernel.org
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	aou@eecs.berkeley.edu, atishp@atishpatra.org,
	anup@brainfault.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/2] introduce unified static key mechanism for ISA ext
Date: Thu, 16 Jun 2022 15:04:50 -0700 (PDT)	[thread overview]
Message-ID: <mhng-ea1ebe26-82ad-4a9d-b024-f6d79a0cb699@palmer-ri-x1c9> (raw)
In-Reply-To: <20220522153543.2656-1-jszhang@kernel.org>

On Sun, 22 May 2022 08:35:41 PDT (-0700), jszhang@kernel.org wrote:
> Currently, riscv has several extensions which may not be supported on all
> riscv platforms, for example, FPU and so on. To support unified kernel
> Image style, we need to check whether the feature is supported or not.
> If the check sits at hot code path, the performance will be impacted a
> lot. static key can be used to solve the issue. In the past, FPU
> support has been converted to use static key mechanism. I believe we
> will have similar cases in the future.
>
> Since v1:
>   - fix typo, thank Atish
>   - remove riscv_isa_have_key_extension() instead use the isa ext keys
>     directly as pointed out by Atish.
>
> Jisheng Zhang (2):
>   riscv: introduce unified static key mechanism for ISA extensions
>   riscv: switch has_fpu() to the unified static key mechanism
>
>  arch/riscv/include/asm/hwcap.h     | 25 +++++++++++++++++++++++++
>  arch/riscv/include/asm/switch_to.h |  4 ++--
>  arch/riscv/kernel/cpufeature.c     | 14 +++++++-------
>  3 files changed, 34 insertions(+), 9 deletions(-)

Thanks, this is on for-next.

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2022-06-16 22:05 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-22 15:35 [PATCH v2 0/2] introduce unified static key mechanism for ISA ext Jisheng Zhang
2022-05-22 15:35 ` Jisheng Zhang
2022-05-22 15:35 ` [PATCH v2 1/2] riscv: introduce unified static key mechanism for ISA extensions Jisheng Zhang
2022-05-22 15:35   ` Jisheng Zhang
2022-05-23 14:42   ` Atish Patra
2022-05-23 14:42     ` Atish Patra
2022-05-23 15:07   ` Anup Patel
2022-05-23 15:07     ` Anup Patel
2022-05-22 15:35 ` [PATCH v2 2/2] riscv: switch has_fpu() to the unified static key mechanism Jisheng Zhang
2022-05-22 15:35   ` Jisheng Zhang
2022-05-23 14:41   ` Atish Patra
2022-05-23 14:41     ` Atish Patra
2022-05-23 15:08   ` Anup Patel
2022-05-23 15:08     ` Anup Patel
2022-06-16 22:04 ` Palmer Dabbelt [this message]
2022-06-16 22:04   ` [PATCH v2 0/2] introduce unified static key mechanism for ISA ext Palmer Dabbelt

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=mhng-ea1ebe26-82ad-4a9d-b024-f6d79a0cb699@palmer-ri-x1c9 \
    --to=palmer@dabbelt.com \
    --cc=anup@brainfault.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=atishp@atishpatra.org \
    --cc=jszhang@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=paul.walmsley@sifive.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.