[PATCH 0/4] lspci: Decode capability names

[PATCH 0/4] lspci: Decode capability names

[Bjorn Helgaas]

This is a minor update to print the names of several capabilities instead
of just the hex capability ID.

I'd love it if somebody would implement decoding of the content of these
capabilities, but I haven't had time to do that.

---

Bjorn Helgaas (4):
      lspci: Clarify unknown capability IDs
      lspci: Decode Null Capability
      lspci: Print names of capabilities even if we can't decode the rest
      lspci: Use spec name for RCRB ((Root Complex Register Block)


 lib/header.h |   21 ++++++++++++++++++++-
 ls-caps.c    |    5 ++++-
 ls-ecaps.c   |   57 ++++++++++++++++++++++++++++++++++++++++++++++++++++++---
 3 files changed, 78 insertions(+), 5 deletions(-)

[PATCH 1/4] lspci: Clarify unknown capability IDs

[Bjorn Helgaas]

From: Bjorn Helgaas <bhelgaas@google.com>

For capabilities we don't know how to decode, we print the config address,
version, and capability ID:

  Capabilities: [220 v1] #19

This doesn't clearly identify the capability ID ("19"), whether it is a
PCI-compatible Capability ID or an Extended Capability ID (although you can
infer this by whether the address is 2 or 3 digits), or the fact that the
ID is printed in hex, which makes it hard to parse this manually.

Add a label ("Capability ID" or "Extended Capability ID") and print a "0x"
prefix so it's clear the value is in hex:

  Capabilities: [220 v1] Extended Capability ID 0x19

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 ls-caps.c  |    2 +-
 ls-ecaps.c |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ls-caps.c b/ls-caps.c
index 3135224..bc7829c 100644
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -1599,7 +1599,7 @@ show_caps(struct device *d, int where)
 	      cap_ea(d, where, cap);
 	      break;
 	    default:
-	      printf("#%02x [%04x]\n", id, cap);
+	      printf("Capability ID %#02x [%04x]\n", id, cap);
 	    }
 	  where = next;
 	}
diff --git a/ls-ecaps.c b/ls-ecaps.c
index 800a032..cb3d46d 100644
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -802,7 +802,7 @@ show_ext_caps(struct device *d, int type)
 	    cap_ptm(d, where);
 	    break;
 	  default:
-	    printf("#%02x\n", id);
+	    printf("Extended Capability ID %#02x\n", id);
 	    break;
 	}
       where = (header >> 20) & ~3;

[PATCH 2/4] lspci: Decode Null Capability

[Bjorn Helgaas]

From: Bjorn Helgaas <bhelgaas@google.com>

The PCI Code and ID Assignment spec, r1.9, sec 2, defines a "Null
Capability" containing no registers other than the 8-bit Capability ID
(00h) and an 8-bit Next Capability Pointer.

Some devices, e.g., the Intel [8086:2058] implement this Capability.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 lib/header.h |    2 ++
 ls-caps.c    |    3 +++
 ls-ecaps.c   |    3 +++
 3 files changed, 8 insertions(+)

diff --git a/lib/header.h b/lib/header.h
index 0b12b2c..1f0e460 100644
--- a/lib/header.h
+++ b/lib/header.h
@@ -185,6 +185,7 @@
 /* Capability lists */
 
 #define PCI_CAP_LIST_ID		0	/* Capability ID */
+#define  PCI_CAP_ID_NULL	0x00	/* Null Capability */
 #define  PCI_CAP_ID_PM		0x01	/* Power Management */
 #define  PCI_CAP_ID_AGP		0x02	/* Accelerated Graphics Port */
 #define  PCI_CAP_ID_VPD		0x03	/* Vital Product Data */
@@ -211,6 +212,7 @@
 
 /* Capabilities residing in the PCI Express extended configuration space */
 
+#define PCI_EXT_CAP_ID_NULL	0x00	/* Null Capability */
 #define PCI_EXT_CAP_ID_AER	0x01	/* Advanced Error Reporting */
 #define PCI_EXT_CAP_ID_VC	0x02	/* Virtual Channel */
 #define PCI_EXT_CAP_ID_DSN	0x03	/* Device Serial Number */
diff --git a/ls-caps.c b/ls-caps.c
index bc7829c..8b707c2 100644
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -1536,6 +1536,9 @@ show_caps(struct device *d, int where)
 	    }
 	  switch (id)
 	    {
+	    case PCI_CAP_ID_NULL:
+	      printf("Null\n");
+	      break;
 	    case PCI_CAP_ID_PM:
 	      cap_pm(d, where, cap);
 	      break;
diff --git a/ls-ecaps.c b/ls-ecaps.c
index cb3d46d..3f6a364 100644
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -737,6 +737,9 @@ show_ext_caps(struct device *d, int type)
 	}
       switch (id)
 	{
+	  case PCI_EXT_CAP_ID_NULL:
+	    printf("Null\n");
+	    break;
 	  case PCI_EXT_CAP_ID_AER:
 	    cap_aer(d, where, type);
 	    break;

[PATCH 3/4] lspci: Print names of capabilities even if we can't decode the rest

[Bjorn Helgaas]

From: Bjorn Helgaas <bhelgaas@google.com>

We don't have decoders for many new capabilities, so we currently print
just the capability ID, e.g.,

  Capabilities: [220 v1] Extended Capability ID 0x19

Print the names, even if we don't yet know how to decode the contents,
e.g.,

  Capabilities: [220 v1] Secondary PCI Express <?>

The capability IDs are taken from the PCI Code and ID Assignment spec,
r1.10.  The #defines are named to match those in Linux when possible.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 lib/header.h |   17 +++++++++++++++++
 ls-ecaps.c   |   48 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 65 insertions(+)

diff --git a/lib/header.h b/lib/header.h
index 1f0e460..0a8a548 100644
--- a/lib/header.h
+++ b/lib/header.h
@@ -228,13 +228,30 @@
 #define PCI_EXT_CAP_ID_ARI	0x0e	/* Alternative Routing-ID Interpretation */
 #define PCI_EXT_CAP_ID_ATS	0x0f	/* Address Translation Service */
 #define PCI_EXT_CAP_ID_SRIOV	0x10	/* Single Root I/O Virtualization */
+#define PCI_EXT_CAP_ID_MRIOV	0x11	/* Multi-Root I/O Virtualization */
+#define PCI_EXT_CAP_ID_MCAST	0x12	/* Multicast */
 #define PCI_EXT_CAP_ID_PRI	0x13	/* Page Request Interface */
+#define PCI_EXT_CAP_ID_REBAR	0x15	/* Resizable BAR */
+#define PCI_EXT_CAP_ID_DPA	0x16	/* Dynamic Power Allocation */
 #define PCI_EXT_CAP_ID_TPH	0x17	/* Transaction processing hints */
 #define PCI_EXT_CAP_ID_LTR	0x18	/* Latency Tolerance Reporting */
+#define PCI_EXT_CAP_ID_SECPCI	0x19	/* Secondary PCI Express */
+#define PCI_EXT_CAP_ID_PMUX	0x1a	/* Protocol Multiplexing */
 #define PCI_EXT_CAP_ID_PASID	0x1b	/* Process Address Space ID */
+#define PCI_EXT_CAP_ID_LNR	0x1c	/* LN Requester */
 #define PCI_EXT_CAP_ID_DPC	0x1d	/* Downstream Port Containment */
 #define PCI_EXT_CAP_ID_L1PM	0x1e	/* L1 PM Substates */
 #define PCI_EXT_CAP_ID_PTM	0x1f	/* Precision Time Measurement */
+#define PCI_EXT_CAP_ID_M_PCIE	0x20	/* PCIe over M-PHY */
+#define PCI_EXT_CAP_ID_FRS	0x21	/* FRS Queuing */
+#define PCI_EXT_CAP_ID_RTR	0x22	/* Readiness Time Reporting */
+#define PCI_EXT_CAP_ID_DVSEC	0x23	/* Designated Vendor-Specific */
+#define PCI_EXT_CAP_ID_VF_REBAR	0x24	/* VF Resizable BAR */
+#define PCI_EXT_CAP_ID_DLNK	0x25	/* Data Link Feature */
+#define PCI_EXT_CAP_ID_16GT	0x26	/* Physical Layer 16.0 GT/s */
+#define PCI_EXT_CAP_ID_LMR	0x27	/* Lane Margining at Receiver */
+#define PCI_EXT_CAP_ID_HIER_ID	0x28	/* Hierarchy ID */
+#define PCI_EXT_CAP_ID_NPEM	0x29	/* Native PCIe Enclosure Management */
 
 /*** Definitions of capabilities ***/
 
diff --git a/ls-ecaps.c b/ls-ecaps.c
index 3f6a364..a6ae751 100644
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -786,24 +786,72 @@ show_ext_caps(struct device *d, int type)
 	  case PCI_EXT_CAP_ID_SRIOV:
 	    cap_sriov(d, where);
 	    break;
+	  case PCI_EXT_CAP_ID_MRIOV:
+	    printf("Multi-Root I/O Virtualization <?>\n");
+	    break;
 	  case PCI_EXT_CAP_ID_PRI:
 	    cap_pri(d, where);
 	    break;
+	  case PCI_EXT_CAP_ID_REBAR:
+	    printf("Resizable BAR <?>\n");
+	    break;
+	  case PCI_EXT_CAP_ID_DPA:
+	    printf("Dynamic Power Allocation <?>\n");
+	    break;
 	  case PCI_EXT_CAP_ID_TPH:
 	    cap_tph(d, where);
 	    break;
 	  case PCI_EXT_CAP_ID_LTR:
 	    cap_ltr(d, where);
 	    break;
+	  case PCI_EXT_CAP_ID_SECPCI:
+	    printf("Secondary PCI Express <?>\n");
+	    break;
+	  case PCI_EXT_CAP_ID_PMUX:
+	    printf("Protocol Multiplexing <?>\n");
+	    break;
 	  case PCI_EXT_CAP_ID_PASID:
 	    cap_pasid(d, where);
 	    break;
+	  case PCI_EXT_CAP_ID_LNR:
+	    printf("LN Requester <?>\n");
+	    break;
 	  case PCI_EXT_CAP_ID_L1PM:
 	    cap_l1pm(d, where);
 	    break;
 	  case PCI_EXT_CAP_ID_PTM:
 	    cap_ptm(d, where);
 	    break;
+	  case PCI_EXT_CAP_ID_M_PCIE:
+	    printf("PCI Express over M_PHY <?>\n");
+	    break;
+	  case PCI_EXT_CAP_ID_FRS:
+	    printf("FRS Queueing <?>\n");
+	    break;
+	  case PCI_EXT_CAP_ID_RTR:
+	    printf("Readiness Time Reporting <?>\n");
+	    break;
+	  case PCI_EXT_CAP_ID_DVSEC:
+	    printf("Designated Vendor-Specific <?>\n");
+	    break;
+	  case PCI_EXT_CAP_ID_VF_REBAR:
+	    printf("VF Resizable BAR <?>\n");
+	    break;
+	  case PCI_EXT_CAP_ID_DLNK:
+	    printf("Data Link Feature <?>\n");
+	    break;
+	  case PCI_EXT_CAP_ID_16GT:
+	    printf("Physical Layer 16.0 GT/s <?>\n");
+	    break;
+	  case PCI_EXT_CAP_ID_LMR:
+	    printf("Lane Margining at the Receiver <?>\n");
+	    break;
+	  case PCI_EXT_CAP_ID_HIER_ID:
+	    printf("Hierarchy ID <?>\n");
+	    break;
+	  case PCI_EXT_CAP_ID_NPEM:
+	    printf("Native PCIe Enclosure Management <?>\n");
+	    break;
 	  default:
 	    printf("Extended Capability ID %#02x\n", id);
 	    break;

[PATCH 4/4] lspci: Use spec name for RCRB ((Root Complex Register Block)

[Bjorn Helgaas]

From: Bjorn Helgaas <bhelgaas@google.com>

Extended Capability ID 0x000a is the RCRB (Root Complex Register Block)
capability.  Change the #define and the capability label to match the
terminology used in the specs.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 lib/header.h |    2 +-
 ls-ecaps.c   |    4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/header.h b/lib/header.h
index 0a8a548..d785473 100644
--- a/lib/header.h
+++ b/lib/header.h
@@ -222,7 +222,7 @@
 #define PCI_EXT_CAP_ID_RCECOLL	0x07	/* Root Complex Event Collector */
 #define PCI_EXT_CAP_ID_MFVC	0x08	/* Multi-Function Virtual Channel */
 #define PCI_EXT_CAP_ID_VC2	0x09	/* Virtual Channel (2nd ID) */
-#define PCI_EXT_CAP_ID_RBCB	0x0a	/* Root Bridge Control Block */
+#define PCI_EXT_CAP_ID_RCRB	0x0a	/* Root Complex Register Block */
 #define PCI_EXT_CAP_ID_VNDR	0x0b	/* Vendor specific */
 #define PCI_EXT_CAP_ID_ACS	0x0d	/* Access Controls */
 #define PCI_EXT_CAP_ID_ARI	0x0e	/* Alternative Routing-ID Interpretation */
diff --git a/ls-ecaps.c b/ls-ecaps.c
index a6ae751..5505948 100644
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -768,8 +768,8 @@ show_ext_caps(struct device *d, int type)
 	  case PCI_EXT_CAP_ID_MFVC:
 	    printf("Multi-Function Virtual Channel <?>\n");
 	    break;
-	  case PCI_EXT_CAP_ID_RBCB:
-	    printf("Root Bridge Control Block <?>\n");
+	  case PCI_EXT_CAP_ID_RCRB:
+	    printf("Root Complex Register Block <?>\n");
 	    break;
 	  case PCI_EXT_CAP_ID_VNDR:
 	    cap_evendor(d, where);

Re: [PATCH 0/4] lspci: Decode capability names

[Martin Mares]

Hi,

> This is a minor update to print the names of several capabilities instead
> of just the hex capability ID.

thanks, applied.

> I'd love it if somebody would implement decoding of the content of these
> capabilities, but I haven't had time to do that.

I would have time, but unfortunately I do not have the specs :(

				Martin