[U-Boot] [PATCH 4/7] Adding uC5272 dimm module support

[David Wu <davidwu@arcturusnetworks.com>]

Signed-off-by: David Wu <davidwu@arcturusnetworks.com>
---
  Makefile                         |   46 +++++
  board/Arcturus/uC5272/Makefile   |   44 +++++
  board/Arcturus/uC5272/config.mk  |    1 +
  board/Arcturus/uC5272/u-boot.lds |  142 +++++++++++++++
  board/Arcturus/uC5272/uC5272.c   |   57 ++++++
  include/configs/uC5272.h         |  354  
++++++++++++++++++++++++++++++++++++++
  6 files changed, 644 insertions(+), 0 deletions(-)
  create mode 100644 board/Arcturus/uC5272/Makefile
  create mode 100644 board/Arcturus/uC5272/config.mk
  create mode 100644 board/Arcturus/uC5272/u-boot.lds
  create mode 100644 board/Arcturus/uC5272/uC5272.c
  create mode 100644 include/configs/uC5272.h

diff --git a/Makefile b/Makefile
index 1b61049..c9215d0 100644
--- a/Makefile
+++ b/Makefile
@@ -2222,6 +2222,52 @@ M5485HFE_config :	unconfig
  TASREG_config :		unconfig
  	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd

+uC5272-4E16U48_config \
+uC5272-8EE16U66_config \
+uC5272-8E32U66_config \
+uC5272-4EE16U48_config \
+uC5272-4E8U48_config \
+uC5272-4EE8U48_config \
+uC5272-4E8U66_config \
+uC5272-4EE8U66_config \
+uC5272-4E16U66_config \
+uC5272-4EE16U66_config \
+uC5272-4EE32U66_config \
+uC5272-8EE32U66_config:		unconfig
+	@mkdir -p $(obj)include
+	@if [ "$(findstring U48,$@)" ] ; then \
+		echo "#define SYSCLK_48MHZ " >>$(obj)include/config.h ;\
+	fi ;
+	@if [ "$(findstring U66,$@)" ] ; then \
+		echo "#define SYSCLK_66MHZ " >>$(obj)include/config.h ;\
+	fi ;
+	@if [ "$(findstring EE,$@)" ] ; then \
+		echo "#define HAS_ETH1 " >>$(obj)include/config.h ;\
+	fi ;
+	@if [ "$(findstring 4E,$@)" ] ; then \
+		echo "#define __4MFlash__ " >>$(obj)include/config.h ;\
+		echo "#define CONFIG_SYS_FLASH_SIZE 0x00400000"  
>>$(obj)include/config.h ;\
+		echo "TEXT_BASE = 0x10c00000" > board/Arcturus/uC5272/config.mk ;\
+	fi ;
+	@if [ "$(findstring 8E,$@)" ] ; then \
+		echo "#define __8MFlash__ " >>$(obj)include/config.h ;\
+		echo "#define CONFIG_SYS_FLASH_SIZE 0x00800000"  
>>$(obj)include/config.h ;\
+		echo "TEXT_BASE = 0x40000000" > board/Arcturus/uC5272/config.mk ;\
+	fi ;
+	@if [ "$(findstring E8,$@)" ] ; then \
+		echo "#define __8MRam__ " >>$(obj)include/config.h ;\
+		echo "#define CONFIG_SYS_SDRAM_SIZE 8" >>$(obj)include/config.h ;\
+	fi ;
+	@if [ "$(findstring E16,$@)" ] ; then \
+		echo "#define __16MRam__ " >>$(obj)include/config.h ;\
+		echo "#define CONFIG_SYS_SDRAM_SIZE 16" >>$(obj)include/config.h ;\
+	fi ;
+	@if [ "$(findstring E32,$@)" ] ; then \
+		echo "#define __32MRam__ " >>$(obj)include/config.h ;\
+		echo "#define CONFIG_SYS_SDRAM_SIZE 32" >>$(obj)include/config.h ;\
+	fi ;
+	@$(MKCONFIG) -a uC5272 m68k mcf52x2 uC5272 Arcturus
+
  #########################################################################
  ## MPC83xx Systems
  #########################################################################
diff --git a/board/Arcturus/uC5272/Makefile  
b/board/Arcturus/uC5272/Makefile
new file mode 100644
index 0000000..424ab1c
--- /dev/null
+++ b/board/Arcturus/uC5272/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	= $(BOARD).o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/Arcturus/uC5272/config.mk  
b/board/Arcturus/uC5272/config.mk
new file mode 100644
index 0000000..e6d701d
--- /dev/null
+++ b/board/Arcturus/uC5272/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0x40000000
diff --git a/board/Arcturus/uC5272/u-boot.lds  
b/board/Arcturus/uC5272/u-boot.lds
new file mode 100644
index 0000000..9d20b22
--- /dev/null
+++ b/board/Arcturus/uC5272/u-boot.lds
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text)	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mcf52x2/start.o		(.text)
+    lib_m68k/traps.o		(.text)
+    cpu/mcf52x2/interrupts.o	(.text)
+    common/dlmalloc.o		(.text)
+    lib_generic/zlib.o		(.text)
+
+    . = DEFINED(env_offset) ? env_offset : .;
+    common/env_embedded.o	(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+
+  .reloc   :
+  {
+    __got_start = .;
+    *(.got)
+    __got_end = .;
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss (NOLOAD)       :
+  {
+   _sbss = .;
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
diff --git a/board/Arcturus/uC5272/uC5272.c  
b/board/Arcturus/uC5272/uC5272.c
new file mode 100644
index 0000000..9b62bb8
--- /dev/null
+++ b/board/Arcturus/uC5272/uC5272.c
@@ -0,0 +1,57 @@
+/*
+ * (c) Copyright 2010 Arcturus Networks Inc.
+ *     by David Wu <www.ArcturusNetworks.com>
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/immap.h>
+
+int checkboard(void)
+{
+	puts("Board: ");
+	puts(PRODUCT_FACTORY);
+	puts(PRODUCT_REVISION);
+	puts("\n");
+	return 0;
+};
+
+phys_size_t initdram(int board_type)
+{
+	volatile sdramctrl_t *sdp = (sdramctrl_t *) (MMAP_SDRAM);
+
+	sdp->sdram_sdtr = CONFIG_SYS_SDTR;
+	sdp->sdram_sdcr = CONFIG_SYS_SDCR;
+
+	/* Dummy write to start SDRAM */
+	*((volatile unsigned long *)0) = 0;
+
+	return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+};
+
+int testdram(void)
+{
+	printf("DRAM test not implemented!\n");
+
+	return 0;
+}
diff --git a/include/configs/uC5272.h b/include/configs/uC5272.h
new file mode 100644
index 0000000..f8d1b51
--- /dev/null
+++ b/include/configs/uC5272.h
@@ -0,0 +1,354 @@
+/*
+ * Configuation settings for Arcturus Networks Inc.'s uC5272 board.
+ *
+ * (c) Copyright 2010 Arcturus Networks Inc.
+ *     by David Wu <www.ArcturusNetworks.com>
+ *
+ * Based in part on: include/configs/M5272C3.h
+ *
+ * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _CONFIG_UC5272_H
+#define _CONFIG_UC5272_H
+
+#if defined(__2MFlash__)
+#define FLASH_STR		"2"
+#elif defined(__4MFlash__)
+#define FLASH_STR		"4"
+#elif defined(__8MFlash__)
+#define FLASH_STR		"8"
+#elif defined(__16MFlash__)
+#define FLASH_STR		"16"
+#elif defined(__32MFlash__)
+#define FLASH_STR		"32"
+#else
+#error "NO VALID FLASH SIZE DEFINITION PLEASE ADD ONE TO YOUR CONFIG FILE"
+#endif
+
+#define ETH0_STR		"E"
+#if defined(HAS_ETH1)
+#define ETH1_STR		"E"
+#else
+#define ETH1_STR		""
+#endif
+
+#if defined(__8MRam__)
+#define RAM_STR			"8"
+#elif defined(__16MRam__)
+#define RAM_STR			"16"
+#elif defined(__32MRam__)
+#define RAM_STR			"32"
+#elif defined(__64MRam__)
+#define RAM_STR			"64"
+#else
+#error "NO VALID RAM SIZE DEFINITION PLEASE ADD ONE TO YOUR CFLAGS"
+#endif
+
+#define FEATURE_STR		"U"
+
+#if defined(SYSCLK_48MHZ)
+#define SPEED_STR		"48"
+#else
+#define SPEED_STR		"66"
+#endif
+
+#define CPU_STR			"5272"
+
+#define PRODUCT_FACTORY		"Arcturus Networks Inc. "
+#define PRODUCT_REVISION	"uC" CPU_STR "-" FLASH_STR ETH0_STR \
+				ETH1_STR RAM_STR FEATURE_STR SPEED_STR
+
+/*
+ * High Level Configuration Options
+ */
+#define	CONFIG_MCF52x2		/* define processor family */
+#define CONFIG_M5272		/* define processor type */
+
+#define CONFIG_MCFTMR
+
+#define CONFIG_MCFUART
+#define CONFIG_SYS_UART_PORT		(0)
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600 , 19200 , 38400 , 57600, 115200 }
+
+#define CONFIG_SYS_ENABLE_ICACHE	/* enable icache */
+/* define if monitor is started from a pre-loader */
+#undef	CONFIG_MONITOR_IS_IN_RAM
+
+/* Configuration for environment
+ * Environment variables are embedded in the second 256k bytes of the  
Flash
+ */
+#if defined(__8MFlash__)
+#define CONFIG_SYS_CS0_BASE		0x40000000
+#define CONFIG_SYS_BR0_PRELIM		0x40000201
+#define CONFIG_SYS_OR0_PRELIM		0xff800028
+#define CONFIG_ENV_ADDR			0x40040000
+#else
+#define CONFIG_SYS_CS0_BASE		0x10c00000
+#define CONFIG_SYS_BR0_PRELIM		0x10c00201
+#define CONFIG_ENV_ADDR			0x10c40000
+#if defined(__4MFlash__)
+#define CONFIG_SYS_OR0_PRELIM		0xffc00028
+#else
+#define CONFIG_SYS_OR0_PRELIM		0xffe00028	/* default 2M */
+#endif
+#endif
+#define CONFIG_ENV_SIZE			0x40000
+#define CONFIG_ENV_IS_IN_FLASH	1
+/* default kernel image address, end of ENV */
+#define CONFIG_SYS_LOAD_ADDR		(CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
+
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
+
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+#	define CONFIG_NET_MULTI		1
+#	define CONFIG_MII		1
+#	define CONFIG_MII_INIT		1
+#	define CONFIG_SYS_DISCOVER_PHY
+#	define CONFIG_SYS_RX_ETH_BUFFER	8
+#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+
+#	define CONFIG_SYS_FEC0_PINMUX		0
+#	define CONFIG_SYS_FEC0_MIIBASE		CONFIG_SYS_FEC0_IOBASE
+#	define MCFFEC_TOUT_LOOP			50000
+#	ifndef CONFIG_SYS_DISCOVER_PHY
+#		define FECDUPLEX	FULL
+#		define FECSPEED		_100BASET
+#	else
+#		ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+#		endif
+#	endif /* CONFIG_SYS_DISCOVER_PHY */
+#endif
+
+#define CONFIG_BOOTDELAY	5
+#ifdef CONFIG_MCFFEC
+#	define CONFIG_ETHADDR	00:00:00:00:00:00
+#	define CONFIG_IPADDR	192.168.1.200
+#	define CONFIG_NETMASK	255.255.255.0
+#	define CONFIG_SERVERIP	192.168.1.1
+#	define CONFIG_GATEWAYIP	192.168.1.1
+#	define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif /* CONFIG_MCFFEC */
+
+#define BOOT_ADDR MK_STR(CONFIG_SYS_FLASH_BASE)
+
+#define CONFIG_HOSTNAME		uC5272
+#define CONFIG_EXTRA_ENV_SETTINGS		\
+	"REVISION="PRODUCT_REVISION"\0"		\
+	"netdev=eth0\0"				\
+	"loadaddr=10000\0"			\
+	"u-boot=u-boot.bin\0"			\
+	"load=tftp ${loadaddr) ${u-boot}\0"	\
+	"bootaddr="BOOT_ADDR"\0"  \
+	"upd=run load; run prog\0"		\
+	"prog=prot off ${bootaddr} +${filesize};"\
+	"era ${bootaddr} +${filesize};"		\
+	"cp.b ${loadaddr} ${bootaddr} ${filesize};"\
+	"setenv filesize;save\0"		\
+	""
+
+#define CONFIG_SYS_PROMPT		"uC5272-> "
+#define	CONFIG_SYS_LONGHELP	/* undef to save memory         */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size      */
+#else
+#define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size      */
+#endif
+
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+				/* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS	16	/* max number of command args   */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /*Boot Argument Buffer Size  
*/
+#define CONFIG_SYS_MEMTEST_START 0x400
+#define CONFIG_SYS_MEMTEST_END	 0x380000
+
+#define CONFIG_SYS_HZ		1000
+
+#if defined(SYSCLK_48MHZ)
+#define	CONFIG_SYS_CLK		48000000
+#endif
+
+#if !defined(CONFIG_SYS_CLK)
+#define	CONFIG_SYS_CLK		66000000
+#endif
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+#define CONFIG_SYS_MBAR		0x10000000	/* Register Base Addrs */
+#define CONFIG_SYS_SCR		0x0003
+#define CONFIG_SYS_SPR		0xffff
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
+#define CONFIG_SYS_INIT_RAM_END	 0x1000	/* End of used area in internal  
SRAM */
+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE 64
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - \
+					 CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
+ */
+#define CONFIG_SYS_SDRAM_BASE		0x00000000
+#if !defined(CONFIG_SYS_SDRAM_SIZE)
+#define	CONFIG_SYS_SDRAM_SIZE		16	/* SDRAM size in MB */
+#endif
+#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_CS0_BASE
+
+#ifdef	CONFIG_MONITOR_IS_IN_RAM
+#define CONFIG_SYS_MONITOR_BASE		0x20000
+#else
+#define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
+#endif
+
+#define CONFIG_SYS_MONITOR_LEN		0x20000
+#define CONFIG_SYS_MALLOC_LEN		(256 << 10)
+#define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
+
+#define CONFIG_SYS_BOOTMAPSZ  
(CONFIG_SYS_SDRAM_BASE+(CONFIG_SYS_SDRAM_SIZE<<20))
+
+/*
+ * FLASH organization
+ */
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER 1
+#	define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+#if !defined(CONFIG_SYS_MAX_FLASH_BANKS)
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#endif
+#if !defined(CONFIG_SYS_MAX_FLASH_SECT)
+#define CONFIG_SYS_MAX_FLASH_SECT 264 /* max number of sectors on one  
chip */
+#endif
+#define CONFIG_SYS_FLASH_PROTECTION
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CONFIG_SYS_CACHELINE_SIZE	16
+
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
+					 CF_CACR_DISD | CF_CACR_INVI | \
+					 CF_CACR_CEIB | CF_CACR_DCM | \
+					 CF_CACR_EUSP)
+
+/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+/* CS1--cs8900 Ethernet controller */
+#define CONFIG_SYS_BR1_PRELIM		0x30000201
+#define CONFIG_SYS_OR1_PRELIM		0xfffff028
+
+#if CONFIG_SYS_MAX_FLASH_BANKS == 1
+#if defined(__4MFlash__)
+/* CS2 asserted for BACKWARDS COMPATIBILITY for 4M Flash */
+#define CONFIG_SYS_BR2_PRELIM		0x40000201
+#define CONFIG_SYS_OR2_PRELIM		0xfffff028
+#endif
+#else /* assume CONFIG_SYS_MAX_FLASH_BANKS == 2 */
+#define CONFIG_SYS_CS2_BASE		0x20000000
+/* CS2 for another Flash */
+#define CONFIG_SYS_BR2_PRELIM		0x20000201
+#define CONFIG_SYS_OR2_PRELIM		0xff400028	/* set to 4M Flash */
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE,  
CONFIG_SYS_CS2_BASE }
+#endif
+
+#define CONFIG_SYS_BR3_PRELIM		0x50000201
+#define CONFIG_SYS_OR3_PRELIM		0xfffff028
+#define CONFIG_SYS_BR4_PRELIM		0x60000201
+#define CONFIG_SYS_OR4_PRELIM		0xfffff028
+#define CONFIG_SYS_BR5_PRELIM		0x70000201
+#define CONFIG_SYS_OR5_PRELIM		0xfffff028
+#define CONFIG_SYS_BR6_PRELIM		0x80000201
+#define CONFIG_SYS_OR6_PRELIM		0xfffff028
+#define CONFIG_SYS_BR7_PRELIM		0x00000601
+#if defined(SYSCLK_66MHZ)
+#define CONFIG_SYS_SDTR		0xf515	/* SDRAM Timing Register setting */
+#else /* SYSCLK_48MHZ */
+#define CONFIG_SYS_SDTR		0xad15	/* SDRAM Timing Register setting */
+#endif
+#if defined(__8MRam__)
+#define CONFIG_SYS_OR7_PRELIM	0xff80017c
+#define CONFIG_SYS_SDCR	0x00002211 /* SDRAM Control Register: A8 +  
A22/A24 */
+#elif defined(__16MRam__)
+#define CONFIG_SYS_OR7_PRELIM	0xff00017c
+#define CONFIG_SYS_SDCR	0x00004311 /* SDRAM Control Register: A9 +  
A23/A22 */
+#elif defined(__32MRam__)
+#define CONFIG_SYS_OR7_PRELIM	0xfe00017c
+#define CONFIG_SYS_SDCR	0x00004411 /* SDRAM Control Register: A9 +  
A24/A23 */
+#else
+#error "SDRAM size is not defined and SDCR has no setting"
+#endif
+
+/*-----------------------------------------------------------------------
+ * Port configuration
+ */
+#define CONFIG_SYS_PACNT	0x00000000
+#define CONFIG_SYS_PADDR	0x0000
+#define CONFIG_SYS_PADAT	0xffbf
+#define CONFIG_SYS_PBCNT	0x55554155 /* Ethernet/UART configuration */
+#define CONFIG_SYS_PBDDR	0x0000
+#define CONFIG_SYS_PBDAT	0x17ea
+#define CONFIG_SYS_PDCNT	0x00005eaa
+#endif /* _CONFIG_UC5272_H */
-- 
1.5.6