* [xen-unstable-smoke test] 102803: trouble: broken/pass
@ 2016-12-02 18:20 osstest service owner
0 siblings, 0 replies; only message in thread
From: osstest service owner @ 2016-12-02 18:20 UTC (permalink / raw)
To: xen-devel, osstest-admin
flight 102803 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/102803/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-xl 3 host-install(3) broken REGR. vs. 102796
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 12 migrate-support-check fail never pass
version targeted for testing:
xen a0b4216179359ea48748a384fbad5fd080b15bad
baseline version:
xen aaf839183ad1c7d1a5a2adedd1216b0094e94c81
Last test of basis 102796 2016-12-02 13:02:09 Z 0 days
Testing same since 102803 2016-12-02 16:17:54 Z 0 days 1 attempts
------------------------------------------------------------
People who touched revisions under test:
Andrew Cooper <andrew.cooper3@citrix.com>
He Chen <he.chen@linux.intel.com>
Kevin Tian <kevin.tian@intel.com>
Luwei Kang <luwei.kang@intel.com>
Wei Liu <wei.liu2@citrix.com>
jobs:
build-amd64 pass
build-armhf pass
build-amd64-libvirt pass
test-armhf-armhf-xl broken
test-amd64-amd64-xl-qemuu-debianhvm-i386 pass
test-amd64-amd64-libvirt pass
------------------------------------------------------------
sg-report-flight on osstest.test-lab.xenproject.org
logs: /home/logs/logs
images: /home/logs/images
Logs, config files, etc. are available at
http://logs.test-lab.xenproject.org/osstest/logs
Explanation of these reports, and of osstest in general, is at
http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README.email;hb=master
http://xenbits.xen.org/gitweb/?p=osstest.git;a=blob;f=README;hb=master
Test harness code can be found at
http://xenbits.xen.org/gitweb?p=osstest.git;a=summary
broken-step test-armhf-armhf-xl host-install(3)
Not pushing.
------------------------------------------------------------
commit a0b4216179359ea48748a384fbad5fd080b15bad
Author: He Chen <he.chen@linux.intel.com>
Date: Mon Nov 21 14:01:14 2016 +0800
x86/cpuid: Add AVX512_4VNNIW and AVX512_4FMAPS support
Add two new AVX512 subfeatures support for guest.
AVX512_4VNNIW:
Vector instructions for deep learning enhanced word variable precision.
AVX512_4FMAPS:
Vector instructions for deep learning floating-point single precision.
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: He Chen <he.chen@linux.intel.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
commit da2209921e509d809f049b98467b019b4600aebb
Author: Andrew Cooper <andrew.cooper3@citrix.com>
Date: Fri Sep 23 15:03:08 2016 +0100
x86/vmx: Shorten vmx_{get,set}_segment_register() for user segments
The x86_segment enumeration matches hardware SReg encoding, which can be used
to calculate the appropriate VMCS fields, rather than open coding every
instance.
This reduces the size of the switch statement, and the number of embedded BUG
frames from the __vm{read,write}() calls. In the unlikely case that a call
does fault, the field can unambiguously be retrieved from the GPR state
printed.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
commit 660eb42c021869cb57a32504e875135ea167f056
Author: Andrew Cooper <andrew.cooper3@citrix.com>
Date: Thu Oct 27 13:07:21 2016 +0000
x86/svm: Improve segment register printing in svm_vmcb_dump()
This makes it more succinct and easier to read.
Before:
(XEN) H_CR3 = 0x000000042a0ec000 CleanBits = 0
(XEN) CS: sel=0x0008, attr=0x029b, limit=0xffffffff, base=0x0000000000000000
(XEN) DS: sel=0x0033, attr=0x0cf3, limit=0xffffffff, base=0x0000000000000000
(XEN) SS: sel=0x0018, attr=0x0c93, limit=0xffffffff, base=0x0000000000000000
(XEN) ES: sel=0x0033, attr=0x0cf3, limit=0xffffffff, base=0x0000000000000000
(XEN) FS: sel=0x0033, attr=0x0cf3, limit=0xffffffff, base=0x0000000000000000
(XEN) GS: sel=0x0033, attr=0x0cf3, limit=0xffffffff, base=0x0000000000000000
(XEN) GDTR: sel=0x0000, attr=0x0000, limit=0x00000067, base=0x000000000010d100
(XEN) LDTR: sel=0x0000, attr=0x0000, limit=0x00000000, base=0x0000000000000000
(XEN) IDTR: sel=0x0000, attr=0x0000, limit=0x00000fff, base=0x0000000000110900
(XEN) TR: sel=0x0038, attr=0x0089, limit=0x00000067, base=0x000000000010d020
After:
(XEN) H_CR3 = 0x000000042a0ec000 CleanBits = 0
(XEN) sel attr limit base
(XEN) CS: 0008 029b ffffffff 0000000000000000
(XEN) DS: 0033 0cf3 ffffffff 0000000000000000
(XEN) SS: 0018 0c93 ffffffff 0000000000000000
(XEN) ES: 0033 0cf3 ffffffff 0000000000000000
(XEN) FS: 0033 0cf3 ffffffff 0000000000000000
(XEN) GS: 0033 0cf3 ffffffff 0000000000000000
(XEN) GDTR: 0000 0000 00000067 000000000010d100
(XEN) LDTR: 0000 0000 00000000 0000000000000000
(XEN) IDTR: 0000 0000 00000fff 0000000000110900
(XEN) TR: 0038 0089 00000067 000000000010d020
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Boris Ostrovsky <boris.ostorvsky@oracle.com>
Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
(qemu changes not included)
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