All of lore.kernel.org
 help / color / mirror / Atom feed
From: Takashi Iwai <tiwai@suse.de>
To: Mark Brown <broonie@kernel.org>
Cc: alsa-devel@alsa-project.org,
	Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Subject: Re: [PATCH 1/2] ASoC: Add support for Conexant CX2072X CODEC
Date: Thu, 02 May 2019 09:52:40 +0200	[thread overview]
Message-ID: <s5hsgtxnvhz.wl-tiwai@suse.de> (raw)
In-Reply-To: <s5h36lxpcbd.wl-tiwai@suse.de>

On Thu, 02 May 2019 09:04:06 +0200,
Takashi Iwai wrote:
> 
> > > +int snd_soc_cx2072x_get_jack_state(struct snd_soc_component *codec)
> > > +{
> > > +	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
> > > +	unsigned int jack;
> > > +	unsigned int type = 0;
> > > +	int state = 0;
> > > +	bool need_cache_bypass =
> > > +		snd_soc_component_get_bias_level(codec) == SND_SOC_BIAS_OFF;
> > > +
> > > +	if (need_cache_bypass)
> > > +		regcache_cache_only(cx2072x->regmap, false);
> > 
> > This looks funky and racy - what's going on here?  If the register map
> > is live and usable why is it in cache only mode?
> 
> Not to read the register while the chip is turned off, I suppose.

Actually other way round: the codec driver tries to avoid the whole
register access while the chip is in BIAS_OFF state.  OTOH, the jack
state check is still required even in that state, so it flips the
cache-only flag temporarily at reading the jack detect bit.

I guess we may remove the cache-only behavior, although this is a
nice-to-have thing.


Takashi

  reply	other threads:[~2019-05-02  7:52 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-23 14:13 [PATCH 0/2] ASoC: CX2072X codec support (revised) Takashi Iwai
2019-04-23 14:13 ` [PATCH 1/2] ASoC: Add support for Conexant CX2072X CODEC Takashi Iwai
2019-04-27 17:59   ` Mark Brown
2019-05-02  7:04     ` Takashi Iwai
2019-05-02  7:52       ` Takashi Iwai [this message]
2019-05-03  6:52         ` Mark Brown
     [not found]       ` <20190503064729.GF14916@sirena.org.uk>
2019-05-03  7:18         ` Takashi Iwai
     [not found]           ` <20190506042625.GK14916@sirena.org.uk>
2019-05-06  9:55             ` Takashi Iwai
2019-05-06 14:05               ` Mark Brown
2019-05-06 15:26                 ` Takashi Iwai
2019-05-08  8:10                   ` Mark Brown
2019-05-08  8:16                     ` Takashi Iwai
2019-05-08  8:59                       ` Mark Brown
2019-05-08  9:16                         ` Takashi Iwai
2019-05-08 10:10                           ` Mark Brown
2019-05-03  8:05         ` Takashi Iwai
2019-04-23 14:13 ` [PATCH 2/2] ASoC: Intel: Add machine driver for CX2072X on BYT/CHT platforms Takashi Iwai
2019-04-23 19:20   ` Pierre-Louis Bossart
2019-04-23 19:39     ` Takashi Iwai
2019-04-24 13:08       ` Takashi Iwai

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=s5hsgtxnvhz.wl-tiwai@suse.de \
    --to=tiwai@suse.de \
    --cc=alsa-devel@alsa-project.org \
    --cc=broonie@kernel.org \
    --cc=pierre-louis.bossart@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.