From: "b.l.huang" <banglang.huang-H32Fclmsjq1BDgjK7y7TUQ@public.gmane.org> To: u-boot <u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org> Cc: "philipp.tomsich" <philipp.tomsich-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org>, trini <trini-OWPKS81ov/FWk0Htik3J/w@public.gmane.org>, "Chen-Yu Tsai" <wens-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, "kever.yang" <kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>, linux-rockchip <linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> Subject: [PATCHv4][1/2] rockchip: rk3328: add rock-pi-e dts file Date: Sun, 31 May 2020 17:43:35 +0800 [thread overview] Message-ID: <tencent_512E4A30DC48A95E5030CEDC1E833E38E805@qq.com> (raw) The ROCK-PI-E is a credit card size SBC based on Rockchip RK3328 Quad-Core ARM Cortex A53. Net - Dual ethernet port, 1 X Gbe, 1 X 100M USB - USB 3.0 DC - USB-Type C, 5V 2A Storage - TF card, eMMC Just build idbloader.img and u-boot.itb for Rockpi E board and follow the blow steps to replace the relevant partition. dd if=idbloader.img of=/dev/sdcard seek=64 conv=notrunc dd if=u-boot.itb of=/dev/sdcard seek=16384 conv=notrunc Signed-off-by: Banglang Huang <banglang.huang-H32Fclmsjq1BDgjK7y7TUQ@public.gmane.org> --- Changes for v4 - separate dts file to another commit - fix bootup on tpl / spl mode Changes for v3 - rename to rock-pi-e Changes for v2 - add introduction for rockpie in doc/README.rockchip - enable CONFIG_MISC_INIT_R, CONFIG_SMBIOS_MANUFACTURER, and CONFIG_SMBIOS_PRODUCT_NAME --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 33 +++ arch/arm/dts/rk3328-rock-pi-e.dts | 267 ++++++++++++++++++++++ 3 files changed, 302 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi create mode 100644 arch/arm/dts/rk3328-rock-pi-e.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 12ec6c71dc..67d1adea2d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -107,7 +107,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ dtb-$(CONFIG_ROCKCHIP_RK3328) += \ rk3328-evb.dtb \ rk3328-roc-cc.dtb \ - rk3328-rock64.dtb + rk3328-rock64.dtb \ + rk3328-rock-pi-e.dtb dtb-$(CONFIG_ROCKCHIP_RK3368) += \ rk3368-lion.dtb \ diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi new file mode 100644 index 0000000000..bf5b1f3adc --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2020 Radxa + */ + +#include "rk3328-u-boot.dtsi" +#include "rk3328-sdram-ddr3-666.dtsi" + +&gpio0 { + u-boot,dm-spl; +}; + +&pinctrl { + u-boot,dm-spl; +}; + +&sdmmc0m1_gpio { + u-boot,dm-spl; +}; + +&pcfg_pull_up_4ma { + u-boot,dm-spl; +}; + +&usb_host0_xhci { + vbus-supply = <&vcc5v0_host_xhci>; + status = "okay"; +}; + +/* Need this and all the pinctrl/gpio stuff above to set pinmux */ +&vcc_sd { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts new file mode 100644 index 0000000000..21656b64a2 --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e.dts @@ -0,0 +1,267 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2020 Radxa + */ + +/dts-v1/; +#include "rk3328.dtsi" + +/ { + model = "Radxa Rockpi E"; + compatible = "radxa,rock-pi-e", "rockchip,rk3328"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + gmac_clkin: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac_clkin"; + #clock-cells = <0>; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0m1_gpio>; + regulator-name = "vcc_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_io>; + }; + + vcc5v0_host_xhci: vcc5v0-host-xhci-drv { + compatible = "regulator-fixed"; + enable-active-high; + regulator-name = "vcc5v0_host_xhci"; + gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + supports-emmc; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc18_emmc>; + status = "okay"; +}; + +&gmac2io { + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; + clock_in_out = "input"; + phy-supply = <&vcc_io>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmiim1_pins>; + snps,force_thresh_dma_mode; + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x26>; + rx_delay = <0x11>; + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + rk805: rk805@18 { + compatible = "rockchip,rk805"; + status = "okay"; + reg = <0x18>; + interrupt-parent = <&gpio2>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk805-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_io>; + vcc6-supply = <&vcc_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_18: LDO_REG1 { + regulator-name = "vcc_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc18_emmc: LDO_REG2 { + regulator-name = "vcc18_emmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_10: LDO_REG3 { + regulator-name = "vdd_10"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + }; + }; +}; + +&io_domains { + status = "okay"; + + vccio1-supply = <&vcc_io>; + vccio2-supply = <&vcc18_emmc>; + vccio3-supply = <&vcc_io>; + vccio4-supply = <&vcc_io>; + vccio5-supply = <&vcc_io>; + vccio6-supply = <&vcc_io>; + pmuio-supply = <&vcc_io>; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; + max-frequency = <150000000>; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; + supports-sd; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&saradc { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb20_otg { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: "b.l.huang" <banglang.huang@foxmail.com> To: u-boot@lists.denx.de Subject: [PATCHv4][1/2] rockchip: rk3328: add rock-pi-e dts file Date: Sun, 31 May 2020 17:43:35 +0800 [thread overview] Message-ID: <tencent_512E4A30DC48A95E5030CEDC1E833E38E805@qq.com> (raw) The ROCK-PI-E is a credit card size SBC based on Rockchip RK3328 Quad-Core ARM Cortex A53. Net - Dual ethernet port, 1 X Gbe, 1 X 100M USB - USB 3.0 DC - USB-Type C, 5V 2A Storage - TF card, eMMC Just build idbloader.img and u-boot.itb for Rockpi E board and follow the blow steps to replace the relevant partition. dd if=idbloader.img of=/dev/sdcard seek=64 conv=notrunc dd if=u-boot.itb of=/dev/sdcard seek=16384 conv=notrunc Signed-off-by: Banglang Huang <banglang.huang@foxmail.com> --- Changes for v4 - separate dts file to another commit - fix bootup on tpl / spl mode Changes for v3 - rename to rock-pi-e Changes for v2 - add introduction for rockpie in doc/README.rockchip - enable CONFIG_MISC_INIT_R, CONFIG_SMBIOS_MANUFACTURER, and CONFIG_SMBIOS_PRODUCT_NAME --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 33 +++ arch/arm/dts/rk3328-rock-pi-e.dts | 267 ++++++++++++++++++++++ 3 files changed, 302 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi create mode 100644 arch/arm/dts/rk3328-rock-pi-e.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 12ec6c71dc..67d1adea2d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -107,7 +107,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ dtb-$(CONFIG_ROCKCHIP_RK3328) += \ rk3328-evb.dtb \ rk3328-roc-cc.dtb \ - rk3328-rock64.dtb + rk3328-rock64.dtb \ + rk3328-rock-pi-e.dtb dtb-$(CONFIG_ROCKCHIP_RK3368) += \ rk3368-lion.dtb \ diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi new file mode 100644 index 0000000000..bf5b1f3adc --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2020 Radxa + */ + +#include "rk3328-u-boot.dtsi" +#include "rk3328-sdram-ddr3-666.dtsi" + +&gpio0 { + u-boot,dm-spl; +}; + +&pinctrl { + u-boot,dm-spl; +}; + +&sdmmc0m1_gpio { + u-boot,dm-spl; +}; + +&pcfg_pull_up_4ma { + u-boot,dm-spl; +}; + +&usb_host0_xhci { + vbus-supply = <&vcc5v0_host_xhci>; + status = "okay"; +}; + +/* Need this and all the pinctrl/gpio stuff above to set pinmux */ +&vcc_sd { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts new file mode 100644 index 0000000000..21656b64a2 --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e.dts @@ -0,0 +1,267 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2020 Radxa + */ + +/dts-v1/; +#include "rk3328.dtsi" + +/ { + model = "Radxa Rockpi E"; + compatible = "radxa,rock-pi-e", "rockchip,rk3328"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + gmac_clkin: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac_clkin"; + #clock-cells = <0>; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0m1_gpio>; + regulator-name = "vcc_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_io>; + }; + + vcc5v0_host_xhci: vcc5v0-host-xhci-drv { + compatible = "regulator-fixed"; + enable-active-high; + regulator-name = "vcc5v0_host_xhci"; + gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + supports-emmc; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc18_emmc>; + status = "okay"; +}; + +&gmac2io { + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; + clock_in_out = "input"; + phy-supply = <&vcc_io>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmiim1_pins>; + snps,force_thresh_dma_mode; + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x26>; + rx_delay = <0x11>; + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + rk805: rk805 at 18 { + compatible = "rockchip,rk805"; + status = "okay"; + reg = <0x18>; + interrupt-parent = <&gpio2>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk805-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_io>; + vcc6-supply = <&vcc_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_18: LDO_REG1 { + regulator-name = "vcc_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc18_emmc: LDO_REG2 { + regulator-name = "vcc18_emmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_10: LDO_REG3 { + regulator-name = "vdd_10"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + }; + }; +}; + +&io_domains { + status = "okay"; + + vccio1-supply = <&vcc_io>; + vccio2-supply = <&vcc18_emmc>; + vccio3-supply = <&vcc_io>; + vccio4-supply = <&vcc_io>; + vccio5-supply = <&vcc_io>; + vccio6-supply = <&vcc_io>; + pmuio-supply = <&vcc_io>; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; + max-frequency = <150000000>; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; + supports-sd; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&saradc { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb20_otg { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; -- 2.17.1
next reply other threads:[~2020-05-31 9:43 UTC|newest] Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-05-31 9:43 b.l.huang [this message] 2020-05-31 9:43 ` [PATCHv4][1/2] rockchip: rk3328: add rock-pi-e dts file b.l.huang 2020-05-31 13:39 ` Kever Yang 2020-05-31 13:39 ` Kever Yang
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=tencent_512E4A30DC48A95E5030CEDC1E833E38E805@qq.com \ --to=banglang.huang-h32fclmsjq1bdgjk7y7tuq@public.gmane.org \ --cc=kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org \ --cc=linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \ --cc=philipp.tomsich-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org \ --cc=trini-OWPKS81ov/FWk0Htik3J/w@public.gmane.org \ --cc=u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org \ --cc=wens-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.