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* [PATCH v2 0/2] hyper-v: avoid tsc calibration
@ 2017-06-22 10:07 Vitaly Kuznetsov
  2017-06-22 10:07 ` [PATCH v2 1/2] hyper-v: check frequency MSRs presence according to the specification Vitaly Kuznetsov
  2017-06-22 10:07 ` [PATCH v2 2/2] hyper-v: read TSC frequency from a synthetic MSR Vitaly Kuznetsov
  0 siblings, 2 replies; 5+ messages in thread
From: Vitaly Kuznetsov @ 2017-06-22 10:07 UTC (permalink / raw)
  To: devel
  Cc: linux-kernel, x86, Stephen Hemminger, Haiyang Zhang,
	K. Y. Srinivasan, Jork Loeser, Ladi Prosek, Thomas Gleixner

Changes since v1:
- s/AVAILABELE/AVAILABLE/ fixing the typo [Thomas Gleixner]

Original description:

TSC calibration on virtual machines is always error prone. It was found
that in nested environments Gen2 instances may get stuck on boot. As
Hyper-V hosts provide us with all the required information we can easily
avoid calibration. This is already done for other hypervisors (KVM,
Vmware).

Vitaly Kuznetsov (2):
  hyper-v: check frequency MSRs presence according to the specification
  hyper-v: read TSC frequency from a synthetic MSR

 arch/x86/include/uapi/asm/hyperv.h | 15 ++++++---------
 arch/x86/kernel/cpu/mshyperv.c     | 18 +++++++++++++++++-
 2 files changed, 23 insertions(+), 10 deletions(-)

-- 
2.9.4

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH v2 1/2] hyper-v: check frequency MSRs presence according to the specification
  2017-06-22 10:07 [PATCH v2 0/2] hyper-v: avoid tsc calibration Vitaly Kuznetsov
@ 2017-06-22 10:07 ` Vitaly Kuznetsov
  2017-06-22 13:40   ` [tip:x86/hyperv] x86/hyperv: Check " tip-bot for Vitaly Kuznetsov
  2017-06-22 10:07 ` [PATCH v2 2/2] hyper-v: read TSC frequency from a synthetic MSR Vitaly Kuznetsov
  1 sibling, 1 reply; 5+ messages in thread
From: Vitaly Kuznetsov @ 2017-06-22 10:07 UTC (permalink / raw)
  To: devel
  Cc: linux-kernel, x86, Stephen Hemminger, Haiyang Zhang,
	K. Y. Srinivasan, Jork Loeser, Ladi Prosek, Thomas Gleixner

Hyper-V TLFS specifies two bits which should be checked before accessing
frequency MSRs:
- AccessFrequencyMsrs (BIT(11) in EAX) which indicates if we have access to
  frequency MSRs.
- FrequencyMsrsAvailable (BIT(8) in EDX) which indicates is these MSRs are
  present.
Rename and specify these bits accordingly.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
---
 arch/x86/include/uapi/asm/hyperv.h | 15 ++++++---------
 arch/x86/kernel/cpu/mshyperv.c     |  3 ++-
 2 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/arch/x86/include/uapi/asm/hyperv.h b/arch/x86/include/uapi/asm/hyperv.h
index 432df4b..f4fef5a 100644
--- a/arch/x86/include/uapi/asm/hyperv.h
+++ b/arch/x86/include/uapi/asm/hyperv.h
@@ -34,16 +34,10 @@
 #define HV_X64_MSR_REFERENCE_TSC		0x40000021
 
 /*
- * There is a single feature flag that signifies the presence of the MSR
- * that can be used to retrieve both the local APIC Timer frequency as
- * well as the TSC frequency.
+ * There is a single feature flag that signifies if the partition has access
+ * to MSRs with local APIC and TSC frequencies.
  */
-
-/* Local APIC timer frequency MSR (HV_X64_MSR_APIC_FREQUENCY) is available */
-#define HV_X64_MSR_APIC_FREQUENCY_AVAILABLE (1 << 11)
-
-/* TSC frequency MSR (HV_X64_MSR_TSC_FREQUENCY) is available */
-#define HV_X64_MSR_TSC_FREQUENCY_AVAILABLE (1 << 11)
+#define HV_X64_ACCESS_FREQUENCY_MSRS		(1 << 11)
 
 /*
  * Basic SynIC MSRs (HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM
@@ -73,6 +67,9 @@
   */
 #define HV_X64_MSR_STAT_PAGES_AVAILABLE		(1 << 8)
 
+/* Frequency MSRs available */
+#define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE	(1 << 8)
+
 /* Crash MSR available */
 #define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE (1 << 10)
 
diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index 04cb8d3..3563c8e 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -194,7 +194,8 @@ static void __init ms_hyperv_init_platform(void)
 	}
 
 #ifdef CONFIG_X86_LOCAL_APIC
-	if (ms_hyperv.features & HV_X64_MSR_APIC_FREQUENCY_AVAILABLE) {
+	if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
+	    ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
 		/*
 		 * Get the APIC frequency.
 		 */
-- 
2.9.4

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH v2 2/2] hyper-v: read TSC frequency from a synthetic MSR
  2017-06-22 10:07 [PATCH v2 0/2] hyper-v: avoid tsc calibration Vitaly Kuznetsov
  2017-06-22 10:07 ` [PATCH v2 1/2] hyper-v: check frequency MSRs presence according to the specification Vitaly Kuznetsov
@ 2017-06-22 10:07 ` Vitaly Kuznetsov
  2017-06-22 13:40   ` [tip:x86/hyperv] x86/hyperv: Read " tip-bot for Vitaly Kuznetsov
  1 sibling, 1 reply; 5+ messages in thread
From: Vitaly Kuznetsov @ 2017-06-22 10:07 UTC (permalink / raw)
  To: devel
  Cc: linux-kernel, x86, Stephen Hemminger, Haiyang Zhang,
	K. Y. Srinivasan, Jork Loeser, Ladi Prosek, Thomas Gleixner

It was found that SMI_TRESHOLD of 50000 is not enough for Hyper-V
guests in nested environment and falling back to counting jiffies
is not an option for Gen2 guests as they don't have PIT. As Hyper-V
provides TSC frequency in a synthetic MSR we can just use this information
instead of doing a error prone calibration.

Reported-by: Ladi Prosek <lprosek@redhat.com>
Tested-by: Ladi Prosek <lprosek@redhat.com>
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
---
 arch/x86/kernel/cpu/mshyperv.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index 3563c8e..200c521 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -161,6 +161,15 @@ static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
 }
 #endif
 
+static unsigned long hv_get_tsc_khz(void)
+{
+	unsigned long freq;
+
+	rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
+
+	return freq/1000;
+}
+
 static void __init ms_hyperv_init_platform(void)
 {
 	int hv_host_info_eax;
@@ -193,6 +202,12 @@ static void __init ms_hyperv_init_platform(void)
 			hv_host_info_edx >> 24, hv_host_info_edx & 0xFFFFFF);
 	}
 
+	if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
+	    ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
+		x86_platform.calibrate_tsc = hv_get_tsc_khz;
+		x86_platform.calibrate_cpu = hv_get_tsc_khz;
+	}
+
 #ifdef CONFIG_X86_LOCAL_APIC
 	if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
 	    ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
-- 
2.9.4

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [tip:x86/hyperv] x86/hyperv: Check frequency MSRs presence according to the specification
  2017-06-22 10:07 ` [PATCH v2 1/2] hyper-v: check frequency MSRs presence according to the specification Vitaly Kuznetsov
@ 2017-06-22 13:40   ` tip-bot for Vitaly Kuznetsov
  0 siblings, 0 replies; 5+ messages in thread
From: tip-bot for Vitaly Kuznetsov @ 2017-06-22 13:40 UTC (permalink / raw)
  To: linux-tip-commits
  Cc: hpa, mingo, sthemmin, haiyangz, kys, vkuznets, tglx, lprosek,
	jloeser, linux-kernel

Commit-ID:  2cf0284223a40773bd0ec76a409a7cbf0607ca28
Gitweb:     http://git.kernel.org/tip/2cf0284223a40773bd0ec76a409a7cbf0607ca28
Author:     Vitaly Kuznetsov <vkuznets@redhat.com>
AuthorDate: Thu, 22 Jun 2017 18:07:29 +0800
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Thu, 22 Jun 2017 15:35:11 +0200

x86/hyperv: Check frequency MSRs presence according to the specification

Hyper-V TLFS specifies two bits which should be checked before accessing
frequency MSRs:

- AccessFrequencyMsrs (BIT(11) in EAX) which indicates if we have access to
  frequency MSRs.
- FrequencyMsrsAvailable (BIT(8) in EDX) which indicates is these MSRs are
  present.
  
Rename and specify these bits accordingly.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Stephen Hemminger <sthemmin@microsoft.com>
Cc: Haiyang Zhang <haiyangz@microsoft.com>
Cc: Ladi Prosek <lprosek@redhat.com>
Cc: Jork Loeser <jloeser@microsoft.com>
Cc: devel@linuxdriverproject.org
Cc: "K. Y. Srinivasan" <kys@microsoft.com>
Link: http://lkml.kernel.org/r/20170622100730.18112-2-vkuznets@redhat.com

---
 arch/x86/include/uapi/asm/hyperv.h | 15 ++++++---------
 arch/x86/kernel/cpu/mshyperv.c     |  3 ++-
 2 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/arch/x86/include/uapi/asm/hyperv.h b/arch/x86/include/uapi/asm/hyperv.h
index 432df4b..f4fef5a 100644
--- a/arch/x86/include/uapi/asm/hyperv.h
+++ b/arch/x86/include/uapi/asm/hyperv.h
@@ -34,16 +34,10 @@
 #define HV_X64_MSR_REFERENCE_TSC		0x40000021
 
 /*
- * There is a single feature flag that signifies the presence of the MSR
- * that can be used to retrieve both the local APIC Timer frequency as
- * well as the TSC frequency.
+ * There is a single feature flag that signifies if the partition has access
+ * to MSRs with local APIC and TSC frequencies.
  */
-
-/* Local APIC timer frequency MSR (HV_X64_MSR_APIC_FREQUENCY) is available */
-#define HV_X64_MSR_APIC_FREQUENCY_AVAILABLE (1 << 11)
-
-/* TSC frequency MSR (HV_X64_MSR_TSC_FREQUENCY) is available */
-#define HV_X64_MSR_TSC_FREQUENCY_AVAILABLE (1 << 11)
+#define HV_X64_ACCESS_FREQUENCY_MSRS		(1 << 11)
 
 /*
  * Basic SynIC MSRs (HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM
@@ -73,6 +67,9 @@
   */
 #define HV_X64_MSR_STAT_PAGES_AVAILABLE		(1 << 8)
 
+/* Frequency MSRs available */
+#define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE	(1 << 8)
+
 /* Crash MSR available */
 #define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE (1 << 10)
 
diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index 04cb8d3..3563c8e 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -194,7 +194,8 @@ static void __init ms_hyperv_init_platform(void)
 	}
 
 #ifdef CONFIG_X86_LOCAL_APIC
-	if (ms_hyperv.features & HV_X64_MSR_APIC_FREQUENCY_AVAILABLE) {
+	if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
+	    ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
 		/*
 		 * Get the APIC frequency.
 		 */

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [tip:x86/hyperv] x86/hyperv: Read TSC frequency from a synthetic MSR
  2017-06-22 10:07 ` [PATCH v2 2/2] hyper-v: read TSC frequency from a synthetic MSR Vitaly Kuznetsov
@ 2017-06-22 13:40   ` tip-bot for Vitaly Kuznetsov
  0 siblings, 0 replies; 5+ messages in thread
From: tip-bot for Vitaly Kuznetsov @ 2017-06-22 13:40 UTC (permalink / raw)
  To: linux-tip-commits
  Cc: mingo, jloeser, hpa, haiyangz, sthemmin, vkuznets, kys, lprosek,
	tglx, linux-kernel

Commit-ID:  71c2a2d0a81f096a2932fccb39a500116fece554
Gitweb:     http://git.kernel.org/tip/71c2a2d0a81f096a2932fccb39a500116fece554
Author:     Vitaly Kuznetsov <vkuznets@redhat.com>
AuthorDate: Thu, 22 Jun 2017 18:07:30 +0800
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Thu, 22 Jun 2017 15:35:12 +0200

x86/hyperv: Read TSC frequency from a synthetic MSR

It was found that SMI_TRESHOLD of 50000 is not enough for Hyper-V
guests in nested environment and falling back to counting jiffies
is not an option for Gen2 guests as they don't have PIT. As Hyper-V
provides TSC frequency in a synthetic MSR we can just use this information
instead of doing a error prone calibration.

Reported-and-tested-by: Ladi Prosek <lprosek@redhat.com>
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Stephen Hemminger <sthemmin@microsoft.com>
Cc: Haiyang Zhang <haiyangz@microsoft.com>
Cc: Jork Loeser <jloeser@microsoft.com>
Cc: devel@linuxdriverproject.org
Cc: "K. Y. Srinivasan" <kys@microsoft.com>
Link: http://lkml.kernel.org/r/20170622100730.18112-3-vkuznets@redhat.com

---
 arch/x86/kernel/cpu/mshyperv.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index 3563c8e..70e717f 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -161,6 +161,15 @@ static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
 }
 #endif
 
+static unsigned long hv_get_tsc_khz(void)
+{
+	unsigned long freq;
+
+	rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
+
+	return freq / 1000;
+}
+
 static void __init ms_hyperv_init_platform(void)
 {
 	int hv_host_info_eax;
@@ -193,6 +202,12 @@ static void __init ms_hyperv_init_platform(void)
 			hv_host_info_edx >> 24, hv_host_info_edx & 0xFFFFFF);
 	}
 
+	if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
+	    ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
+		x86_platform.calibrate_tsc = hv_get_tsc_khz;
+		x86_platform.calibrate_cpu = hv_get_tsc_khz;
+	}
+
 #ifdef CONFIG_X86_LOCAL_APIC
 	if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
 	    ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {

^ permalink raw reply related	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2017-06-22 13:42 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-06-22 10:07 [PATCH v2 0/2] hyper-v: avoid tsc calibration Vitaly Kuznetsov
2017-06-22 10:07 ` [PATCH v2 1/2] hyper-v: check frequency MSRs presence according to the specification Vitaly Kuznetsov
2017-06-22 13:40   ` [tip:x86/hyperv] x86/hyperv: Check " tip-bot for Vitaly Kuznetsov
2017-06-22 10:07 ` [PATCH v2 2/2] hyper-v: read TSC frequency from a synthetic MSR Vitaly Kuznetsov
2017-06-22 13:40   ` [tip:x86/hyperv] x86/hyperv: Read " tip-bot for Vitaly Kuznetsov

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