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From: Frank Wunderlich <frank-w@public-files.de>
To: Frank Wunderlich <linux@fw-web.de>
Cc: linux-rockchip@lists.infradead.org,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Johan Jonker <jbx6244@gmail.com>,
	Yifeng Zhao <yifeng.zhao@rock-chips.com>,
	Peter Geis <pgwipeout@gmail.com>,
	Michael Riesch <michael.riesch@wolfvision.net>,
	Liang Chen <cl@rock-chips.com>, Simon Xue <xxm@rock-chips.com>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Aw: [PATCH v4 3/5] phy: rockchip: Support PCIe v3
Date: Tue, 12 Jul 2022 12:51:04 +0200	[thread overview]
Message-ID: <trinity-460cb253-7fc2-438e-9e65-5c6da18c8f6c-1657623064606@3c-app-gmx-bs14> (raw)
In-Reply-To: <20220619082605.7935-4-linux@fw-web.de>

Hi,

just a gentle ping :)

regards Frank


> Gesendet: Sonntag, 19. Juni 2022 um 10:26 Uhr
> Von: "Frank Wunderlich" <linux@fw-web.de>
> From: Shawn Lin <shawn.lin@rock-chips.com>
>
> RK3568 supports PCIe v3 using not Combphy like PCIe v2 on rk3566.
> It use a dedicated PCIe-phy. Add support for this.
>
> Initial support by Shawn Lin, modifications by Peter Geis and Frank
> Wunderlich.
>
> Add data-lanes property for splitting pcie-lanes across controllers.
>
> The data-lanes is an array where x=0 means lane is disabled and  x > 0
> means controller x is assigned to phy lane.
>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> Suggested-by: Peter Geis <pgwipeout@gmail.com>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>


WARNING: multiple messages have this Message-ID (diff)
From: Frank Wunderlich <frank-w@public-files.de>
To: Frank Wunderlich <linux@fw-web.de>
Cc: linux-rockchip@lists.infradead.org,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Johan Jonker <jbx6244@gmail.com>,
	Yifeng Zhao <yifeng.zhao@rock-chips.com>,
	Peter Geis <pgwipeout@gmail.com>,
	Michael Riesch <michael.riesch@wolfvision.net>,
	Liang Chen <cl@rock-chips.com>, Simon Xue <xxm@rock-chips.com>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Aw: [PATCH v4 3/5] phy: rockchip: Support PCIe v3
Date: Tue, 12 Jul 2022 12:51:04 +0200	[thread overview]
Message-ID: <trinity-460cb253-7fc2-438e-9e65-5c6da18c8f6c-1657623064606@3c-app-gmx-bs14> (raw)
In-Reply-To: <20220619082605.7935-4-linux@fw-web.de>

Hi,

just a gentle ping :)

regards Frank


> Gesendet: Sonntag, 19. Juni 2022 um 10:26 Uhr
> Von: "Frank Wunderlich" <linux@fw-web.de>
> From: Shawn Lin <shawn.lin@rock-chips.com>
>
> RK3568 supports PCIe v3 using not Combphy like PCIe v2 on rk3566.
> It use a dedicated PCIe-phy. Add support for this.
>
> Initial support by Shawn Lin, modifications by Peter Geis and Frank
> Wunderlich.
>
> Add data-lanes property for splitting pcie-lanes across controllers.
>
> The data-lanes is an array where x=0 means lane is disabled and  x > 0
> means controller x is assigned to phy lane.
>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> Suggested-by: Peter Geis <pgwipeout@gmail.com>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Frank Wunderlich <frank-w@public-files.de>
To: Frank Wunderlich <linux@fw-web.de>
Cc: linux-rockchip@lists.infradead.org,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Johan Jonker <jbx6244@gmail.com>,
	Yifeng Zhao <yifeng.zhao@rock-chips.com>,
	Peter Geis <pgwipeout@gmail.com>,
	Michael Riesch <michael.riesch@wolfvision.net>,
	Liang Chen <cl@rock-chips.com>, Simon Xue <xxm@rock-chips.com>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Aw: [PATCH v4 3/5] phy: rockchip: Support PCIe v3
Date: Tue, 12 Jul 2022 12:51:04 +0200	[thread overview]
Message-ID: <trinity-460cb253-7fc2-438e-9e65-5c6da18c8f6c-1657623064606@3c-app-gmx-bs14> (raw)
In-Reply-To: <20220619082605.7935-4-linux@fw-web.de>

Hi,

just a gentle ping :)

regards Frank


> Gesendet: Sonntag, 19. Juni 2022 um 10:26 Uhr
> Von: "Frank Wunderlich" <linux@fw-web.de>
> From: Shawn Lin <shawn.lin@rock-chips.com>
>
> RK3568 supports PCIe v3 using not Combphy like PCIe v2 on rk3566.
> It use a dedicated PCIe-phy. Add support for this.
>
> Initial support by Shawn Lin, modifications by Peter Geis and Frank
> Wunderlich.
>
> Add data-lanes property for splitting pcie-lanes across controllers.
>
> The data-lanes is an array where x=0 means lane is disabled and  x > 0
> means controller x is assigned to phy lane.
>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> Suggested-by: Peter Geis <pgwipeout@gmail.com>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>


-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Frank Wunderlich <frank-w@public-files.de>
To: Frank Wunderlich <linux@fw-web.de>
Cc: linux-rockchip@lists.infradead.org,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Johan Jonker <jbx6244@gmail.com>,
	Yifeng Zhao <yifeng.zhao@rock-chips.com>,
	Peter Geis <pgwipeout@gmail.com>,
	Michael Riesch <michael.riesch@wolfvision.net>,
	Liang Chen <cl@rock-chips.com>, Simon Xue <xxm@rock-chips.com>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Aw: [PATCH v4 3/5] phy: rockchip: Support PCIe v3
Date: Tue, 12 Jul 2022 12:51:04 +0200	[thread overview]
Message-ID: <trinity-460cb253-7fc2-438e-9e65-5c6da18c8f6c-1657623064606@3c-app-gmx-bs14> (raw)
In-Reply-To: <20220619082605.7935-4-linux@fw-web.de>

Hi,

just a gentle ping :)

regards Frank


> Gesendet: Sonntag, 19. Juni 2022 um 10:26 Uhr
> Von: "Frank Wunderlich" <linux@fw-web.de>
> From: Shawn Lin <shawn.lin@rock-chips.com>
>
> RK3568 supports PCIe v3 using not Combphy like PCIe v2 on rk3566.
> It use a dedicated PCIe-phy. Add support for this.
>
> Initial support by Shawn Lin, modifications by Peter Geis and Frank
> Wunderlich.
>
> Add data-lanes property for splitting pcie-lanes across controllers.
>
> The data-lanes is an array where x=0 means lane is disabled and  x > 0
> means controller x is assigned to phy lane.
>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> Suggested-by: Peter Geis <pgwipeout@gmail.com>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-07-12 10:51 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-19  8:26 [PATCH v4 0/5] RK3568 PCIe V3 support Frank Wunderlich
2022-06-19  8:26 ` Frank Wunderlich
2022-06-19  8:26 ` Frank Wunderlich
2022-06-19  8:26 ` Frank Wunderlich
2022-06-19  8:26 ` [PATCH v4 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-08-01 18:36   ` Aw: " Frank Wunderlich
2022-08-01 18:36     ` Frank Wunderlich
2022-08-01 18:36     ` Frank Wunderlich
2022-06-19  8:26 ` [PATCH v4 2/5] dt-bindings: soc: grf: add pcie30-{phy,pipe}-grf Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26 ` [PATCH v4 3/5] phy: rockchip: Support PCIe v3 Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-07-12 10:51   ` Frank Wunderlich [this message]
2022-07-12 10:51     ` Aw: " Frank Wunderlich
2022-07-12 10:51     ` Frank Wunderlich
2022-07-12 10:51     ` Frank Wunderlich
2022-07-15 11:46   ` Vinod Koul
2022-07-15 11:46     ` Vinod Koul
2022-07-15 11:46     ` Vinod Koul
2022-07-15 11:46     ` Vinod Koul
2022-07-16 11:57     ` Aw: " Frank Wunderlich
2022-07-16 11:57       ` Frank Wunderlich
2022-07-16 11:57       ` Frank Wunderlich
2022-07-16 11:57       ` Frank Wunderlich
2022-06-19  8:26 ` [PATCH v4 4/5] arm64: dts: rockchip: rk3568: Add PCIe v3 nodes Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26 ` [PATCH v4 5/5] arm64: dts: rockchip: Add PCIe v3 nodes to BPI-R2-Pro Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich
2022-06-19  8:26   ` Frank Wunderlich

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