From: Paul Walmsley <paul.walmsley@sifive.com>
To: Rob Herring <robh+dt@kernel.org>
Cc: Palmer Dabbelt <palmer@sifive.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
linux-riscv@lists.infradead.org, Paul Walmsley <paul@pwsan.com>,
Mark Rutland <mark.rutland@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
devicetree@vger.kernel.org
Subject: Re: [PATCH 3/5] dt-bindings: riscv: convert cpu binding to json-schema
Date: Fri, 21 Jun 2019 14:39:42 -0700 (PDT) [thread overview]
Message-ID: <alpine.DEB.2.21.9999.1906211438210.16518@viisi.sifive.com> (raw)
In-Reply-To: <CAL_JsqL1a-irBa4MaVzak5DrTjxiySuqTJSQOqwzymVa=Uz=gg@mail.gmail.com>
On Fri, 21 Jun 2019, Rob Herring wrote:
> On Mon, Jun 10, 2019 at 3:46 PM Rob Herring <robh+dt@kernel.org> wrote:
> >
> > On Sun, Jun 2, 2019 at 2:01 AM Paul Walmsley <paul.walmsley@sifive.com> wrote:
> > >
> > > At Rob's request, we're starting to migrate our DT binding
> > > documentation to json-schema YAML format. Start by converting our cpu
> > > binding documentation. While doing so, document more properties and
> > > nodes. This includes adding binding documentation support for the E51
> > > and U54 CPU cores ("harts") that are present on this SoC.
[ ... ]
> > Reviewed-by: Rob Herring <robh@kernel.org>
>
> You all have applied this now leaving the binding checks broken. I
> have a fix for one issue validating the schema, but there's a
> dependency on schemas/cpus.yaml which I gave feedback on.
Sorry about that, Rob - will follow up.
- Paul
WARNING: multiple messages have this Message-ID (diff)
From: Paul Walmsley <paul.walmsley@sifive.com>
To: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Paul Walmsley <paul@pwsan.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Palmer Dabbelt <palmer@sifive.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH 3/5] dt-bindings: riscv: convert cpu binding to json-schema
Date: Fri, 21 Jun 2019 14:39:42 -0700 (PDT) [thread overview]
Message-ID: <alpine.DEB.2.21.9999.1906211438210.16518@viisi.sifive.com> (raw)
In-Reply-To: <CAL_JsqL1a-irBa4MaVzak5DrTjxiySuqTJSQOqwzymVa=Uz=gg@mail.gmail.com>
On Fri, 21 Jun 2019, Rob Herring wrote:
> On Mon, Jun 10, 2019 at 3:46 PM Rob Herring <robh+dt@kernel.org> wrote:
> >
> > On Sun, Jun 2, 2019 at 2:01 AM Paul Walmsley <paul.walmsley@sifive.com> wrote:
> > >
> > > At Rob's request, we're starting to migrate our DT binding
> > > documentation to json-schema YAML format. Start by converting our cpu
> > > binding documentation. While doing so, document more properties and
> > > nodes. This includes adding binding documentation support for the E51
> > > and U54 CPU cores ("harts") that are present on this SoC.
[ ... ]
> > Reviewed-by: Rob Herring <robh@kernel.org>
>
> You all have applied this now leaving the binding checks broken. I
> have a fix for one issue validating the schema, but there's a
> dependency on schemas/cpus.yaml which I gave feedback on.
Sorry about that, Rob - will follow up.
- Paul
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next prev parent reply other threads:[~2019-06-21 21:39 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-02 8:01 [PATCH 0/5] arch: riscv: add board and SoC DT file support Paul Walmsley
2019-06-02 8:01 ` Paul Walmsley
2019-06-02 8:01 ` [PATCH 1/5] arch: riscv: add support for building DTB files from DT source data Paul Walmsley
2019-06-02 8:01 ` Paul Walmsley
2019-06-02 8:01 ` [PATCH 2/5] dt-bindings: riscv: sifive: add YAML documentation for the SiFive FU540 Paul Walmsley
2019-06-02 8:01 ` Paul Walmsley
2019-06-02 8:01 ` Paul Walmsley
2019-06-02 8:01 ` [PATCH 3/5] dt-bindings: riscv: convert cpu binding to json-schema Paul Walmsley
2019-06-02 8:01 ` Paul Walmsley
2019-06-10 21:46 ` Rob Herring
2019-06-10 21:46 ` Rob Herring
2019-06-10 21:46 ` Rob Herring
2019-06-21 19:49 ` Rob Herring
2019-06-21 19:49 ` Rob Herring
2019-06-21 19:49 ` Rob Herring
2019-06-21 21:39 ` Paul Walmsley [this message]
2019-06-21 21:39 ` Paul Walmsley
2019-06-02 8:01 ` [PATCH 4/5] riscv: dts: add initial support for the SiFive FU540-C000 SoC Paul Walmsley
2019-06-02 8:01 ` Paul Walmsley
2019-06-02 8:01 ` [PATCH 5/5] riscv: dts: add initial board data for the SiFive HiFive Unleashed Paul Walmsley
2019-06-02 8:01 ` Paul Walmsley
2019-06-02 8:01 ` Paul Walmsley
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