From: Jiaxin Yu <jiaxin.yu@mediatek.com>
To: <broonie@kernel.org>, <mark.rutland@arm.com>,
<robh+dt@kernel.org>, <linux@roeck-us.net>,
<wim@linux-watchdog.org>
Cc: alsa-devel@alsa-project.org, yong.liang@mediatek.com,
"yong.liang" <yong.liang@mediatek.corp-partner.google.com>,
lgirdwood@gmail.com, jiaxin.yu@mediatek.com, tzungbi@google.com,
linux-mediatek@lists.infradead.org, eason.yen@mediatek.com,
linux-arm-kernel@lists.infradead.org
Subject: [alsa-devel] [PATCH v2 1/4] dt-bindings: mediatek: mt8183: Add #reset-cells
Date: Fri, 27 Sep 2019 18:31:54 +0800 [thread overview]
Message-ID: <1569580317-21181-2-git-send-email-jiaxin.yu@mediatek.com> (raw)
In-Reply-To: <1569580317-21181-1-git-send-email-jiaxin.yu@mediatek.com>
From: "yong.liang" <yong.liang@mediatek.corp-partner.google.com>
Add #reset-cells property and update example
Signed-off-by: yong.liang <yong.liang@mediatek.corp-partner.google.com>
---
.../devicetree/bindings/watchdog/mtk-wdt.txt | 9 ++++++---
.../dt-bindings/reset-controller/mt8183-resets.h | 13 +++++++++++++
2 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
index 3ee625d0812f..ecb9ff784832 100644
--- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt
@@ -16,11 +16,14 @@ Required properties:
Optional properties:
- timeout-sec: contains the watchdog timeout in seconds.
+- #reset-cells: Should be 1.
Example:
-wdt: watchdog@10000000 {
- compatible = "mediatek,mt6589-wdt";
- reg = <0x10000000 0x18>;
+watchdog: watchdog@10007000 {
+ compatible = "mediatek,mt8183-wdt",
+ "mediatek,mt6589-wdt";
+ reg = <0 0x10007000 0 0x100>;
timeout-sec = <10>;
+ #reset-cells = <1>;
};
diff --git a/include/dt-bindings/reset-controller/mt8183-resets.h b/include/dt-bindings/reset-controller/mt8183-resets.h
index 8804e34ebdd4..47dadcf3fd24 100644
--- a/include/dt-bindings/reset-controller/mt8183-resets.h
+++ b/include/dt-bindings/reset-controller/mt8183-resets.h
@@ -78,4 +78,17 @@
#define MT8183_INFRACFG_AO_I2C7_SW_RST 126
#define MT8183_INFRACFG_AO_I2C8_SW_RST 127
+#define MT8183_TOPRGU_MM_SW_RST 1
+#define MT8183_TOPRGU_MFG_SW_RST 2
+#define MT8183_TOPRGU_VENC_SW_RST 3
+#define MT8183_TOPRGU_VDEC_SW_RST 4
+#define MT8183_TOPRGU_IMG_SW_RST 5
+#define MT8183_TOPRGU_MD_SW_RST 7
+#define MT8183_TOPRGU_CONN_SW_RST 9
+#define MT8183_TOPRGU_CONN_MCU_SW_RST 12
+#define MT8183_TOPRGU_IPU0_SW_RST 14
+#define MT8183_TOPRGU_IPU1_SW_RST 15
+#define MT8183_TOPRGU_AUDIO_SW_RST 17
+#define MT8183_TOPRGU_CAMSYS_SW_RST 18
+
#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8183 */
--
2.18.0
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next prev parent reply other threads:[~2019-09-27 10:35 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-27 10:31 [alsa-devel] [PATCH v2 0/4] ASoC: mt8183: fix audio playback slowly after playback Jiaxin Yu
2019-09-27 10:31 ` Jiaxin Yu [this message]
2019-09-27 10:31 ` [alsa-devel] [PATCH v2 2/4] watchdog: mtk_wdt: mt8183: Add reset controller Jiaxin Yu
2019-09-28 17:49 ` Guenter Roeck
2019-09-30 8:17 ` Yingjoe Chen
2019-10-03 13:49 ` Guenter Roeck
2019-10-05 5:59 ` Yingjoe Chen
2019-10-05 14:46 ` Guenter Roeck
2019-10-08 14:08 ` Philipp Zabel
2019-10-05 5:50 ` Yingjoe Chen
2019-09-27 10:31 ` [alsa-devel] [PATCH v2 3/4] dt-bindings: medaitek: mt8183: add property "resets" && "reset-names" Jiaxin Yu
2019-10-08 12:53 ` [alsa-devel] Applied "dt-bindings: medaitek: mt8183: add property "resets" && "reset-names"" to the asoc tree Mark Brown
2019-09-27 10:31 ` [alsa-devel] [PATCH v2 4/4] ASoC: mt8183: fix audio playback slowly after playback during bootup Jiaxin Yu
2019-10-05 6:07 ` Yingjoe Chen
2019-10-08 12:11 ` Mark Brown
2019-10-08 12:53 ` [alsa-devel] Applied "ASoC: mt8183: fix audio playback slowly after playback during bootup" to the asoc tree Mark Brown
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