From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Cezary Rojewski <cezary.rojewski@intel.com>
Cc: pierre-louis.bossart@linux.intel.com,
alsa-devel@alsa-project.org, filip.kaczmarski@intel.com,
harshapriya.n@intel.com, marcin.barlik@intel.com,
zwisler@google.com, lgirdwood@gmail.com, tiwai@suse.com,
filip.proborszcz@intel.com, broonie@kernel.org,
amadeuszx.slawinski@linux.intel.com, michal.wasko@intel.com,
cujomalainey@chromium.org, krzysztof.hejmowski@intel.com,
ppapierkowski@habana.ai, vamshi.krishna.gopal@intel.com
Subject: Re: [PATCH v4 02/13] ASoC: Intel: catpt: Define DSP operations
Date: Thu, 20 Aug 2020 12:00:55 +0300 [thread overview]
Message-ID: <20200820090055.GT1891694@smile.fi.intel.com> (raw)
In-Reply-To: <237f2343-fd57-8ebf-b8f2-8c2cf5c3c745@intel.com>
On Thu, Aug 20, 2020 at 09:30:13AM +0200, Cezary Rojewski wrote:
> On 2020-08-17 1:12 PM, Cezary Rojewski wrote:
> > On 2020-08-13 8:51 PM, Andy Shevchenko wrote:
> > > On Wed, Aug 12, 2020 at 10:57:42PM +0200, Cezary Rojewski wrote:
...
> > > > +#define CATPT_DMA_MAXBURST 0x3
> > >
> > > We have DMA engine definitions for that, please avoid magic numbers.
> >
> > As with most of the dma stuff, based on existing:
> > /sound/soc/intel/common/sst-firmware.c SST_DSP_DMA_MAX_BURST
> >
> > Ack.
>
> Actually, wasn't able to find anything _MAXBURST related in dmaengine.h.
> _BUSWIDTH_ have their constants defined there, true, but I'm already making
> use of these and this is dst/src_maxburst we're talking about. From what
> I've seen in kernel sources, most usages are direct assignments:
> xxx_maxburst = Y;
Okay, and how 0x3 bytes can be a burst? Does DMA engine support this?
...
> > > > + /* set D3 */
> > > > + catpt_updatel_pci(cdev, PMCS, CATPT_PMCS_PS, CATPT_PMCS_PS_D3HOT);
> > > > + udelay(50);
> > >
> > > Don't we have PCI core function for this?
> > >
> > > > + /* set D0 */
> > > > + catpt_updatel_pci(cdev, PMCS, CATPT_PMCS_PS, 0);
> > > > + udelay(100);
> > >
> > > Ditto.
> > >
> > > > + /* set D3 */
> > > > + catpt_updatel_pci(cdev, PMCS, CATPT_PMCS_PS, CATPT_PMCS_PS_D3HOT);
> > > > + udelay(50);
> > >
> > > Ditto.
> > >
> > > > + /* set D0 */
> > > > + catpt_updatel_pci(cdev, PMCS, CATPT_PMCS_PS, 0);
> > >
> > > Ditto.
> >
> > Thanks to you now I know the correct answer: yes.
> > Ack for all of these. Good advice Andy, again!
>
> Similar situation occurred here. What we're dealing with is: instance of
> 'struct platform_device' type, found on bus: acpi with PCI set as a parent
> device.
>
> Scope found in DSDT:
> \_SB_.PCI0.ADSP
> sysfs device path:
> /sys/devices/pci0000:00/INT3438:00
> Within the latter _no_ standard utility files will be available e.g.:
> ability to dump PCI config space, bars and such.
I see. Can you dump DSDT somewhere? We are interested in
PSx/PRx/PSE/PSW/PSC/PRE/PRW/ON/OFF (x=0..3) methods.
> I haven't found any functionality to extract "pci_companion" from a
> platform_device. What can be made use of is: PCI_D3hot and PCI_D0 enum
> constants, as pci_set_power_state() does not apply - expects struct pci_dev
> *.
>
> Perhaps got misled by the function naming? catpt_updatel_xxx helpers: _xxx
> denotes specific ADSP device's mmio space. Almost all cases are covered by
> _pci and _shim.
If we really need to use these commands directly, utilize at least definitions
from PCI core, e.g. PCI_D0, PCI_D3hot, PCI_PM_CTRL.
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2020-08-20 9:10 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-12 20:57 [PATCH v4 00/13] ASoC: Intel: Catpt - Lynx and Wildcat point Cezary Rojewski
2020-08-12 20:57 ` [PATCH v4 01/13] ASoC: Intel: Add catpt device Cezary Rojewski
2020-08-13 18:29 ` Andy Shevchenko
2020-08-17 10:02 ` Cezary Rojewski
2020-08-18 10:07 ` Andy Shevchenko
2020-08-19 13:26 ` Cezary Rojewski
2020-08-19 13:43 ` Andy Shevchenko
2020-08-25 9:32 ` Cezary Rojewski
2020-08-25 13:18 ` Andy Shevchenko
2020-08-25 13:19 ` Andy Shevchenko
2020-08-25 20:43 ` Cezary Rojewski
2020-08-12 20:57 ` [PATCH v4 02/13] ASoC: Intel: catpt: Define DSP operations Cezary Rojewski
2020-08-13 18:51 ` Andy Shevchenko
2020-08-17 11:12 ` Cezary Rojewski
2020-08-18 11:50 ` Andy Shevchenko
2020-08-19 13:46 ` Cezary Rojewski
2020-08-19 14:21 ` Andy Shevchenko
2020-08-19 14:54 ` Cezary Rojewski
2020-08-20 7:30 ` Cezary Rojewski
2020-08-20 9:00 ` Andy Shevchenko [this message]
2020-08-24 16:33 ` Cezary Rojewski
2020-08-25 13:16 ` Andy Shevchenko
2020-08-25 13:23 ` Andy Shevchenko
2020-08-27 10:06 ` Cezary Rojewski
2020-08-12 20:57 ` [PATCH v4 03/13] ASoC: Intel: catpt: Firmware loading and context restore Cezary Rojewski
2020-08-12 20:57 ` [PATCH v4 04/13] ASoC: Intel: catpt: Implement IPC protocol Cezary Rojewski
2020-08-12 20:57 ` [PATCH v4 05/13] ASoC: Intel: catpt: Add IPC messages Cezary Rojewski
2020-08-12 20:57 ` [PATCH v4 06/13] ASoC: Intel: catpt: PCM operations Cezary Rojewski
2020-08-12 20:57 ` [PATCH v4 07/13] ASoC: Intel: catpt: Event tracing Cezary Rojewski
2020-08-12 20:57 ` [PATCH v4 08/13] ASoC: Intel: catpt: Simple sysfs attributes Cezary Rojewski
2020-08-12 20:57 ` [PATCH v4 09/13] ASoC: Intel: Select catpt and deprecate haswell Cezary Rojewski
2020-08-12 20:57 ` [PATCH v4 10/13] ASoC: Intel: haswell: Remove haswell-solution specific code Cezary Rojewski
2020-08-13 18:57 ` Andy Shevchenko
2020-08-12 20:57 ` [PATCH v4 11/13] ASoC: Intel: broadwell: " Cezary Rojewski
2020-08-13 18:56 ` Andy Shevchenko
2020-08-12 20:57 ` [PATCH v4 12/13] ASoC: Intel: bdw-5650: " Cezary Rojewski
2020-08-13 18:56 ` Andy Shevchenko
2020-08-12 20:57 ` [PATCH v4 13/13] ASoC: Intel: bdw-5677: " Cezary Rojewski
2020-08-13 18:57 ` Andy Shevchenko
2020-08-13 8:30 ` [PATCH v4 00/13] ASoC: Intel: Catpt - Lynx and Wildcat point Amadeusz Sławiński
2020-08-13 16:00 ` Liam Girdwood
2020-08-13 18:11 ` Cezary Rojewski
2020-08-13 19:03 ` Liam Girdwood
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