From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>
Cc: pierre-louis.bossart@linux.intel.com, cezary.rojewski@intel.com,
lars@metafoo.de, alsa-devel@alsa-project.org,
jee.heng.sia@intel.com, tiwai@suse.com,
liam.r.girdwood@linux.intel.com, vkoul@kernel.org,
broonie@kernel.org
Subject: Re: [RFC PATCH 2/4] ASoC: soc-generic-dmaengine-pcm: Add custom prepare and submit function
Date: Tue, 17 Nov 2020 17:50:38 +0200 [thread overview]
Message-ID: <20201117155038.GO4077@smile.fi.intel.com> (raw)
In-Reply-To: <20201117080354.4309-4-michael.wei.hong.sit@intel.com>
On Tue, Nov 17, 2020 at 04:03:48PM +0800, Michael Sit Wei Hong wrote:
> Enabling custom prepare and submit function to overcome DMA limitation.
>
> In the Intel KeemBay solution, the DW AXI-based DMA has a limitation on
> the number of DMA blocks per transfer. In the case of 16 bit audio ASoC
> would allocate blocks exceeding the DMA block limitation.
I'm still not sure the hardware has such a limitation.
The Synopsys IP supports linked list (LLI) transfers and I hardly can
imagine the list has any limitation. Even though, one can always emulate
LLI in software how it's done in the DesignWare AHB DMA driver.
I have briefly read chapter 4.6 "AXI_DMA" of Keem Bay TRM and didn't
find any errata or limits like this.
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2020-11-17 15:50 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-17 8:03 [RFC PATCH 0/4] Enable DMA mode on Intel Keem Bay platform Michael Sit Wei Hong
2020-11-17 8:03 ` [RFC PATCH 1/4] dt-bindings: sound: intel, keembay-i2s: Add info for device to use DMA Michael Sit Wei Hong
2020-11-17 8:03 ` [RFC PATCH 2/4] ASoC: soc-generic-dmaengine-pcm: Add custom prepare and submit function Michael Sit Wei Hong
2020-11-17 13:56 ` Vinod Koul
2020-11-17 15:50 ` Andy Shevchenko [this message]
2020-11-18 0:34 ` Sia, Jee Heng
2020-11-18 4:40 ` Vinod Koul
2020-11-18 5:27 ` Sia, Jee Heng
2020-11-18 14:50 ` Shevchenko, Andriy
2020-11-24 3:51 ` Sia, Jee Heng
2020-11-30 9:57 ` Sit, Michael Wei Hong
2020-11-30 10:45 ` Lars-Peter Clausen
2020-11-30 11:09 ` Shevchenko, Andriy
2020-12-01 8:22 ` Lars-Peter Clausen
2020-12-01 9:10 ` Sia, Jee Heng
2020-12-05 0:55 ` Sit, Michael Wei Hong
2020-12-07 10:05 ` Lars-Peter Clausen
2020-12-07 15:36 ` Pierre-Louis Bossart
2020-12-08 3:21 ` Sia, Jee Heng
2020-12-10 8:24 ` Sit, Michael Wei Hong
2020-12-14 3:23 ` Sit, Michael Wei Hong
2020-11-17 8:03 ` [RFC PATCH 3/4] ASoC: dmaengine_pcm: expose functions to header file for custom functions Michael Sit Wei Hong
2020-11-17 8:03 ` [RFC PATCH 4/4] ASoC: Intel: KMB: Enable DMA transfer mode Michael Sit Wei Hong
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