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* Potential freesync Arithmetic Issue
@ 2020-10-28 17:39 Bryan Angelo
  2020-10-30 15:33 ` Harry Wentland
  0 siblings, 1 reply; 2+ messages in thread
From: Bryan Angelo @ 2020-10-28 17:39 UTC (permalink / raw)
  To: amd-gfx


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While looking at the following commit, I noticed what might be an
arithmetic issue potentially stemming from some merge/patch conflict
resolution.

commit ad339f69114a6a145fc94d44376851c53dee3475
Author: Jaehyun Chung <jaehyun.chung@amd.com>
Date:   Thu Jun 18 15:27:35 2020 -0400

    drm/amd/display: Fix incorrect rounding for 10Hz refresh range

    [Why]
    In cases where refresh range is slightly below 10, FreeSync is not
    active or supported. Need to round values before checking refresh range
    in order to have FreeSync supported in these cases.

    [How]
    Remove redundant values and round values before checking valid refresh
range.

    Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com>
    Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
    Acked-by: Anthony Koo <Anthony.Koo@amd.com>
    Acked-by: Eryk Brol <eryk.brol@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

There appears to be an errant plus sign when calculating the refresh_range
-
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/amd/display/modules/freesync/freesync.c?h=v5.10-rc1#n948

  refresh_range = div_u64(in_out_vrr->max_refresh_in_uhz + 500000, 1000000)
-
+ div_u64(in_out_vrr->min_refresh_in_uhz + 500000, 1000000);

I am unfamiliar with the freesync codebase so I opted to present the
potential issue here as opposed to preparing a patch.

Thanks.

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^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: Potential freesync Arithmetic Issue
  2020-10-28 17:39 Potential freesync Arithmetic Issue Bryan Angelo
@ 2020-10-30 15:33 ` Harry Wentland
  0 siblings, 0 replies; 2+ messages in thread
From: Harry Wentland @ 2020-10-30 15:33 UTC (permalink / raw)
  To: Bryan Angelo, amd-gfx

Thanks, Bryan, for your report. It was indeed an issue with the merge. 
The fix will be in next week's set of DC patches.

Harry



On 2020-10-28 1:39 p.m., Bryan Angelo wrote:
> While looking at the following commit, I noticed what might be an 
> arithmetic issue potentially stemming from some merge/patch conflict 
> resolution.
> 
> commit ad339f69114a6a145fc94d44376851c53dee3475
> Author: Jaehyun Chung <jaehyun.chung@amd.com <mailto:jaehyun.chung@amd.com>>
> Date:   Thu Jun 18 15:27:35 2020 -0400
> 
>      drm/amd/display: Fix incorrect rounding for 10Hz refresh range
> 
>      [Why]
>      In cases where refresh range is slightly below 10, FreeSync is not
>      active or supported. Need to round values before checking refresh range
>      in order to have FreeSync supported in these cases.
> 
>      [How]
>      Remove redundant values and round values before checking valid 
> refresh range.
> 
>      Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com 
> <mailto:jaehyun.chung@amd.com>>
>      Reviewed-by: Aric Cyr <Aric.Cyr@amd.com <mailto:Aric.Cyr@amd.com>>
>      Acked-by: Anthony Koo <Anthony.Koo@amd.com 
> <mailto:Anthony.Koo@amd.com>>
>      Acked-by: Eryk Brol <eryk.brol@amd.com <mailto:eryk.brol@amd.com>>
>      Signed-off-by: Alex Deucher <alexander.deucher@amd.com 
> <mailto:alexander.deucher@amd.com>>
> 
> There appears to be an errant plus sign when calculating the 
> refresh_range - 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/amd/display/modules/freesync/freesync.c?h=v5.10-rc1#n948 
> <https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ftorvalds%2Flinux.git%2Ftree%2Fdrivers%2Fgpu%2Fdrm%2Famd%2Fdisplay%2Fmodules%2Ffreesync%2Ffreesync.c%3Fh%3Dv5.10-rc1%23n948&data=04%7C01%7CHARRY.WENTLAND%40amd.com%7Cd75a7f7d0f3c41a2079808d87b731dce%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637395082108247063%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C2000&sdata=MBsKCteoT9QgydORyU2e%2FMWyCP0ae0dp8chBzHczbSo%3D&reserved=0>
> 
>    refresh_range = div_u64(in_out_vrr->max_refresh_in_uhz + 500000, 
> 1000000) -
> + div_u64(in_out_vrr->min_refresh_in_uhz + 500000, 1000000);
> 
> I am unfamiliar with the freesync codebase so I opted to present the 
> potential issue here as opposed to preparing a patch.
> 
> Thanks.
> 
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> 
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