From: Darren Powell <darren.powell@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Darren Powell <darren.powell@amd.com>
Subject: [PATCH 1/3] amdgpu/pm: add extra info to SMU msg pre-check failed message
Date: Fri, 16 Apr 2021 18:29:54 -0400 [thread overview]
Message-ID: <20210416222956.4580-2-darren.powell@amd.com> (raw)
In-Reply-To: <20210416222956.4580-1-darren.powell@amd.com>
Insert the value of the response to error message emitted when the
SMU msg pre-check failes
Signed-off-by: Darren Powell <darren.powell@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index dc7d2e71aa6f..5d1743f3321e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -104,8 +104,8 @@ int smu_cmn_send_msg_without_waiting(struct smu_context *smu,
ret = smu_cmn_wait_for_response(smu);
if (ret != 0x1) {
- dev_err(adev->dev, "Msg issuing pre-check failed and "
- "SMU may be not in the right state!\n");
+ dev_err(adev->dev, "Msg issuing pre-check failed(0x%x) and "
+ "SMU may be not in the right state!\n", ret);
if (ret != -ETIME)
ret = -EIO;
return ret;
--
2.25.1
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next prev parent reply other threads:[~2021-04-16 22:31 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-16 22:29 [PATCH 0/3] Prevent set of DCEFCLK on smu_v11 gpus Darren Powell
2021-04-16 22:29 ` Darren Powell [this message]
2021-04-16 22:29 ` [PATCH 2/3] amdgpu/pm: Prevent force of DCEFCLK on NAVI10 and SIENNA_CICHLID Darren Powell
2021-04-16 22:29 ` [PATCH 3/3] amdgpu/pm: set pp_dpm_dcefclk to readonly on smu_v11 gpus Darren Powell
2021-04-19 0:47 ` Feng, Kenneth
2021-04-23 3:22 [PATCH v2 0/3] Prevent set of DCEFCLK " Darren Powell
2021-04-23 3:22 ` [PATCH 1/3] amdgpu/pm: add extra info to SMU msg pre-check failed message Darren Powell
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