From: Joseph Greathouse <Joseph.Greathouse@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Joseph Greathouse <Joseph.Greathouse@amd.com>, Hawking.Zhang@amd.com
Subject: [PATCH] Update NV SIMD-per-CU to 2
Date: Mon, 3 May 2021 12:25:57 -0500 [thread overview]
Message-ID: <20210503172557.1130985-1-Joseph.Greathouse@amd.com> (raw)
Navi series GPUs have 2 SIMDs per CU (and then 2 CUs per WGP).
The NV enum headers incorrectly listed this as 4, which later meant
we were incorrectly reporting the number of SIMDs in the HSA
topology. This could cause problems down the line for user-space
applications that want to launch a fixed amount of work to each
SIMD.
Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Change-Id: I94021ca71363a3d27330b2fda8e6acaac258017e
---
drivers/gpu/drm/amd/include/navi10_enum.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/include/navi10_enum.h b/drivers/gpu/drm/amd/include/navi10_enum.h
index d5ead9680c6e..84bcb96f76ea 100644
--- a/drivers/gpu/drm/amd/include/navi10_enum.h
+++ b/drivers/gpu/drm/amd/include/navi10_enum.h
@@ -430,7 +430,7 @@ ARRAY_2D_DEPTH = 0x00000001,
*/
typedef enum ENUM_NUM_SIMD_PER_CU {
-NUM_SIMD_PER_CU = 0x00000004,
+NUM_SIMD_PER_CU = 0x00000002,
} ENUM_NUM_SIMD_PER_CU;
/*
--
2.20.1
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next reply other threads:[~2021-05-03 17:26 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-03 17:25 Joseph Greathouse [this message]
2021-05-03 17:37 ` [PATCH] Update NV SIMD-per-CU to 2 Deucher, Alexander
2021-05-03 17:46 ` Felix Kuehling
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