* [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0
@ 2022-05-05 20:07 Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable BACO support " Alex Deucher
` (12 more replies)
0 siblings, 13 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Likun Gao, Evan Quan
From: Evan Quan <evan.quan@amd.com>
Enable those features supported by latest PMFW 78.34.0.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index b595497e9bf5..71312ed26fb9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -256,6 +256,13 @@ smu_v13_0_0_get_allowed_feature_mask(struct smu_context *smu,
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_DCN_BIT);
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DS_DCFCLK_BIT);
+ if (adev->pm.pp_feature & PP_PCIE_DPM_MASK) {
+ *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_LINK_BIT);
+ *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DS_LCLK_BIT);
+ }
+
+ *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_BACO_BIT);
+
return 0;
}
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amd/pm: enable BACO support for SMU 13.0.0
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable UCLK DPM " Alex Deucher
` (11 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Likun Gao, Evan Quan
From: Evan Quan <evan.quan@amd.com>
Enable SMU 13.0.0 BACO support.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 11 +++
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 75 +++++++++++++++++++
.../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 7 ++
3 files changed, 93 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
index 4a52ab737dd5..013be82db1f3 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
@@ -282,5 +282,16 @@ int smu_v13_0_deep_sleep_control(struct smu_context *smu,
int smu_v13_0_gfx_ulv_control(struct smu_context *smu,
bool enablement);
+bool smu_v13_0_baco_is_support(struct smu_context *smu);
+
+enum smu_baco_state smu_v13_0_baco_get_state(struct smu_context *smu);
+
+int smu_v13_0_baco_set_state(struct smu_context *smu,
+ enum smu_baco_state state);
+
+int smu_v13_0_baco_enter(struct smu_context *smu);
+
+int smu_v13_0_baco_exit(struct smu_context *smu);
+
#endif
#endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 2c57bc573ee8..d73deb3e596f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -2206,3 +2206,78 @@ int smu_v13_0_gfx_ulv_control(struct smu_context *smu,
return ret;
}
+
+bool smu_v13_0_baco_is_support(struct smu_context *smu)
+{
+ struct smu_baco_context *smu_baco = &smu->smu_baco;
+
+ if (amdgpu_sriov_vf(smu->adev) ||
+ !smu_baco->platform_support)
+ return false;
+
+ if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_BACO_BIT) &&
+ !smu_cmn_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT))
+ return false;
+
+ return true;
+}
+
+enum smu_baco_state smu_v13_0_baco_get_state(struct smu_context *smu)
+{
+ struct smu_baco_context *smu_baco = &smu->smu_baco;
+
+ return smu_baco->state;
+}
+
+int smu_v13_0_baco_set_state(struct smu_context *smu,
+ enum smu_baco_state state)
+{
+ struct smu_baco_context *smu_baco = &smu->smu_baco;
+ struct amdgpu_device *adev = smu->adev;
+ int ret = 0;
+
+ if (smu_v13_0_baco_get_state(smu) == state)
+ return 0;
+
+ if (state == SMU_BACO_STATE_ENTER) {
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_EnterBaco,
+ 0,
+ NULL);
+ } else {
+ ret = smu_cmn_send_smc_msg(smu,
+ SMU_MSG_ExitBaco,
+ NULL);
+ if (ret)
+ return ret;
+
+ /* clear vbios scratch 6 and 7 for coming asic reinit */
+ WREG32(adev->bios_scratch_reg_offset + 6, 0);
+ WREG32(adev->bios_scratch_reg_offset + 7, 0);
+ }
+
+ if (!ret)
+ smu_baco->state = state;
+
+ return ret;
+}
+
+int smu_v13_0_baco_enter(struct smu_context *smu)
+{
+ int ret = 0;
+
+ ret = smu_v13_0_baco_set_state(smu,
+ SMU_BACO_STATE_ENTER);
+ if (ret)
+ return ret;
+
+ msleep(10);
+
+ return ret;
+}
+
+int smu_v13_0_baco_exit(struct smu_context *smu)
+{
+ return smu_v13_0_baco_set_state(smu,
+ SMU_BACO_STATE_EXIT);
+}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 71312ed26fb9..44da7e06a012 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -95,6 +95,7 @@ static struct cmn2asic_msg_mapping smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =
MSG_MAP(UseDefaultPPTable, PPSMC_MSG_UseDefaultPPTable, 0),
MSG_MAP(RunDcBtc, PPSMC_MSG_RunDcBtc, 0),
MSG_MAP(EnterBaco, PPSMC_MSG_EnterBaco, 0),
+ MSG_MAP(ExitBaco, PPSMC_MSG_ExitBaco, 0),
MSG_MAP(SetSoftMinByFreq, PPSMC_MSG_SetSoftMinByFreq, 1),
MSG_MAP(SetSoftMaxByFreq, PPSMC_MSG_SetSoftMaxByFreq, 1),
MSG_MAP(SetHardMinByFreq, PPSMC_MSG_SetHardMinByFreq, 1),
@@ -150,6 +151,7 @@ static struct cmn2asic_mapping smu_v13_0_0_feature_mask_map[SMU_FEATURE_COUNT] =
[SMU_FEATURE_DS_MP0CLK_BIT] = {1, FEATURE_SOC_MPCLK_DS_BIT},
[SMU_FEATURE_DS_MP1CLK_BIT] = {1, FEATURE_BACO_MPCLK_DS_BIT},
[SMU_FEATURE_GFX_ULV_BIT] = {1, FEATURE_GFX_ULV_BIT},
+ [SMU_FEATURE_BACO_BIT] = {1, FEATURE_BACO_BIT},
};
static struct cmn2asic_mapping smu_v13_0_0_table_map[SMU_TABLE_COUNT] = {
@@ -1595,6 +1597,11 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
.set_tool_table_location = smu_v13_0_set_tool_table_location,
.deep_sleep_control = smu_v13_0_deep_sleep_control,
.gfx_ulv_control = smu_v13_0_gfx_ulv_control,
+ .baco_is_support = smu_v13_0_baco_is_support,
+ .baco_get_state = smu_v13_0_baco_get_state,
+ .baco_set_state = smu_v13_0_baco_set_state,
+ .baco_enter = smu_v13_0_baco_enter,
+ .baco_exit = smu_v13_0_baco_exit,
};
void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu)
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amd/pm: enable UCLK DPM for SMU 13.0.0
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable BACO support " Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: correct the check for current link status Alex Deucher
` (10 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Likun Gao, Evan Quan
From: Evan Quan <evan.quan@amd.com>
Enable SMU 13.0.0 UCLK DPM.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 44da7e06a012..e3d3cf4d5c54 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -236,13 +236,13 @@ smu_v13_0_0_get_allowed_feature_mask(struct smu_context *smu,
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DF_CSTATE_BIT);
-#if 0
if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) {
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT);
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VMEMP_SCALING_BIT);
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VDDIO_MEM_SCALING_BIT);
}
+#if 0
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MEM_TEMP_READ_BIT);
#endif
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amd/pm: correct the check for current link status
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable BACO support " Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable UCLK DPM " Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: correct the way for retrieving current uclk frequency Alex Deucher
` (9 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Likun Gao, Evan Quan
From: Evan Quan <evan.quan@amd.com>
The output from metrics table for current link status changed.
We need to update our driver accordingly.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index e3d3cf4d5c54..3fd0ab90b566 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -886,6 +886,7 @@ static int smu_v13_0_0_print_clk_levels(struct smu_context *smu,
struct smu_13_0_dpm_context *dpm_context = smu_dpm->dpm_context;
struct smu_13_0_dpm_table *single_dpm_table;
struct smu_13_0_pcie_table *pcie_table;
+ const int link_width[] = {0, 1, 2, 4, 8, 12, 16};
uint32_t gen_speed, lane_width;
int i, curr_freq, size = 0;
int ret = 0;
@@ -999,8 +1000,8 @@ static int smu_v13_0_0_print_clk_levels(struct smu_context *smu,
(pcie_table->pcie_lane[i] == 5) ? "x12" :
(pcie_table->pcie_lane[i] == 6) ? "x16" : "",
pcie_table->clk_freq[i],
- (gen_speed == pcie_table->pcie_gen[i]) &&
- (lane_width == pcie_table->pcie_lane[i]) ?
+ ((gen_speed - 1) == pcie_table->pcie_gen[i]) &&
+ (lane_width == link_width[pcie_table->pcie_lane[i]]) ?
"*" : "");
break;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amd/pm: correct the way for retrieving current uclk frequency
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
` (2 preceding siblings ...)
2022-05-05 20:07 ` [PATCH] drm/amd/pm: correct the check for current link status Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: correct the way for retrieving current fclk frequency Alex Deucher
` (8 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Likun Gao, Evan Quan
From: Evan Quan <evan.quan@amd.com>
There is some problem with average frequency reading for now. So,
we switch to the target frequency reading.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 3fd0ab90b566..f01227e5e96e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -849,7 +849,7 @@ static int smu_v13_0_0_get_current_clk_freq_by_table(struct smu_context *smu,
member_type = METRICS_AVERAGE_GFXCLK;
break;
case PPCLK_UCLK:
- member_type = METRICS_AVERAGE_UCLK;
+ member_type = METRICS_CURR_UCLK;
break;
case PPCLK_FCLK:
member_type = METRICS_AVERAGE_FCLK;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amd/pm: correct the way for retrieving current fclk frequency
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
` (3 preceding siblings ...)
2022-05-05 20:07 ` [PATCH] drm/amd/pm: correct the way for retrieving current uclk frequency Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable FCLK DPM support for SMU 13.0.0 Alex Deucher
` (7 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Likun Gao, Evan Quan
From: Evan Quan <evan.quan@amd.com>
Instead of using AverageFclkFrequencyPostDs/AverageFclkFrequencyPreDs,
we turn to target clock frequency(CurrClock[PPCLK_FCLK]).
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index f01227e5e96e..6a4fbcb5c4aa 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -852,7 +852,7 @@ static int smu_v13_0_0_get_current_clk_freq_by_table(struct smu_context *smu,
member_type = METRICS_CURR_UCLK;
break;
case PPCLK_FCLK:
- member_type = METRICS_AVERAGE_FCLK;
+ member_type = METRICS_CURR_FCLK;
break;
case PPCLK_SOCCLK:
member_type = METRICS_CURR_SOCCLK;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amd/pm: enable FCLK DPM support for SMU 13.0.0
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
` (4 preceding siblings ...)
2022-05-05 20:07 ` [PATCH] drm/amd/pm: correct the way for retrieving current fclk frequency Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: disable the gfxoff feature temporarily " Alex Deucher
` (6 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Likun Gao, Evan Quan
From: Evan Quan <evan.quan@amd.com>
With PMFW 78.35.0, the FCLK DPM is ready to go on SMU 13.0.0.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 6a4fbcb5c4aa..80455fed7a4b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -252,9 +252,7 @@ smu_v13_0_0_get_allowed_feature_mask(struct smu_context *smu,
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_SOC_MPCLK_DS_BIT);
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_BACO_MPCLK_DS_BIT);
-#if 0
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_FCLK_BIT);
-#endif
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_DCN_BIT);
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DS_DCFCLK_BIT);
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amd/pm: disable the gfxoff feature temporarily for SMU 13.0.0
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
` (5 preceding siblings ...)
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable FCLK DPM support for SMU 13.0.0 Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: disable ac/dc on smu_v13_0_7 Alex Deucher
` (5 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Likun Gao, Evan Quan
From: Evan Quan <evan.quan@amd.com>
There is a known "sdma busy" issue with gfxoff enabled. Let's disable
the gfxoff feature temporarily until that issue is fixed.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 80455fed7a4b..86f98e968341 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -228,8 +228,10 @@ smu_v13_0_0_get_allowed_feature_mask(struct smu_context *smu,
if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT);
+#if 0
if (adev->pm.pp_feature & PP_GFXOFF_MASK)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFXOFF_BIT);
+#endif
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_THROTTLERS_BIT);
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_FAN_CONTROL_BIT);
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amd/pm: disable ac/dc on smu_v13_0_7
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
` (6 preceding siblings ...)
2022-05-05 20:07 ` [PATCH] drm/amd/pm: disable the gfxoff feature temporarily " Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable gfxoff control " Alex Deucher
` (4 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Kenneth Feng, Hawking Zhang
From: Kenneth Feng <kenneth.feng@amd.com>
temporarily disable ac/dc on smu_v13_0_7 due to the force clock issue.
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index 8e576054bee5..92e606a72a85 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -226,7 +226,6 @@ smu_v13_0_7_get_allowed_feature_mask(struct smu_context *smu,
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DS_FCLK_BIT);
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DF_CSTATE_BIT);
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_THROTTLERS_BIT);
- *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ACDC_BIT);
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VR0HOT_BIT);
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_FW_CTF_BIT);
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_FAN_CONTROL_BIT);
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amd/pm: enable gfxoff control on smu_v13_0_7
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
` (7 preceding siblings ...)
2022-05-05 20:07 ` [PATCH] drm/amd/pm: disable ac/dc on smu_v13_0_7 Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amdgpu: Disable SDMA WPTR_POLL_ENABLE for sdma_v6_0 Alex Deucher
` (3 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Kenneth Feng, Hawking Zhang
From: Kenneth Feng <kenneth.feng@amd.com>
enable gfxoff control interface on smu_v13_0_7
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 1 +
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 1 +
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 3 +++
3 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 7c75fe51ec20..e9649ef835c4 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -5212,6 +5212,7 @@ static int gfx_v11_0_set_powergating_state(void *handle,
switch (adev->ip_versions[GC_HWIP][0]) {
case IP_VERSION(11, 0, 0):
+ case IP_VERSION(11, 0, 2):
amdgpu_gfx_off_ctrl(adev, enable);
break;
default:
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index d73deb3e596f..aee1741d98e9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -834,6 +834,7 @@ int smu_v13_0_gfx_off_control(struct smu_context *smu, bool enable)
case IP_VERSION(13, 0, 1):
case IP_VERSION(13, 0, 3):
case IP_VERSION(13, 0, 5):
+ case IP_VERSION(13, 0, 7):
case IP_VERSION(13, 0, 8):
if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
return 0;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index 92e606a72a85..8d687d5e2f80 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -113,6 +113,8 @@ static struct cmn2asic_msg_mapping smu_v13_0_7_message_map[SMU_MSG_MAX_COUNT] =
MSG_MAP(DramLogSetDramAddrHigh, PPSMC_MSG_DramLogSetDramAddrHigh, 0),
MSG_MAP(DramLogSetDramAddrLow, PPSMC_MSG_DramLogSetDramAddrLow, 0),
MSG_MAP(DramLogSetDramSize, PPSMC_MSG_DramLogSetDramSize, 0),
+ MSG_MAP(AllowGfxOff, PPSMC_MSG_AllowGfxOff, 0),
+ MSG_MAP(DisallowGfxOff, PPSMC_MSG_DisallowGfxOff, 0),
};
static struct cmn2asic_mapping smu_v13_0_7_clk_map[SMU_CLK_COUNT] = {
@@ -1486,6 +1488,7 @@ static const struct pptable_funcs smu_v13_0_7_ppt_funcs = {
.get_gpu_metrics = smu_v13_0_7_get_gpu_metrics,
.set_soft_freq_limited_range = smu_v13_0_set_soft_freq_limited_range,
.set_performance_level = smu_v13_0_set_performance_level,
+ .gfx_off_control = smu_v13_0_gfx_off_control,
.get_fan_speed_pwm = smu_v13_0_7_get_fan_speed_pwm,
.get_fan_speed_rpm = smu_v13_0_7_get_fan_speed_rpm,
.set_fan_speed_pwm = smu_v13_0_set_fan_speed_pwm,
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amdgpu: Disable SDMA WPTR_POLL_ENABLE for sdma_v6_0
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
` (8 preceding siblings ...)
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable gfxoff control " Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amdkfd: Update event_interrupt_isr_v11 return Alex Deucher
` (2 subsequent siblings)
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Graham Sider, Hawking Zhang
From: Graham Sider <Graham.Sider@amd.com>
WPTR_POLL_ENABLE = 1 was kept to support legacy doorbell programming in
SimNow environment. Disable for real hardware.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
index 6cc6a81a7d73..8cfaed55b192 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
@@ -558,7 +558,7 @@ static int sdma_v6_0_gfx_resume(struct amdgpu_device *adev)
lower_32_bits(ring->rptr_gpu_addr) & 0xFFFFFFFC);
rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RPTR_WRITEBACK_ENABLE, 1);
- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, WPTR_POLL_ENABLE, 1);
+ rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, WPTR_POLL_ENABLE, 0);
rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, F32_WPTR_POLL_ENABLE, 1);
WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE), ring->gpu_addr >> 8);
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amdkfd: Update event_interrupt_isr_v11 return
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
` (9 preceding siblings ...)
2022-05-05 20:07 ` [PATCH] drm/amdgpu: Disable SDMA WPTR_POLL_ENABLE for sdma_v6_0 Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amdgpu: Implement get_vmid_pasid_mapping for gfx11 Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amdgpu/gmc11: avoid cpu accessing registers to flush VM Alex Deucher
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Mukul Joshi, Graham Sider
From: Graham Sider <Graham.Sider@amd.com>
Add amdgpu_no_queue_eviction_on_vm_fault condition to
event_interrupt_isr_v11 return. If no queue eviction on vm fault
specified, function should return false for client/source ids specifying
vm fault.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c
index c3919aaa76e6..2bb8041565f0 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c
@@ -267,10 +267,11 @@ static bool event_interrupt_isr_v11(struct kfd_dev *dev,
source_id == SOC15_INTSRC_SQ_INTERRUPT_MSG ||
source_id == SOC15_INTSRC_CP_BAD_OPCODE ||
source_id == SOC21_INTSRC_SDMA_TRAP ||
- client_id == SOC21_IH_CLIENTID_VMC ||
- ((client_id == SOC21_IH_CLIENTID_GFX) &&
- (source_id == UTCL2_1_0__SRCID__FAULT)) /*||
- KFD_IRQ_IS_FENCE(client_id, source_id)*/;
+ /* KFD_IRQ_IS_FENCE(client_id, source_id) || */
+ (((client_id == SOC21_IH_CLIENTID_VMC) ||
+ ((client_id == SOC21_IH_CLIENTID_GFX) &&
+ (source_id == UTCL2_1_0__SRCID__FAULT))) &&
+ !amdgpu_no_queue_eviction_on_vm_fault);
}
static void event_interrupt_wq_v11(struct kfd_dev *dev,
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amdgpu: Implement get_vmid_pasid_mapping for gfx11
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
` (10 preceding siblings ...)
2022-05-05 20:07 ` [PATCH] drm/amdkfd: Update event_interrupt_isr_v11 return Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amdgpu/gmc11: avoid cpu accessing registers to flush VM Alex Deucher
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Felix Kuehling, Graham Sider
From: Graham Sider <Graham.Sider@amd.com>
Implement gmc_v11_0_get_vmid_pasid_mapping_info to fix
gmc_v11_0_flush_gpu_tlb_pasid logic. Change from gfx10 to use
IH_VMID_*_LUT registers for VMID -> PASID mapping.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 16 ++++------------
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 8d733eeac556..477f67d9b07c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -155,21 +155,13 @@ static bool gmc_v11_0_use_invalidate_semaphore(struct amdgpu_device *adev,
(!amdgpu_sriov_vf(adev)));
}
-static bool gmc_v11_0_get_atc_vmid_pasid_mapping_info(
+static bool gmc_v11_0_get_vmid_pasid_mapping_info(
struct amdgpu_device *adev,
uint8_t vmid, uint16_t *p_pasid)
{
-#if 0 // TODO:
- uint32_t value;
+ *p_pasid = RREG32(SOC15_REG_OFFSET(OSSSYS, 0, regIH_VMID_0_LUT) + vmid) & 0xffff;
- value = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING)
- + vmid);
- *p_pasid = value & ATC_VMID0_PASID_MAPPING__PASID_MASK;
-
- return !!(value & ATC_VMID0_PASID_MAPPING__VALID_MASK);
-#else
- return 0;
-#endif
+ return !!(*p_pasid);
}
/*
@@ -340,7 +332,7 @@ static int gmc_v11_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
for (vmid = 1; vmid < 16; vmid++) {
- ret = gmc_v11_0_get_atc_vmid_pasid_mapping_info(adev, vmid,
+ ret = gmc_v11_0_get_vmid_pasid_mapping_info(adev, vmid,
&queried_pasid);
if (ret && queried_pasid == pasid) {
if (all_hub) {
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH] drm/amdgpu/gmc11: avoid cpu accessing registers to flush VM
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
` (11 preceding siblings ...)
2022-05-05 20:07 ` [PATCH] drm/amdgpu: Implement get_vmid_pasid_mapping for gfx11 Alex Deucher
@ 2022-05-05 20:07 ` Alex Deucher
12 siblings, 0 replies; 14+ messages in thread
From: Alex Deucher @ 2022-05-05 20:07 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Jack Xiao, Hawking Zhang
From: Jack Xiao <Jack.Xiao@amd.com>
Due to gfxoff on, cpu accessing registers is not expected.
v2: remove bug-on, fix the vmhub check
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 49 +++++++++++++++++++++++++-
1 file changed, 48 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 477f67d9b07c..63f3fc0a1e7f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -258,6 +258,12 @@ static void gmc_v11_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid,
static void gmc_v11_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
uint32_t vmhub, uint32_t flush_type)
{
+ struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
+ struct dma_fence *fence;
+ struct amdgpu_job *job;
+
+ int r;
+
if ((vmhub == AMDGPU_GFXHUB_0) && !adev->gfx.is_poweron)
return;
@@ -281,8 +287,49 @@ static void gmc_v11_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
}
mutex_lock(&adev->mman.gtt_window_lock);
- gmc_v11_0_flush_vm_hub(adev, vmid, vmhub, 0);
+
+ if (vmhub != AMDGPU_GFXHUB_0) {
+ gmc_v11_0_flush_vm_hub(adev, vmid, vmhub, 0);
+ mutex_unlock(&adev->mman.gtt_window_lock);
+ return;
+ }
+
+ if (!adev->mman.buffer_funcs_enabled ||
+ !adev->ib_pool_ready ||
+ amdgpu_in_reset(adev) ||
+ ring->sched.ready == false) {
+ gmc_v11_0_flush_vm_hub(adev, vmid, AMDGPU_GFXHUB_0, 0);
+ mutex_unlock(&adev->mman.gtt_window_lock);
+ return;
+ }
+
+ r = amdgpu_job_alloc_with_ib(adev, 16 * 4, AMDGPU_IB_POOL_IMMEDIATE,
+ &job);
+ if (r)
+ goto error_alloc;
+
+ job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo);
+ job->vm_needs_flush = true;
+ job->ibs->ptr[job->ibs->length_dw++] = ring->funcs->nop;
+ amdgpu_ring_pad_ib(ring, &job->ibs[0]);
+ r = amdgpu_job_submit(job, &adev->mman.entity,
+ AMDGPU_FENCE_OWNER_UNDEFINED, &fence);
+ if (r)
+ goto error_submit;
+
+ mutex_unlock(&adev->mman.gtt_window_lock);
+
+ dma_fence_wait(fence, false);
+ dma_fence_put(fence);
+
+ return;
+
+error_submit:
+ amdgpu_job_free(job);
+
+error_alloc:
mutex_unlock(&adev->mman.gtt_window_lock);
+ DRM_ERROR("Error flushing GPU TLB using the SDMA (%d)!\n", r);
return;
}
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
end of thread, other threads:[~2022-05-05 20:08 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-05 20:07 [PATCH] drm/amd/pm: enable lclk dpm/ds and BACO features for SMU 13.0.0 Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable BACO support " Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable UCLK DPM " Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: correct the check for current link status Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: correct the way for retrieving current uclk frequency Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: correct the way for retrieving current fclk frequency Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable FCLK DPM support for SMU 13.0.0 Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: disable the gfxoff feature temporarily " Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: disable ac/dc on smu_v13_0_7 Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amd/pm: enable gfxoff control " Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amdgpu: Disable SDMA WPTR_POLL_ENABLE for sdma_v6_0 Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amdkfd: Update event_interrupt_isr_v11 return Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amdgpu: Implement get_vmid_pasid_mapping for gfx11 Alex Deucher
2022-05-05 20:07 ` [PATCH] drm/amdgpu/gmc11: avoid cpu accessing registers to flush VM Alex Deucher
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