* [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting
@ 2022-07-26 7:25 Jiapeng Chong
2022-07-26 7:25 ` [PATCH 02/20] " Jiapeng Chong
` (19 more replies)
0 siblings, 20 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_hwseq.c:910 dcn32_init_hw() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
index b6bada383958..201516a62b4b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
@@ -907,10 +907,10 @@ void dcn32_init_hw(struct dc *dc)
dc->res_pool->hubbub->funcs->init_crb(dc->res_pool->hubbub);
// Get DMCUB capabilities
- if (dc->ctx->dmub_srv) {
- dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv->dmub);
- dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr;
- }
+ if (dc->ctx->dmub_srv) {
+ dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv->dmub);
+ dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr;
+ }
}
static int calc_mpc_flow_ctrl_cnt(const struct dc_stream_state *stream,
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 02/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 03/20] " Jiapeng Chong
` (18 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_mpc.c:306 mpc32_get_shaper_current() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c | 36 +++++++++----------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c
index 94141f5e6994..357bd2461bc9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c
@@ -300,24 +300,24 @@ static enum dc_lut_mode mpc32_get_shaper_current(struct mpc *mpc, uint32_t mpcc_
uint32_t state_mode;
struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);
- REG_GET(MPCC_MCM_SHAPER_CONTROL[mpcc_id],
- MPCC_MCM_SHAPER_MODE_CURRENT, &state_mode);
-
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ REG_GET(MPCC_MCM_SHAPER_CONTROL[mpcc_id], MPCC_MCM_SHAPER_MODE_CURRENT, &state_mode);
+
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 03/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
2022-07-26 7:25 ` [PATCH 02/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 04/20] " Jiapeng Chong
` (17 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c:716 dcn314_clk_mgr_construct() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
index df6dd8465272..ee99974b3b62 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
@@ -713,7 +713,8 @@ void dcn314_clk_mgr_construct(
dcn314_bw_params.wm_table = ddr5_wm_table;
/* Saved clocks configured at boot for debug purposes */
- dcn314_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, &clk_mgr->base.base, &log_info);
+ dcn314_dump_clk_registers(&clk_mgr->base.base.boot_snapshot,
+ &clk_mgr->base.base, &log_info);
}
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 04/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
2022-07-26 7:25 ` [PATCH 02/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 03/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 05/20] " Jiapeng Chong
` (16 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c:107 dcn201_update_clocks() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
index 451e8d6cd8bd..f0577dcd1af6 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
@@ -101,8 +101,8 @@ static void dcn201_update_clocks(struct clk_mgr *clk_mgr_base,
return;
if (clk_mgr_base->clks.dispclk_khz == 0 ||
- dc->debug.force_clock_mode & 0x1) {
- force_reset = true;
+ dc->debug.force_clock_mode & 0x1) {
+ force_reset = true;
dcn2_read_clocks_from_hw_dentist(clk_mgr_base);
}
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 05/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (2 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 04/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 06/20] " Jiapeng Chong
` (15 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c:683 dcn316_clk_mgr_construct() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c
index e4bb9c6193b5..0cd3d2eb7ac7 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c
@@ -680,7 +680,8 @@ void dcn316_clk_mgr_construct(
dcn316_bw_params.wm_table = ddr4_wm_table;
}
/* Saved clocks configured at boot for debug purposes */
- dcn316_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, &clk_mgr->base.base, &log_info);
+ dcn316_dump_clk_registers(&clk_mgr->base.base.boot_snapshot,
+ &clk_mgr->base.base, &log_info);
}
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 06/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (3 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 05/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 07/20] " Jiapeng Chong
` (14 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c:655 dcn315_clk_mgr_construct() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
index 36b0cd47c1c7..cc076621f5e6 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
@@ -652,7 +652,8 @@ void dcn315_clk_mgr_construct(
dcn315_bw_params.wm_table = ddr5_wm_table;
}
/* Saved clocks configured at boot for debug purposes */
- dcn315_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, &clk_mgr->base.base, &log_info);
+ dcn315_dump_clk_registers(&clk_mgr->base.base.boot_snapshot,
+ &clk_mgr->base.base, &log_info);
}
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 07/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (4 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 06/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 08/20] " Jiapeng Chong
` (13 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c:726 dcn31_clk_mgr_construct() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
index bca5f01da763..c09be3f15fe6 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
@@ -723,7 +723,8 @@ void dcn31_clk_mgr_construct(
dcn31_bw_params.wm_table = ddr5_wm_table;
}
/* Saved clocks configured at boot for debug purposes */
- dcn31_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, &clk_mgr->base.base, &log_info);
+ dcn31_dump_clk_registers(&clk_mgr->base.base.boot_snapshot,
+ &clk_mgr->base.base, &log_info);
}
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 08/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (5 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 07/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 09/20] " Jiapeng Chong
` (12 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp_cm.c:67 dpp30_get_gamcor_current() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../drm/amd/display/dc/dcn30/dcn30_dpp_cm.c | 25 ++++++++-----------
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c
index 87dbeca18984..e43f77c11c00 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c
@@ -61,23 +61,20 @@ static enum dc_lut_mode dpp30_get_gamcor_current(struct dpp *dpp_base)
uint32_t lut_mode;
struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);
- REG_GET(CM_GAMCOR_CONTROL,
- CM_GAMCOR_MODE_CURRENT, &state_mode);
+ REG_GET(CM_GAMCOR_CONTROL, CM_GAMCOR_MODE_CURRENT, &state_mode);
- if (state_mode == 0)
- mode = LUT_BYPASS;
+ if (state_mode == 0)
+ mode = LUT_BYPASS;
- if (state_mode == 2) {//Programmable RAM LUT
- REG_GET(CM_GAMCOR_CONTROL,
- CM_GAMCOR_SELECT_CURRENT, &lut_mode);
-
- if (lut_mode == 0)
- mode = LUT_RAM_A;
- else
- mode = LUT_RAM_B;
- }
+ if (state_mode == 2) {//Programmable RAM LUT
+ REG_GET(CM_GAMCOR_CONTROL, CM_GAMCOR_SELECT_CURRENT, &lut_mode);
+ if (lut_mode == 0)
+ mode = LUT_RAM_A;
+ else
+ mode = LUT_RAM_B;
+ }
- return mode;
+ return mode;
}
static void dpp3_program_gammcor_lut(
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 09/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (6 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 08/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 10/20] " Jiapeng Chong
` (11 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:724 dpp3_get_blndgam_current() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:823 dpp3_get_shaper_current() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c | 77 +++++++++----------
1 file changed, 38 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
index 787b852eeaf2..77b00f86c216 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
@@ -716,28 +716,27 @@ static enum dc_lut_mode dpp3_get_blndgam_current(struct dpp *dpp_base)
struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);
- REG_GET(CM_BLNDGAM_CONTROL,
- CM_BLNDGAM_MODE_CURRENT, &mode_current);
- REG_GET(CM_BLNDGAM_CONTROL,
- CM_BLNDGAM_SELECT_CURRENT, &in_use);
-
- switch (mode_current) {
- case 0:
- case 1:
- mode = LUT_BYPASS;
- break;
-
- case 2:
- if (in_use == 0)
- mode = LUT_RAM_A;
- else
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ REG_GET(CM_BLNDGAM_CONTROL, CM_BLNDGAM_MODE_CURRENT, &mode_current);
+ REG_GET(CM_BLNDGAM_CONTROL, CM_BLNDGAM_SELECT_CURRENT, &in_use);
+
+ switch (mode_current) {
+ case 0:
+ case 1:
+ mode = LUT_BYPASS;
+ break;
+
+ case 2:
+ if (in_use == 0)
+ mode = LUT_RAM_A;
+ else
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
static bool dpp3_program_blnd_lut(struct dpp *dpp_base,
@@ -817,24 +816,24 @@ static enum dc_lut_mode dpp3_get_shaper_current(struct dpp *dpp_base)
uint32_t state_mode;
struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);
- REG_GET(CM_SHAPER_CONTROL,
- CM_SHAPER_MODE_CURRENT, &state_mode);
+ REG_GET(CM_SHAPER_CONTROL, CM_SHAPER_MODE_CURRENT, &state_mode);
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
static void dpp3_configure_shaper_lut(
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 10/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (7 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 09/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 11/20] " Jiapeng Chong
` (10 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:116 mpc3_get_ogam_current() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:445 mpc3_get_shaper_current() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c | 70 +++++++++----------
1 file changed, 35 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
index 1981a71b961b..ad1c1b703874 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
@@ -109,32 +109,32 @@ enum dc_lut_mode mpc3_get_ogam_current(struct mpc *mpc, int mpcc_id)
uint32_t state_ram_lut_in_use;
struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);
- REG_GET_2(MPCC_OGAM_CONTROL[mpcc_id],
- MPCC_OGAM_MODE_CURRENT, &state_mode,
- MPCC_OGAM_SELECT_CURRENT, &state_ram_lut_in_use);
+ REG_GET_2(MPCC_OGAM_CONTROL[mpcc_id], MPCC_OGAM_MODE_CURRENT, &state_mode,
+ MPCC_OGAM_SELECT_CURRENT, &state_ram_lut_in_use);
- switch (state_mode) {
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 2:
+ switch (state_ram_lut_in_use) {
case 0:
- mode = LUT_BYPASS;
+ mode = LUT_RAM_A;
break;
- case 2:
- switch (state_ram_lut_in_use) {
- case 0:
- mode = LUT_RAM_A;
- break;
- case 1:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
+ case 1:
+ mode = LUT_RAM_B;
break;
default:
mode = LUT_BYPASS;
break;
}
- return mode;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
void mpc3_power_on_ogam_lut(
@@ -439,24 +439,24 @@ static enum dc_lut_mode mpc3_get_shaper_current(struct mpc *mpc, uint32_t rmu_id
uint32_t state_mode;
struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);
- REG_GET(SHAPER_CONTROL[rmu_idx],
- MPC_RMU_SHAPER_LUT_MODE_CURRENT, &state_mode);
+ REG_GET(SHAPER_CONTROL[rmu_idx], MPC_RMU_SHAPER_LUT_MODE_CURRENT, &state_mode);
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
static void mpc3_configure_shaper_lut(
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 11/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (8 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 10/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 12/20] " Jiapeng Chong
` (9 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_optc.c:186 optc3_set_dsc_config() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
index 80136b5d7e48..d072997477dd 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
@@ -180,11 +180,8 @@ void optc3_set_dsc_config(struct timing_generator *optc,
{
struct optc *optc1 = DCN10TG_FROM_TG(optc);
- optc2_set_dsc_config(optc, dsc_mode, dsc_bytes_per_pixel,
- dsc_slice_width);
-
- REG_UPDATE(OTG_V_SYNC_A_CNTL, OTG_V_SYNC_MODE, 0);
-
+ optc2_set_dsc_config(optc, dsc_mode, dsc_bytes_per_pixel, dsc_slice_width);
+ REG_UPDATE(OTG_V_SYNC_A_CNTL, OTG_V_SYNC_MODE, 0);
}
void optc3_set_vrr_m_const(struct timing_generator *optc,
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 12/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (9 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 11/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 13/20] " Jiapeng Chong
` (8 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dwb.c:104 dwb2_enable() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
index 8d3884b306dd..f1490e97b6ce 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
@@ -101,8 +101,8 @@ static bool dwb2_enable(struct dwbc *dwbc, struct dc_dwb_params *params)
struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
/* Only chroma scaling (sub-sampling) is supported in DCN2 */
-if ((params->cnv_params.src_width != params->dest_width) ||
- (params->cnv_params.src_height != params->dest_height)) {
+ if ((params->cnv_params.src_width != params->dest_width) ||
+ (params->cnv_params.src_height != params->dest_height)) {
DC_LOG_DWB("%s inst = %d, FAILED!LUMA SCALING NOT SUPPORTED", __func__, dwbc20->base.inst);
return false;
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 13/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (10 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 12/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 14/20] " Jiapeng Chong
` (7 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.c:305 mpc20_get_ogam_current() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c | 36 +++++++++----------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
index 15734db0cdea..3d307dd58e9a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
@@ -299,24 +299,24 @@ static enum dc_lut_mode mpc20_get_ogam_current(struct mpc *mpc, int mpcc_id)
uint32_t state_mode;
struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc);
- REG_GET(MPCC_OGAM_LUT_RAM_CONTROL[mpcc_id],
- MPCC_OGAM_CONFIG_STATUS, &state_mode);
-
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ REG_GET(MPCC_OGAM_LUT_RAM_CONTROL[mpcc_id], MPCC_OGAM_CONFIG_STATUS, &state_mode);
+
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
static void mpc2_program_lutb(struct mpc *mpc, int mpcc_id,
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 14/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (11 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 13/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 15/20] " Jiapeng Chong
` (6 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.c:450 dpp20_get_blndgam_current() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.c:543 dpp20_get_shaper_current() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../drm/amd/display/dc/dcn20/dcn20_dpp_cm.c | 68 +++++++++----------
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
index 2feb051a2002..598caa508d43 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
@@ -444,24 +444,24 @@ static enum dc_lut_mode dpp20_get_blndgam_current(struct dpp *dpp_base)
uint32_t state_mode;
struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
- REG_GET(CM_BLNDGAM_LUT_WRITE_EN_MASK,
- CM_BLNDGAM_CONFIG_STATUS, &state_mode);
+ REG_GET(CM_BLNDGAM_LUT_WRITE_EN_MASK, CM_BLNDGAM_CONFIG_STATUS, &state_mode);
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
bool dpp20_program_blnd_lut(
@@ -537,24 +537,24 @@ static enum dc_lut_mode dpp20_get_shaper_current(struct dpp *dpp_base)
uint32_t state_mode;
struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
- REG_GET(CM_SHAPER_LUT_WRITE_EN_MASK,
- CM_SHAPER_CONFIG_STATUS, &state_mode);
+ REG_GET(CM_SHAPER_LUT_WRITE_EN_MASK, CM_SHAPER_CONFIG_STATUS, &state_mode);
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
static void dpp20_configure_shaper_lut(
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 15/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (12 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 14/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 16/20] " Jiapeng Chong
` (5 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:1728 dcn20_program_front_end_for_ctx() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 16 +++++++---------
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 3b26962637d0..68690e2118cb 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1715,15 +1715,13 @@ void dcn20_program_front_end_for_ctx(
DC_LOGGER_INIT(dc->ctx->logger);
/* Carry over GSL groups in case the context is changing. */
- for (i = 0; i < dc->res_pool->pipe_count; i++) {
- struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
- struct pipe_ctx *old_pipe_ctx =
- &dc->current_state->res_ctx.pipe_ctx[i];
-
- if (pipe_ctx->stream == old_pipe_ctx->stream)
- pipe_ctx->stream_res.gsl_group =
- old_pipe_ctx->stream_res.gsl_group;
- }
+ for (i = 0; i < dc->res_pool->pipe_count; i++) {
+ struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
+ struct pipe_ctx *old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
+
+ if (pipe_ctx->stream == old_pipe_ctx->stream)
+ pipe_ctx->stream_res.gsl_group = old_pipe_ctx->stream_res.gsl_group;
+ }
if (dc->hwss.program_triplebuffer != NULL && dc->debug.enable_tri_buf) {
for (i = 0; i < dc->res_pool->pipe_count; i++) {
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 16/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (13 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 15/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 17/20] " Jiapeng Chong
` (4 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:51 dml32_rq_dlg_get_rq_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:68 dml32_rq_dlg_get_rq_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:220 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:224 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:235 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:240 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../dc/dml/dcn32/display_rq_dlg_calc_32.c | 81 +++++++++----------
1 file changed, 40 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c
index 269bdfc4bc40..a1276f6b9581 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c
@@ -48,9 +48,9 @@ void dml32_rq_dlg_get_rq_reg(display_rq_regs_st *rq_regs,
{
const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;
bool dual_plane = is_dual_plane((enum source_format_class) (src->source_format));
- double stored_swath_l_bytes;
- double stored_swath_c_bytes;
- bool is_phantom_pipe;
+ double stored_swath_l_bytes;
+ double stored_swath_c_bytes;
+ bool is_phantom_pipe;
uint32_t pixel_chunk_bytes = 0;
uint32_t min_pixel_chunk_bytes = 0;
uint32_t meta_chunk_bytes = 0;
@@ -65,9 +65,9 @@ void dml32_rq_dlg_get_rq_reg(display_rq_regs_st *rq_regs,
uint32_t p1_dpte_group_bytes = 0;
uint32_t p1_mpte_group_bytes = 0;
- unsigned int detile_buf_size_in_bytes;
- unsigned int detile_buf_plane1_addr;
- unsigned int pte_row_height_linear;
+ unsigned int detile_buf_size_in_bytes;
+ unsigned int detile_buf_plane1_addr;
+ unsigned int pte_row_height_linear;
memset(rq_regs, 0, sizeof(*rq_regs));
@@ -217,52 +217,51 @@ void dml32_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
double refcyc_per_req_delivery_cur0 = 0.;
double refcyc_per_req_delivery_pre_c = 0.;
double refcyc_per_req_delivery_c = 0.;
- double refcyc_per_req_delivery_pre_l;
- double refcyc_per_req_delivery_l;
+ double refcyc_per_req_delivery_pre_l;
+ double refcyc_per_req_delivery_l;
double refcyc_per_line_delivery_pre_c = 0.;
double refcyc_per_line_delivery_c = 0.;
- double refcyc_per_line_delivery_pre_l;
- double refcyc_per_line_delivery_l;
- double min_ttu_vblank;
- double vratio_pre_l;
- double vratio_pre_c;
- unsigned int min_dst_y_next_start;
+ double refcyc_per_line_delivery_pre_l;
+ double refcyc_per_line_delivery_l;
+ double min_ttu_vblank;
+ double vratio_pre_l;
+ double vratio_pre_c;
+ unsigned int min_dst_y_next_start;
unsigned int htotal = dst->htotal;
unsigned int hblank_end = dst->hblank_end;
unsigned int vblank_end = dst->vblank_end;
bool interlaced = dst->interlaced;
double pclk_freq_in_mhz = dst->pixel_rate_mhz;
- unsigned int vready_after_vcount0;
+ unsigned int vready_after_vcount0;
double refclk_freq_in_mhz = clks->refclk_mhz;
double ref_freq_to_pix_freq = refclk_freq_in_mhz / pclk_freq_in_mhz;
bool dual_plane = 0;
unsigned int pipe_index_in_combine[DC__NUM_PIPES__MAX];
- int unsigned dst_x_after_scaler;
- int unsigned dst_y_after_scaler;
- double dst_y_prefetch;
- double dst_y_per_vm_vblank;
- double dst_y_per_row_vblank;
- double dst_y_per_vm_flip;
- double dst_y_per_row_flip;
- double max_dst_y_per_vm_vblank = 32.0;
- double max_dst_y_per_row_vblank = 16.0;
-
- double dst_y_per_pte_row_nom_l;
- double dst_y_per_pte_row_nom_c;
- double dst_y_per_meta_row_nom_l;
- double dst_y_per_meta_row_nom_c;
- double refcyc_per_pte_group_nom_l;
- double refcyc_per_pte_group_nom_c;
- double refcyc_per_pte_group_vblank_l;
- double refcyc_per_pte_group_vblank_c;
- double refcyc_per_pte_group_flip_l;
- double refcyc_per_pte_group_flip_c;
- double refcyc_per_meta_chunk_nom_l;
- double refcyc_per_meta_chunk_nom_c;
- double refcyc_per_meta_chunk_vblank_l;
- double refcyc_per_meta_chunk_vblank_c;
- double refcyc_per_meta_chunk_flip_l;
- double refcyc_per_meta_chunk_flip_c;
+ unsigned int dst_x_after_scaler;
+ unsigned int dst_y_after_scaler;
+ double dst_y_prefetch;
+ double dst_y_per_vm_vblank;
+ double dst_y_per_row_vblank;
+ double dst_y_per_vm_flip;
+ double dst_y_per_row_flip;
+ double max_dst_y_per_vm_vblank = 32.0;
+ double max_dst_y_per_row_vblank = 16.0;
+ double dst_y_per_pte_row_nom_l;
+ double dst_y_per_pte_row_nom_c;
+ double dst_y_per_meta_row_nom_l;
+ double dst_y_per_meta_row_nom_c;
+ double refcyc_per_pte_group_nom_l;
+ double refcyc_per_pte_group_nom_c;
+ double refcyc_per_pte_group_vblank_l;
+ double refcyc_per_pte_group_vblank_c;
+ double refcyc_per_pte_group_flip_l;
+ double refcyc_per_pte_group_flip_c;
+ double refcyc_per_meta_chunk_nom_l;
+ double refcyc_per_meta_chunk_nom_c;
+ double refcyc_per_meta_chunk_vblank_l;
+ double refcyc_per_meta_chunk_vblank_c;
+ double refcyc_per_meta_chunk_flip_l;
+ double refcyc_per_meta_chunk_flip_c;
memset(dlg_regs, 0, sizeof(*dlg_regs));
memset(ttu_regs, 0, sizeof(*ttu_regs));
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 17/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (14 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 16/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 18/20] " Jiapeng Chong
` (3 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:713 dml32_CalculateSwathWidth() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../amd/display/dc/dml/dcn32/display_mode_vba_util_32.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
index 4b010b1b8aed..07f8f3b8626b 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
@@ -710,10 +710,10 @@ void dml32_CalculateSwathWidth(
unsigned int k, j;
enum odm_combine_mode MainSurfaceODMMode;
- unsigned int surface_width_ub_l;
- unsigned int surface_height_ub_l;
- unsigned int surface_width_ub_c;
- unsigned int surface_height_ub_c;
+ unsigned int surface_width_ub_l;
+ unsigned int surface_height_ub_l;
+ unsigned int surface_width_ub_c;
+ unsigned int surface_height_ub_c;
#ifdef __DML_VBA_DEBUG__
dml_print("DML::%s: ForceSingleDPP = %d\n", __func__, ForceSingleDPP);
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 18/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (15 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 17/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 19/20] " Jiapeng Chong
` (2 subsequent siblings)
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn303/dcn303_fpu.c:205 dcn303_fpu_update_bw_bounding_box() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn303/dcn303_fpu.c:355 dcn303_fpu_init_soc_bounding_box() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../drm/amd/display/dc/dml/dcn303/dcn303_fpu.c | 15 ++++++---------
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.c
index 8fb14baed208..3eb3a021ab7d 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.c
@@ -202,7 +202,7 @@ void dcn303_fpu_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_p
unsigned int num_dcfclk_sta_targets = 4;
unsigned int num_uclk_states;
- dc_assert_fp_enabled();
+ dc_assert_fp_enabled();
if (dc->ctx->dc_bios->vram_info.num_chans)
dcn3_03_soc.num_chans = dc->ctx->dc_bios->vram_info.num_chans;
@@ -349,14 +349,11 @@ void dcn303_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info)
dc_assert_fp_enabled();
if (bb_info.dram_clock_change_latency_100ns > 0)
- dcn3_03_soc.dram_clock_change_latency_us =
- bb_info.dram_clock_change_latency_100ns * 10;
+ dcn3_03_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10;
- if (bb_info.dram_sr_enter_exit_latency_100ns > 0)
- dcn3_03_soc.sr_enter_plus_exit_time_us =
- bb_info.dram_sr_enter_exit_latency_100ns * 10;
+ if (bb_info.dram_sr_enter_exit_latency_100ns > 0)
+ dcn3_03_soc.sr_enter_plus_exit_time_us = bb_info.dram_sr_enter_exit_latency_100ns * 10;
- if (bb_info.dram_sr_exit_latency_100ns > 0)
- dcn3_03_soc.sr_exit_time_us =
- bb_info.dram_sr_exit_latency_100ns * 10;
+ if (bb_info.dram_sr_exit_latency_100ns > 0)
+ dcn3_03_soc.sr_exit_time_us = bb_info.dram_sr_exit_latency_100ns * 10;
}
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 19/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (16 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 18/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 7:25 ` [PATCH 20/20] " Jiapeng Chong
2022-07-26 15:12 ` [PATCH 01/20] " Alex Deucher
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
Clean up some inconsistent indenting, replace sizeof(x) / sizeof((x)[0]))
with ARRAY_SIZE(x).
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:185 optc3_fpu_set_vrr_m_const() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:355 dcn30_fpu_set_mcif_arb_params() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:384 dcn30_fpu_calculate_wm_and_dlg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:390 dcn30_fpu_calculate_wm_and_dlg() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../drm/amd/display/dc/dml/dcn30/dcn30_fpu.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
index c00f759fdded..060426916998 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
@@ -181,7 +181,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_0_soc = {
void optc3_fpu_set_vrr_m_const(struct timing_generator *optc,
double vtotal_avg)
{
-struct optc *optc1 = DCN10TG_FROM_TG(optc);
+ struct optc *optc1 = DCN10TG_FROM_TG(optc);
double vtotal_min, vtotal_max;
double ratio, modulo, phase;
uint32_t vblank_start;
@@ -350,24 +350,24 @@ void dcn30_fpu_set_mcif_arb_params(struct mcif_arb_params *wb_arb_params,
int pipe_cnt,
int cur_pipe)
{
- int i;
+ int i;
dc_assert_fp_enabled();
- for (i = 0; i < sizeof(wb_arb_params->cli_watermark)/sizeof(wb_arb_params->cli_watermark[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(wb_arb_params->cli_watermark); i++) {
wb_arb_params->cli_watermark[i] = get_wm_writeback_urgent(dml, pipes, pipe_cnt) * 1000;
wb_arb_params->pstate_watermark[i] = get_wm_writeback_dram_clock_change(dml, pipes, pipe_cnt) * 1000;
- }
+ }
- wb_arb_params->dram_speed_change_duration = dml->vba.WritebackAllowDRAMClockChangeEndPosition[cur_pipe] * pipes[0].clks_cfg.refclk_mhz; /* num_clock_cycles = us * MHz */
+ wb_arb_params->dram_speed_change_duration = dml->vba.WritebackAllowDRAMClockChangeEndPosition[cur_pipe] * pipes[0].clks_cfg.refclk_mhz; /* num_clock_cycles = us * MHz */
}
void dcn30_fpu_update_soc_for_wm_a(struct dc *dc, struct dc_state *context)
{
-dc_assert_fp_enabled();
+ dc_assert_fp_enabled();
-if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid) {
+ if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid) {
context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;
context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us;
context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us;
@@ -380,12 +380,12 @@ void dcn30_fpu_calculate_wm_and_dlg(
int pipe_cnt,
int vlevel)
{
-int maxMpcComb = context->bw_ctx.dml.vba.maxMpcComb;
+ int maxMpcComb = context->bw_ctx.dml.vba.maxMpcComb;
int i, pipe_idx;
double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][maxMpcComb];
bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clock_change_unsupported;
-dc_assert_fp_enabled();
+ dc_assert_fp_enabled();
if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk)
dcfclk = context->bw_ctx.dml.soc.min_dcfclk;
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 20/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (17 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 19/20] " Jiapeng Chong
@ 2022-07-26 7:25 ` Jiapeng Chong
2022-07-26 15:12 ` [PATCH 01/20] " Alex Deucher
19 siblings, 0 replies; 21+ messages in thread
From: Jiapeng Chong @ 2022-07-26 7:25 UTC (permalink / raw)
To: alexander.deucher
Cc: Jiapeng Chong, airlied, Xinhui.Pan, Abaci Robot, linux-kernel,
dri-devel, amd-gfx, daniel, christian.koenig
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1372 dp_dsc_clock_en_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1478 dp_dsc_clock_en_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1563 dp_dsc_slice_width_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1667 dp_dsc_slice_width_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1752 dp_dsc_slice_height_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1856 dp_dsc_slice_height_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1937 dp_dsc_bits_per_pixel_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2038 dp_dsc_bits_per_pixel_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2117 dp_dsc_pic_width_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2178 dp_dsc_pic_height_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2254 dp_dsc_chunk_size_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2330 dp_dsc_slice_bpg_offset_read() warn: inconsistent indenting.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 72 +++++++++----------
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index aa4edf182095..0e48824f55e3 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -1369,9 +1369,9 @@ static ssize_t dp_dsc_clock_en_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx) {
@@ -1475,9 +1475,9 @@ static ssize_t dp_dsc_clock_en_write(struct file *f, const char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx || !pipe_ctx->stream)
@@ -1560,9 +1560,9 @@ static ssize_t dp_dsc_slice_width_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx) {
@@ -1664,9 +1664,9 @@ static ssize_t dp_dsc_slice_width_write(struct file *f, const char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx || !pipe_ctx->stream)
@@ -1749,9 +1749,9 @@ static ssize_t dp_dsc_slice_height_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx) {
@@ -1853,9 +1853,9 @@ static ssize_t dp_dsc_slice_height_write(struct file *f, const char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx || !pipe_ctx->stream)
@@ -1934,9 +1934,9 @@ static ssize_t dp_dsc_bits_per_pixel_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx) {
@@ -2035,9 +2035,9 @@ static ssize_t dp_dsc_bits_per_pixel_write(struct file *f, const char __user *bu
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx || !pipe_ctx->stream)
@@ -2114,9 +2114,9 @@ static ssize_t dp_dsc_pic_width_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx) {
@@ -2175,9 +2175,9 @@ static ssize_t dp_dsc_pic_height_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx) {
@@ -2251,9 +2251,9 @@ static ssize_t dp_dsc_chunk_size_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx) {
@@ -2327,9 +2327,9 @@ static ssize_t dp_dsc_slice_bpg_offset_read(struct file *f, char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx) {
--
2.20.1.7.g153144c
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
` (18 preceding siblings ...)
2022-07-26 7:25 ` [PATCH 20/20] " Jiapeng Chong
@ 2022-07-26 15:12 ` Alex Deucher
19 siblings, 0 replies; 21+ messages in thread
From: Alex Deucher @ 2022-07-26 15:12 UTC (permalink / raw)
To: Jiapeng Chong
Cc: airlied, Xinhui.Pan, Abaci Robot, linux-kernel, dri-devel,
amd-gfx, alexander.deucher, christian.koenig
Applied the series. Thanks!
Alex
On Tue, Jul 26, 2022 at 3:26 AM Jiapeng Chong
<jiapeng.chong@linux.alibaba.com> wrote:
>
> No functional modification involved.
>
> smatch warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_hwseq.c:910 dcn32_init_hw() warn: inconsistent indenting.
>
> Reported-by: Abaci Robot <abaci@linux.alibaba.com>
> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
> ---
> drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> index b6bada383958..201516a62b4b 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> @@ -907,10 +907,10 @@ void dcn32_init_hw(struct dc *dc)
> dc->res_pool->hubbub->funcs->init_crb(dc->res_pool->hubbub);
>
> // Get DMCUB capabilities
> - if (dc->ctx->dmub_srv) {
> - dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv->dmub);
> - dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr;
> - }
> + if (dc->ctx->dmub_srv) {
> + dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv->dmub);
> + dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr;
> + }
> }
>
> static int calc_mpc_flow_ctrl_cnt(const struct dc_stream_state *stream,
> --
> 2.20.1.7.g153144c
>
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2022-07-26 15:13 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-07-26 7:25 [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting Jiapeng Chong
2022-07-26 7:25 ` [PATCH 02/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 03/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 04/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 05/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 06/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 07/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 08/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 09/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 10/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 11/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 12/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 13/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 14/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 15/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 16/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 17/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 18/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 19/20] " Jiapeng Chong
2022-07-26 7:25 ` [PATCH 20/20] " Jiapeng Chong
2022-07-26 15:12 ` [PATCH 01/20] " Alex Deucher
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).