[PATCH] drm/amd/display: Fixed panic during seamless boot.

[PATCH] drm/amd/display: Fixed panic during seamless boot.

[Aurabindo Pillai]

From: David Galiffi <David.Galiffi@amd.com>

[why]
get_pixel_clk_frequency_100hz is undefined in clock_source_funcs.

[how]
set function pointer: ".get_pixel_clk_frequency_100hz = get_pixel_clk_frequency_100hz"

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index 512b26b3e3fd..589c7fb71480 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -1149,7 +1149,8 @@ static uint32_t dcn3_get_pix_clk_dividers(
 static const struct clock_source_funcs dcn3_clk_src_funcs = {
 	.cs_power_down = dce110_clock_source_power_down,
 	.program_pix_clk = dcn3_program_pix_clk,
-	.get_pix_clk_dividers = dcn3_get_pix_clk_dividers
+	.get_pix_clk_dividers = dcn3_get_pix_clk_dividers,
+	.get_pixel_clk_frequency_100hz = get_pixel_clk_frequency_100hz
 };
 #endif
 /*****************************************/
-- 
2.25.1

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Re: [PATCH] drm/amd/display: Fixed panic during seamless boot.

[Lakha, Bhawanpreet]

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[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
________________________________
From: Aurabindo Pillai <aurabindo.pillai@amd.com>
Sent: October 23, 2020 1:09 PM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Lakha, Bhawanpreet <Bhawanpreet.Lakha@amd.com>; Galiffi, David <David.Galiffi@amd.com>
Subject: [PATCH] drm/amd/display: Fixed panic during seamless boot.

From: David Galiffi <David.Galiffi@amd.com>

[why]
get_pixel_clk_frequency_100hz is undefined in clock_source_funcs.

[how]
set function pointer: ".get_pixel_clk_frequency_100hz = get_pixel_clk_frequency_100hz"

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index 512b26b3e3fd..589c7fb71480 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -1149,7 +1149,8 @@ static uint32_t dcn3_get_pix_clk_dividers(
 static const struct clock_source_funcs dcn3_clk_src_funcs = {
         .cs_power_down = dce110_clock_source_power_down,
         .program_pix_clk = dcn3_program_pix_clk,
-       .get_pix_clk_dividers = dcn3_get_pix_clk_dividers
+       .get_pix_clk_dividers = dcn3_get_pix_clk_dividers,
+       .get_pixel_clk_frequency_100hz = get_pixel_clk_frequency_100hz
 };
 #endif
 /*****************************************/
--
2.25.1


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Re: [PATCH] drm/amd/display: Fixed panic during seamless boot.

[Aurabindo Pillai]

[-- Attachment #1.1.1: Type: text/plain, Size: 1893 bytes --]

> [AMD Official Use Only - Internal Distribution Only]
> 
> 
> 
> 
> 
> 
> 
> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>

Thanks for the review.
> 
> 
> 
> 
> From: Aurabindo Pillai <aurabindo.pillai@amd.com>
> 
> Sent: October 23, 2020 1:09 PM
> 
> To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
> 
> Cc: Lakha, Bhawanpreet <Bhawanpreet.Lakha@amd.com>; Galiffi, David <
> David.Galiffi@amd.com>
> 
> Subject: [PATCH] drm/amd/display: Fixed panic during seamless boot.
>  
> 
> 
> 
> From: David Galiffi <David.Galiffi@amd.com>
> 
> 
> 
> [why]
> 
> get_pixel_clk_frequency_100hz is undefined in clock_source_funcs.
> 
> 
> 
> [how]
> 
> set function pointer: ".get_pixel_clk_frequency_100hz =
> get_pixel_clk_frequency_100hz"
> 
> 
> 
> Signed-off-by: David Galiffi <David.Galiffi@amd.com>
> 
> ---
> 
>  drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 3 ++-
> 
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> 
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> 
> index 512b26b3e3fd..589c7fb71480 100644
> 
> --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> 
> +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> 
> @@ -1149,7 +1149,8 @@ static uint32_t dcn3_get_pix_clk_dividers(
> 
>  static const struct clock_source_funcs dcn3_clk_src_funcs = {
> 
>          .cs_power_down = dce110_clock_source_power_down,
> 
>          .program_pix_clk = dcn3_program_pix_clk,
> 
> -       .get_pix_clk_dividers = dcn3_get_pix_clk_dividers
> 
> +       .get_pix_clk_dividers = dcn3_get_pix_clk_dividers,
> 
> +       .get_pixel_clk_frequency_100hz =
> get_pixel_clk_frequency_100hz
> 
>  };
> 
>  #endif
> 
>  /*****************************************/
> 



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