* [PATCH] drm/amd/display: Fix Display Flicker on embedded panels
@ 2021-09-22 17:58 Praful.Swarnakar
2021-09-22 18:37 ` Harry Wentland
0 siblings, 1 reply; 2+ messages in thread
From: Praful.Swarnakar @ 2021-09-22 17:58 UTC (permalink / raw)
To: amd-gfx
Cc: Alexander.Deucher, harry.wentland, hersenxs.wu, sunpeng.li,
Praful Swarnakar
From: Praful Swarnakar <Praful.Swarnakar@amd.com>
[Why]
ASSR is dependent on Signed PSP Verstage to enable Content
Protection for eDP panels. Unsigned PSP verstage is used
during development phase causing ASSR to FAIL.
As a result, link training is performed with
DP_PANEL_MODE_DEFAULT instead of DP_PANEL_MODE_EDP for
eDP panels that causes display flicker on some panels.
[How]
- Do not change panel mode, if ASSR is disabled
- Just report and continue to perform eDP link training
with right settings further.
Signed-off-by: Praful Swarnakar <Praful.Swarnakar@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 6421c896f2a1..120c9955cafb 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2419,14 +2419,13 @@ bool perform_link_training_with_retries(
if (panel_mode == DP_PANEL_MODE_EDP) {
struct cp_psp *cp_psp = &stream->ctx->cp_psp;
- if (cp_psp && cp_psp->funcs.enable_assr) {
- if (!cp_psp->funcs.enable_assr(cp_psp->handle, link)) {
- /* since eDP implies ASSR on, change panel
- * mode to disable ASSR
- */
- panel_mode = DP_PANEL_MODE_DEFAULT;
- }
- }
+ if (cp_psp && cp_psp->funcs.enable_assr)
+ /* ASSR is bound to fail with unsigned PSP
+ * verstage used during devlopment phase.
+ * Report and continue with eDP panel mode to
+ * perform eDP link training with right settings
+ */
+ cp_psp->funcs.enable_assr(cp_psp->handle, link);
}
#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] drm/amd/display: Fix Display Flicker on embedded panels
2021-09-22 17:58 [PATCH] drm/amd/display: Fix Display Flicker on embedded panels Praful.Swarnakar
@ 2021-09-22 18:37 ` Harry Wentland
0 siblings, 0 replies; 2+ messages in thread
From: Harry Wentland @ 2021-09-22 18:37 UTC (permalink / raw)
To: Praful.Swarnakar, amd-gfx; +Cc: Alexander.Deucher, hersenxs.wu, sunpeng.li
On 2021-09-22 13:58, Praful.Swarnakar@amd.com wrote:
> From: Praful Swarnakar <Praful.Swarnakar@amd.com>
>
> [Why]
> ASSR is dependent on Signed PSP Verstage to enable Content
> Protection for eDP panels. Unsigned PSP verstage is used
> during development phase causing ASSR to FAIL.
> As a result, link training is performed with
> DP_PANEL_MODE_DEFAULT instead of DP_PANEL_MODE_EDP for
> eDP panels that causes display flicker on some panels.
>
> [How]
> - Do not change panel mode, if ASSR is disabled
> - Just report and continue to perform eDP link training
> with right settings further.
>
> Signed-off-by: Praful Swarnakar <Praful.Swarnakar@amd.com>
Good catch. ASSR for content protection purposes requires
signed PSP but there are eDP panels that require ASSR in
order to light up correctly.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Harry
> ---
> drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 15 +++++++--------
> 1 file changed, 7 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> index 6421c896f2a1..120c9955cafb 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> @@ -2419,14 +2419,13 @@ bool perform_link_training_with_retries(
> if (panel_mode == DP_PANEL_MODE_EDP) {
> struct cp_psp *cp_psp = &stream->ctx->cp_psp;
>
> - if (cp_psp && cp_psp->funcs.enable_assr) {
> - if (!cp_psp->funcs.enable_assr(cp_psp->handle, link)) {
> - /* since eDP implies ASSR on, change panel
> - * mode to disable ASSR
> - */
> - panel_mode = DP_PANEL_MODE_DEFAULT;
> - }
> - }
> + if (cp_psp && cp_psp->funcs.enable_assr)
> + /* ASSR is bound to fail with unsigned PSP
> + * verstage used during devlopment phase.
> + * Report and continue with eDP panel mode to
> + * perform eDP link training with right settings
> + */
> + cp_psp->funcs.enable_assr(cp_psp->handle, link);
> }
> #endif
>
>
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