[PATCH 1/3] drm/amdgpu: enable ras for mp0 v13_0_10 on SRIOV

[PATCH 1/3] drm/amdgpu: enable ras for mp0 v13_0_10 on SRIOV

[YiPeng Chai]

Enable ras for mp0 v13_0_10 on SRIOV.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 63dfcc98152d..94a3deb994ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -2340,6 +2340,7 @@ static bool amdgpu_ras_asic_supported(struct amdgpu_device *adev)
 	if (amdgpu_sriov_vf(adev)) {
 		switch (adev->ip_versions[MP0_HWIP][0]) {
 		case IP_VERSION(13, 0, 2):
+		case IP_VERSION(13, 0, 10):
 			return true;
 		default:
 			return false;
-- 
2.34.1

[PATCH 2/3] drm/amdgpu: reinit mes ip block during reset on SRIOV

[YiPeng Chai]

Reinit mes ip block during reset on SRIOV.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 2ffbaa1a4ce2..d74d05802566 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3147,6 +3147,7 @@ static int amdgpu_device_ip_reinit_late_sriov(struct amdgpu_device *adev)
 		AMD_IP_BLOCK_TYPE_DCE,
 		AMD_IP_BLOCK_TYPE_GFX,
 		AMD_IP_BLOCK_TYPE_SDMA,
+		AMD_IP_BLOCK_TYPE_MES,
 		AMD_IP_BLOCK_TYPE_UVD,
 		AMD_IP_BLOCK_TYPE_VCE,
 		AMD_IP_BLOCK_TYPE_VCN
-- 
2.34.1

[PATCH 3/3] drm/amdgpu: resume ras for gfx v11_0_3 during reset on SRIOV

[YiPeng Chai]

Gfx v11_0_3 supports ras on SRIOV, so need to resume ras
during reset.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index d74d05802566..14d756caf839 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -5313,8 +5313,9 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
 		if (r)
 			adev->asic_reset_res = r;
 
-		/* Aldebaran supports ras in SRIOV, so need resume ras during reset */
-		if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 2))
+		/* Aldebaran and gfx_11_0_3 support ras in SRIOV, so need resume ras during reset */
+		if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 2) ||
+		    adev->ip_versions[GC_HWIP][0] == IP_VERSION(11, 0, 3))
 			amdgpu_ras_resume(adev);
 	} else {
 		r = amdgpu_do_asic_reset(device_list_handle, reset_context);
-- 
2.34.1

RE: [PATCH 3/3] drm/amdgpu: resume ras for gfx v11_0_3 during reset on SRIOV

[Yang, Stanley]

[AMD Official Use Only - General]

The series is Reviewed-by: Stanley Yang <Stanley.Yang@amd.com>

Regards,
Stanley
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
> YiPeng Chai
> Sent: Tuesday, March 21, 2023 10:40 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhou1, Tao <Tao.Zhou1@amd.com>; Zhang, Hawking
> <Hawking.Zhang@amd.com>; Chai, Thomas <YiPeng.Chai@amd.com>; Chai,
> Thomas <YiPeng.Chai@amd.com>
> Subject: [PATCH 3/3] drm/amdgpu: resume ras for gfx v11_0_3 during reset
> on SRIOV
> 
> Gfx v11_0_3 supports ras on SRIOV, so need to resume ras during reset.
> 
> Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index d74d05802566..14d756caf839 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -5313,8 +5313,9 @@ int amdgpu_device_gpu_recover(struct
> amdgpu_device *adev,
>  		if (r)
>  			adev->asic_reset_res = r;
> 
> -		/* Aldebaran supports ras in SRIOV, so need resume ras
> during reset */
> -		if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 2))
> +		/* Aldebaran and gfx_11_0_3 support ras in SRIOV, so need
> resume ras during reset */
> +		if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 2)
> ||
> +		    adev->ip_versions[GC_HWIP][0] == IP_VERSION(11, 0, 3))
>  			amdgpu_ras_resume(adev);
>  	} else {
>  		r = amdgpu_do_asic_reset(device_list_handle,
> reset_context);
> --
> 2.34.1