* [0001-increase-time-out-2s-send-msg-to-smu.patch] drm/amd/pm: increase time out value when sending msg to SMU
@ 2021-04-08 3:42 charles sun
2021-04-08 4:16 ` Quan, Evan
0 siblings, 1 reply; 4+ messages in thread
From: charles sun @ 2021-04-08 3:42 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Jinzhou.Su, Zhan.Liu, charles sun
when do S3 stress, low rate that PowerUpVcn message will get response
more than 1s, so here increase the timeout to 2s
Signed-off-by: Sun, Charles Charles.Sun@amd.com
Acked-by: Deucher, Alexander Alexander.Deucher@amd.com
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index b725f263092b..dc7d2e71aa6f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -79,7 +79,7 @@ static void smu_cmn_read_arg(struct smu_context *smu,
int smu_cmn_wait_for_response(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
- uint32_t cur_value, i, timeout = adev->usec_timeout * 10;
+ uint32_t cur_value, i, timeout = adev->usec_timeout * 20;
for (i = 0; i < timeout; i++) {
cur_value = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90);
--
2.25.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* RE: [0001-increase-time-out-2s-send-msg-to-smu.patch] drm/amd/pm: increase time out value when sending msg to SMU
2021-04-08 3:42 [0001-increase-time-out-2s-send-msg-to-smu.patch] drm/amd/pm: increase time out value when sending msg to SMU charles sun
@ 2021-04-08 4:16 ` Quan, Evan
0 siblings, 0 replies; 4+ messages in thread
From: Quan, Evan @ 2021-04-08 4:16 UTC (permalink / raw)
To: Sun, Charles, amd-gfx
Cc: Deucher, Alexander, Su, Jinzhou (Joe), Liu, Zhan, Sun, Charles
[AMD Public Use]
Reviewed-by: Evan Quan <evan.quan@amd.com>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
> charles sun
> Sent: Thursday, April 8, 2021 11:42 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Su, Jinzhou (Joe)
> <Jinzhou.Su@amd.com>; Liu, Zhan <Zhan.Liu@amd.com>; Sun, Charles
> <Charles.Sun@amd.com>
> Subject: [0001-increase-time-out-2s-send-msg-to-smu.patch] drm/amd/pm:
> increase time out value when sending msg to SMU
>
> when do S3 stress, low rate that PowerUpVcn message will get response
> more than 1s, so here increase the timeout to 2s
>
> Signed-off-by: Sun, Charles Charles.Sun@amd.com
> Acked-by: Deucher, Alexander Alexander.Deucher@amd.com
> ---
> drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
> index b725f263092b..dc7d2e71aa6f 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
> @@ -79,7 +79,7 @@ static void smu_cmn_read_arg(struct smu_context
> *smu, int smu_cmn_wait_for_response(struct smu_context *smu) {
> struct amdgpu_device *adev = smu->adev;
> - uint32_t cur_value, i, timeout = adev->usec_timeout * 10;
> + uint32_t cur_value, i, timeout = adev->usec_timeout * 20;
>
> for (i = 0; i < timeout; i++) {
> cur_value = RREG32_SOC15(MP1, 0,
> mmMP1_SMN_C2PMSG_90);
> --
> 2.25.1
>
> _______________________________________________
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> amd-gfx@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [0001-increase-time-out-2s-send-msg-to-smu.patch] drm/amd/pm: increase time out value when sending msg to SMU
2021-04-08 3:32 charles sun
@ 2021-04-08 3:41 ` Deucher, Alexander
0 siblings, 0 replies; 4+ messages in thread
From: Deucher, Alexander @ 2021-04-08 3:41 UTC (permalink / raw)
To: Sun, Charles, amd-gfx; +Cc: Su, Jinzhou (Joe), Liu, Zhan
[-- Attachment #1.1: Type: text/plain, Size: 1652 bytes --]
[AMD Official Use Only - Internal Distribution Only]
You wrote the patch, it should be signed-off-by you, not me 🙂 E.g.,
Signed-off-by: Charles Sun <charles.sun@amd.com>
________________________________
From: Sun, Charles <Charles.Sun@amd.com>
Sent: Wednesday, April 7, 2021 11:32 PM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Liu, Zhan <Zhan.Liu@amd.com>; Su, Jinzhou (Joe) <Jinzhou.Su@amd.com>; Sun, Charles <Charles.Sun@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>
Subject: [0001-increase-time-out-2s-send-msg-to-smu.patch] drm/amd/pm: increase time out value when sending msg to SMU
when do S3 stress, low rate that PowerUpVcn message will get response
more than 1s, so here increase the timeout to 2s
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index b725f263092b..dc7d2e71aa6f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -79,7 +79,7 @@ static void smu_cmn_read_arg(struct smu_context *smu,
int smu_cmn_wait_for_response(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
- uint32_t cur_value, i, timeout = adev->usec_timeout * 10;
+ uint32_t cur_value, i, timeout = adev->usec_timeout * 20;
for (i = 0; i < timeout; i++) {
cur_value = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90);
--
2.25.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* [0001-increase-time-out-2s-send-msg-to-smu.patch] drm/amd/pm: increase time out value when sending msg to SMU
@ 2021-04-08 3:32 charles sun
2021-04-08 3:41 ` Deucher, Alexander
0 siblings, 1 reply; 4+ messages in thread
From: charles sun @ 2021-04-08 3:32 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Jinzhou.Su, Zhan.Liu, charles sun
when do S3 stress, low rate that PowerUpVcn message will get response
more than 1s, so here increase the timeout to 2s
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index b725f263092b..dc7d2e71aa6f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -79,7 +79,7 @@ static void smu_cmn_read_arg(struct smu_context *smu,
int smu_cmn_wait_for_response(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
- uint32_t cur_value, i, timeout = adev->usec_timeout * 10;
+ uint32_t cur_value, i, timeout = adev->usec_timeout * 20;
for (i = 0; i < timeout; i++) {
cur_value = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90);
--
2.25.1
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
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