From: "Quan, Evan" <Evan.Quan@amd.com>
To: "Slivka, Danijel" <Danijel.Slivka@amd.com>,
"amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>
Cc: "Slivka, Danijel" <Danijel.Slivka@amd.com>
Subject: RE: [PATCH] amdgpu/pm: Disallow managing power profiles on SRIOV for Sienna Cichlid
Date: Tue, 10 May 2022 03:16:03 +0000 [thread overview]
Message-ID: <DM6PR12MB2619E78E00298314319EEEADE4C99@DM6PR12MB2619.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20220509114722.124060-1-danijel.slivka@amd.com>
[AMD Official Use Only - General]
Reviewed-by: Evan Quan <evan.quan@amd.com>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Danijel Slivka
> Sent: Monday, May 9, 2022 7:47 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Slivka, Danijel <Danijel.Slivka@amd.com>
> Subject: [PATCH] amdgpu/pm: Disallow managing power profiles on SRIOV
> for Sienna Cichlid
>
> Managing power profiles mode is not allowed in SRIOV mode for Sienna
> Cichlid.
> This patch is adjusting the "pp_power_profile_mode" and
> "power_dpm_force_performance_level" accordingly.
>
> Signed-off-by: Danijel Slivka <danijel.slivka@amd.com>
> ---
> drivers/gpu/drm/amd/pm/amdgpu_pm.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> index 70a0aad05426..59a662aeaaf3 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> @@ -2025,6 +2025,8 @@ static int default_attr_update(struct
> amdgpu_device *adev, struct amdgpu_device_
> } else if (DEVICE_ATTR_IS(pp_power_profile_mode)) {
> if (amdgpu_dpm_get_power_profile_mode(adev, NULL) ==
> -EOPNOTSUPP)
> *states = ATTR_STATE_UNSUPPORTED;
> + else if (gc_ver == IP_VERSION(10, 3, 0) &&
> amdgpu_sriov_vf(adev))
> + *states = ATTR_STATE_UNSUPPORTED;
> }
>
> switch (gc_ver) {
> @@ -2038,6 +2040,13 @@ static int default_attr_update(struct
> amdgpu_device *adev, struct amdgpu_device_
> dev_attr->store = NULL;
> }
> break;
> + case IP_VERSION(10, 3, 0):
> + if (DEVICE_ATTR_IS(power_dpm_force_performance_level)
> &&
> + amdgpu_sriov_vf(adev)) {
> + dev_attr->attr.mode &= ~S_IWUGO;
> + dev_attr->store = NULL;
> + }
> + break;
> default:
> break;
> }
> --
> 2.25.1
prev parent reply other threads:[~2022-05-10 3:16 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-09 11:47 [PATCH] amdgpu/pm: Disallow managing power profiles on SRIOV for Sienna Cichlid Danijel Slivka
2022-05-10 3:16 ` Quan, Evan [this message]
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