* [PATCH umr v2] fix field names for INDIRECT_BUFFER_CONST/CIK for gfx9/gfx10
@ 2020-02-19 11:56 Xiaojie Yuan
2020-02-19 12:01 ` Tom St Denis
0 siblings, 1 reply; 3+ messages in thread
From: Xiaojie Yuan @ 2020-02-19 11:56 UTC (permalink / raw)
To: amd-gfx, tom.stdenis; +Cc: Xiaojie Yuan
field names for INDIRECT_BUFFER_CONST/CIK of gfx9/gfx10 are the same.
fields like OFFLOAD_POLLING and VALID are defined in mec's
INDIRECT_BUFFER packet, so not applicable here.
v2: fix umr_pm4_decode_opcodes.c as well
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
---
src/lib/ring_decode.c | 23 +++++++----------------
src/lib/umr_pm4_decode_opcodes.c | 20 ++++++--------------
2 files changed, 13 insertions(+), 30 deletions(-)
diff --git a/src/lib/ring_decode.c b/src/lib/ring_decode.c
index 250dfd7..fa44f27 100644
--- a/src/lib/ring_decode.c
+++ b/src/lib/ring_decode.c
@@ -617,22 +617,13 @@ static void print_decode_pm4_pkt3(struct umr_asic *asic, struct umr_ring_decoder
case 2: printf("IB_SIZE:%s%lu%s, VMID: %s%lu%s", BLUE, BITS(ib, 0, 20), RST, BLUE, BITS(ib, 24, 28), RST);
decoder->pm4.next_ib_state.ib_size = BITS(ib, 0, 20) * 4;
decoder->pm4.next_ib_state.ib_vmid = decoder->next_ib_info.vmid ? decoder->next_ib_info.vmid : BITS(ib, 24, 28);
- if (decoder->pm4.cur_opcode == 0x33) {
- if (asic->family >= FAMILY_NV) {
- printf(", CHAIN: %s%u%s, PRE_ENA: %s%u%s, CACHE_POLICY: %s%u%s, PRE_RESUME: %s%u%s PRIV: %s%u%s",
- BLUE, (unsigned)BITS(ib, 20, 21), RST,
- BLUE, (unsigned)BITS(ib, 21, 22), RST,
- BLUE, (unsigned)BITS(ib, 28, 30), RST,
- BLUE, (unsigned)BITS(ib, 30, 31), RST,
- BLUE, (unsigned)BITS(ib, 31, 32), RST);
- } else if (asic->family >= FAMILY_AI) {
- printf(", CHAIN: %s%u%s, OFFLOAD_POLLING: %s%u%s, VALID: %s%u%s, CACHE_POLICY: %s%u%s PRIV: %s%u%s",
- BLUE, (unsigned)BITS(ib, 20, 21), RST,
- BLUE, (unsigned)BITS(ib, 21, 22), RST,
- BLUE, (unsigned)BITS(ib, 23, 24), RST,
- BLUE, (unsigned)BITS(ib, 28, 30), RST,
- BLUE, (unsigned)BITS(ib, 31, 32), RST);
- }
+ if (asic->family >= FAMILY_AI) {
+ printf(", CHAIN: %s%u%s, PRE_ENA: %s%u%s, CACHE_POLICY: %s%u%s, PRE_RESUME: %s%u%s PRIV: %s%u%s",
+ BLUE, (unsigned)BITS(ib, 20, 21), RST,
+ BLUE, (unsigned)BITS(ib, 21, 22), RST,
+ BLUE, (unsigned)BITS(ib, 28, 30), RST,
+ BLUE, (unsigned)BITS(ib, 30, 31), RST,
+ BLUE, (unsigned)BITS(ib, 31, 32), RST);
}
if (!asic->options.no_follow_ib) {
if (umr_read_vram(asic, decoder->pm4.next_ib_state.ib_vmid,
diff --git a/src/lib/umr_pm4_decode_opcodes.c b/src/lib/umr_pm4_decode_opcodes.c
index d7c1495..a823ecf 100644
--- a/src/lib/umr_pm4_decode_opcodes.c
+++ b/src/lib/umr_pm4_decode_opcodes.c
@@ -429,20 +429,12 @@ static void decode_pkt3(struct umr_asic *asic, struct umr_pm4_stream_decode_ui *
ui->add_field(ui, ib_addr + 8, ib_vmid, "IB_BASE_HI", BITS(stream->words[1], 0, 16), NULL, 16);
ui->add_field(ui, ib_addr + 12, ib_vmid, "IB_SIZE", BITS(stream->words[2], 0, 20), NULL, 10);
ui->add_field(ui, ib_addr + 12, ib_vmid, "IB_VMID", BITS(stream->words[2], 24, 28), NULL, 10);
- if (stream->opcode == 0x33) {
- if (asic->family >= FAMILY_NV) {
- ui->add_field(ui, ib_addr + 12, ib_vmid, "CHAIN", BITS(stream->words[2], 20, 21), NULL, 10);
- ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_ENA", BITS(stream->words[2], 21, 22), NULL, 10);
- ui->add_field(ui, ib_addr + 12, ib_vmid, "CACHE_POLICY", BITS(stream->words[2], 28, 30), NULL, 10);
- ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_RESUME", BITS(stream->words[2], 30, 31), NULL, 10);
- ui->add_field(ui, ib_addr + 12, ib_vmid, "PRIV", BITS(stream->words[2], 31, 32), NULL, 10);
- } else if (asic->family >= FAMILY_AI) {
- ui->add_field(ui, ib_addr + 12, ib_vmid, "CHAIN", BITS(stream->words[2], 20, 21), NULL, 10);
- ui->add_field(ui, ib_addr + 12, ib_vmid, "OFFLOAD_POLLING", BITS(stream->words[2], 21, 22), NULL, 10);
- ui->add_field(ui, ib_addr + 12, ib_vmid, "VALID", BITS(stream->words[2], 23, 24), NULL, 10);
- ui->add_field(ui, ib_addr + 12, ib_vmid, "CACHE_POLICY", BITS(stream->words[2], 28, 30), NULL, 10);
- ui->add_field(ui, ib_addr + 12, ib_vmid, "PRIV", BITS(stream->words[2], 31, 32), NULL, 10);
- }
+ if (asic->family >= FAMILY_AI) {
+ ui->add_field(ui, ib_addr + 12, ib_vmid, "CHAIN", BITS(stream->words[2], 20, 21), NULL, 10);
+ ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_ENA", BITS(stream->words[2], 21, 22), NULL, 10);
+ ui->add_field(ui, ib_addr + 12, ib_vmid, "CACHE_POLICY", BITS(stream->words[2], 28, 30), NULL, 10);
+ ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_RESUME", BITS(stream->words[2], 30, 31), NULL, 10);
+ ui->add_field(ui, ib_addr + 12, ib_vmid, "PRIV", BITS(stream->words[2], 31, 32), NULL, 10);
}
break;
case 0x37: // WRITE_DATA
--
2.20.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH umr v2] fix field names for INDIRECT_BUFFER_CONST/CIK for gfx9/gfx10
2020-02-19 11:56 [PATCH umr v2] fix field names for INDIRECT_BUFFER_CONST/CIK for gfx9/gfx10 Xiaojie Yuan
@ 2020-02-19 12:01 ` Tom St Denis
2020-02-19 12:02 ` Yuan, Xiaojie
0 siblings, 1 reply; 3+ messages in thread
From: Tom St Denis @ 2020-02-19 12:01 UTC (permalink / raw)
To: Xiaojie Yuan, amd-gfx
Hmm it doesn't apply on top of the tip of master. I'll just manually
apply it.
Tom
On 2020-02-19 6:56 a.m., Xiaojie Yuan wrote:
> field names for INDIRECT_BUFFER_CONST/CIK of gfx9/gfx10 are the same.
> fields like OFFLOAD_POLLING and VALID are defined in mec's
> INDIRECT_BUFFER packet, so not applicable here.
>
> v2: fix umr_pm4_decode_opcodes.c as well
>
> Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
> ---
> src/lib/ring_decode.c | 23 +++++++----------------
> src/lib/umr_pm4_decode_opcodes.c | 20 ++++++--------------
> 2 files changed, 13 insertions(+), 30 deletions(-)
>
> diff --git a/src/lib/ring_decode.c b/src/lib/ring_decode.c
> index 250dfd7..fa44f27 100644
> --- a/src/lib/ring_decode.c
> +++ b/src/lib/ring_decode.c
> @@ -617,22 +617,13 @@ static void print_decode_pm4_pkt3(struct umr_asic *asic, struct umr_ring_decoder
> case 2: printf("IB_SIZE:%s%lu%s, VMID: %s%lu%s", BLUE, BITS(ib, 0, 20), RST, BLUE, BITS(ib, 24, 28), RST);
> decoder->pm4.next_ib_state.ib_size = BITS(ib, 0, 20) * 4;
> decoder->pm4.next_ib_state.ib_vmid = decoder->next_ib_info.vmid ? decoder->next_ib_info.vmid : BITS(ib, 24, 28);
> - if (decoder->pm4.cur_opcode == 0x33) {
> - if (asic->family >= FAMILY_NV) {
> - printf(", CHAIN: %s%u%s, PRE_ENA: %s%u%s, CACHE_POLICY: %s%u%s, PRE_RESUME: %s%u%s PRIV: %s%u%s",
> - BLUE, (unsigned)BITS(ib, 20, 21), RST,
> - BLUE, (unsigned)BITS(ib, 21, 22), RST,
> - BLUE, (unsigned)BITS(ib, 28, 30), RST,
> - BLUE, (unsigned)BITS(ib, 30, 31), RST,
> - BLUE, (unsigned)BITS(ib, 31, 32), RST);
> - } else if (asic->family >= FAMILY_AI) {
> - printf(", CHAIN: %s%u%s, OFFLOAD_POLLING: %s%u%s, VALID: %s%u%s, CACHE_POLICY: %s%u%s PRIV: %s%u%s",
> - BLUE, (unsigned)BITS(ib, 20, 21), RST,
> - BLUE, (unsigned)BITS(ib, 21, 22), RST,
> - BLUE, (unsigned)BITS(ib, 23, 24), RST,
> - BLUE, (unsigned)BITS(ib, 28, 30), RST,
> - BLUE, (unsigned)BITS(ib, 31, 32), RST);
> - }
> + if (asic->family >= FAMILY_AI) {
> + printf(", CHAIN: %s%u%s, PRE_ENA: %s%u%s, CACHE_POLICY: %s%u%s, PRE_RESUME: %s%u%s PRIV: %s%u%s",
> + BLUE, (unsigned)BITS(ib, 20, 21), RST,
> + BLUE, (unsigned)BITS(ib, 21, 22), RST,
> + BLUE, (unsigned)BITS(ib, 28, 30), RST,
> + BLUE, (unsigned)BITS(ib, 30, 31), RST,
> + BLUE, (unsigned)BITS(ib, 31, 32), RST);
> }
> if (!asic->options.no_follow_ib) {
> if (umr_read_vram(asic, decoder->pm4.next_ib_state.ib_vmid,
> diff --git a/src/lib/umr_pm4_decode_opcodes.c b/src/lib/umr_pm4_decode_opcodes.c
> index d7c1495..a823ecf 100644
> --- a/src/lib/umr_pm4_decode_opcodes.c
> +++ b/src/lib/umr_pm4_decode_opcodes.c
> @@ -429,20 +429,12 @@ static void decode_pkt3(struct umr_asic *asic, struct umr_pm4_stream_decode_ui *
> ui->add_field(ui, ib_addr + 8, ib_vmid, "IB_BASE_HI", BITS(stream->words[1], 0, 16), NULL, 16);
> ui->add_field(ui, ib_addr + 12, ib_vmid, "IB_SIZE", BITS(stream->words[2], 0, 20), NULL, 10);
> ui->add_field(ui, ib_addr + 12, ib_vmid, "IB_VMID", BITS(stream->words[2], 24, 28), NULL, 10);
> - if (stream->opcode == 0x33) {
> - if (asic->family >= FAMILY_NV) {
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "CHAIN", BITS(stream->words[2], 20, 21), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_ENA", BITS(stream->words[2], 21, 22), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "CACHE_POLICY", BITS(stream->words[2], 28, 30), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_RESUME", BITS(stream->words[2], 30, 31), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "PRIV", BITS(stream->words[2], 31, 32), NULL, 10);
> - } else if (asic->family >= FAMILY_AI) {
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "CHAIN", BITS(stream->words[2], 20, 21), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "OFFLOAD_POLLING", BITS(stream->words[2], 21, 22), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "VALID", BITS(stream->words[2], 23, 24), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "CACHE_POLICY", BITS(stream->words[2], 28, 30), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "PRIV", BITS(stream->words[2], 31, 32), NULL, 10);
> - }
> + if (asic->family >= FAMILY_AI) {
> + ui->add_field(ui, ib_addr + 12, ib_vmid, "CHAIN", BITS(stream->words[2], 20, 21), NULL, 10);
> + ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_ENA", BITS(stream->words[2], 21, 22), NULL, 10);
> + ui->add_field(ui, ib_addr + 12, ib_vmid, "CACHE_POLICY", BITS(stream->words[2], 28, 30), NULL, 10);
> + ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_RESUME", BITS(stream->words[2], 30, 31), NULL, 10);
> + ui->add_field(ui, ib_addr + 12, ib_vmid, "PRIV", BITS(stream->words[2], 31, 32), NULL, 10);
> }
> break;
> case 0x37: // WRITE_DATA
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH umr v2] fix field names for INDIRECT_BUFFER_CONST/CIK for gfx9/gfx10
2020-02-19 12:01 ` Tom St Denis
@ 2020-02-19 12:02 ` Yuan, Xiaojie
0 siblings, 0 replies; 3+ messages in thread
From: Yuan, Xiaojie @ 2020-02-19 12:02 UTC (permalink / raw)
To: StDenis, Tom, amd-gfx
[AMD Official Use Only - Internal Distribution Only]
Thanks Tom.
BR,
Xiaojie
________________________________________
From: StDenis, Tom <Tom.StDenis@amd.com>
Sent: Wednesday, February 19, 2020 8:01 PM
To: Yuan, Xiaojie; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH umr v2] fix field names for INDIRECT_BUFFER_CONST/CIK for gfx9/gfx10
Hmm it doesn't apply on top of the tip of master. I'll just manually
apply it.
Tom
On 2020-02-19 6:56 a.m., Xiaojie Yuan wrote:
> field names for INDIRECT_BUFFER_CONST/CIK of gfx9/gfx10 are the same.
> fields like OFFLOAD_POLLING and VALID are defined in mec's
> INDIRECT_BUFFER packet, so not applicable here.
>
> v2: fix umr_pm4_decode_opcodes.c as well
>
> Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
> ---
> src/lib/ring_decode.c | 23 +++++++----------------
> src/lib/umr_pm4_decode_opcodes.c | 20 ++++++--------------
> 2 files changed, 13 insertions(+), 30 deletions(-)
>
> diff --git a/src/lib/ring_decode.c b/src/lib/ring_decode.c
> index 250dfd7..fa44f27 100644
> --- a/src/lib/ring_decode.c
> +++ b/src/lib/ring_decode.c
> @@ -617,22 +617,13 @@ static void print_decode_pm4_pkt3(struct umr_asic *asic, struct umr_ring_decoder
> case 2: printf("IB_SIZE:%s%lu%s, VMID: %s%lu%s", BLUE, BITS(ib, 0, 20), RST, BLUE, BITS(ib, 24, 28), RST);
> decoder->pm4.next_ib_state.ib_size = BITS(ib, 0, 20) * 4;
> decoder->pm4.next_ib_state.ib_vmid = decoder->next_ib_info.vmid ? decoder->next_ib_info.vmid : BITS(ib, 24, 28);
> - if (decoder->pm4.cur_opcode == 0x33) {
> - if (asic->family >= FAMILY_NV) {
> - printf(", CHAIN: %s%u%s, PRE_ENA: %s%u%s, CACHE_POLICY: %s%u%s, PRE_RESUME: %s%u%s PRIV: %s%u%s",
> - BLUE, (unsigned)BITS(ib, 20, 21), RST,
> - BLUE, (unsigned)BITS(ib, 21, 22), RST,
> - BLUE, (unsigned)BITS(ib, 28, 30), RST,
> - BLUE, (unsigned)BITS(ib, 30, 31), RST,
> - BLUE, (unsigned)BITS(ib, 31, 32), RST);
> - } else if (asic->family >= FAMILY_AI) {
> - printf(", CHAIN: %s%u%s, OFFLOAD_POLLING: %s%u%s, VALID: %s%u%s, CACHE_POLICY: %s%u%s PRIV: %s%u%s",
> - BLUE, (unsigned)BITS(ib, 20, 21), RST,
> - BLUE, (unsigned)BITS(ib, 21, 22), RST,
> - BLUE, (unsigned)BITS(ib, 23, 24), RST,
> - BLUE, (unsigned)BITS(ib, 28, 30), RST,
> - BLUE, (unsigned)BITS(ib, 31, 32), RST);
> - }
> + if (asic->family >= FAMILY_AI) {
> + printf(", CHAIN: %s%u%s, PRE_ENA: %s%u%s, CACHE_POLICY: %s%u%s, PRE_RESUME: %s%u%s PRIV: %s%u%s",
> + BLUE, (unsigned)BITS(ib, 20, 21), RST,
> + BLUE, (unsigned)BITS(ib, 21, 22), RST,
> + BLUE, (unsigned)BITS(ib, 28, 30), RST,
> + BLUE, (unsigned)BITS(ib, 30, 31), RST,
> + BLUE, (unsigned)BITS(ib, 31, 32), RST);
> }
> if (!asic->options.no_follow_ib) {
> if (umr_read_vram(asic, decoder->pm4.next_ib_state.ib_vmid,
> diff --git a/src/lib/umr_pm4_decode_opcodes.c b/src/lib/umr_pm4_decode_opcodes.c
> index d7c1495..a823ecf 100644
> --- a/src/lib/umr_pm4_decode_opcodes.c
> +++ b/src/lib/umr_pm4_decode_opcodes.c
> @@ -429,20 +429,12 @@ static void decode_pkt3(struct umr_asic *asic, struct umr_pm4_stream_decode_ui *
> ui->add_field(ui, ib_addr + 8, ib_vmid, "IB_BASE_HI", BITS(stream->words[1], 0, 16), NULL, 16);
> ui->add_field(ui, ib_addr + 12, ib_vmid, "IB_SIZE", BITS(stream->words[2], 0, 20), NULL, 10);
> ui->add_field(ui, ib_addr + 12, ib_vmid, "IB_VMID", BITS(stream->words[2], 24, 28), NULL, 10);
> - if (stream->opcode == 0x33) {
> - if (asic->family >= FAMILY_NV) {
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "CHAIN", BITS(stream->words[2], 20, 21), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_ENA", BITS(stream->words[2], 21, 22), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "CACHE_POLICY", BITS(stream->words[2], 28, 30), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_RESUME", BITS(stream->words[2], 30, 31), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "PRIV", BITS(stream->words[2], 31, 32), NULL, 10);
> - } else if (asic->family >= FAMILY_AI) {
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "CHAIN", BITS(stream->words[2], 20, 21), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "OFFLOAD_POLLING", BITS(stream->words[2], 21, 22), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "VALID", BITS(stream->words[2], 23, 24), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "CACHE_POLICY", BITS(stream->words[2], 28, 30), NULL, 10);
> - ui->add_field(ui, ib_addr + 12, ib_vmid, "PRIV", BITS(stream->words[2], 31, 32), NULL, 10);
> - }
> + if (asic->family >= FAMILY_AI) {
> + ui->add_field(ui, ib_addr + 12, ib_vmid, "CHAIN", BITS(stream->words[2], 20, 21), NULL, 10);
> + ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_ENA", BITS(stream->words[2], 21, 22), NULL, 10);
> + ui->add_field(ui, ib_addr + 12, ib_vmid, "CACHE_POLICY", BITS(stream->words[2], 28, 30), NULL, 10);
> + ui->add_field(ui, ib_addr + 12, ib_vmid, "PRE_RESUME", BITS(stream->words[2], 30, 31), NULL, 10);
> + ui->add_field(ui, ib_addr + 12, ib_vmid, "PRIV", BITS(stream->words[2], 31, 32), NULL, 10);
> }
> break;
> case 0x37: // WRITE_DATA
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-02-19 12:02 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-19 11:56 [PATCH umr v2] fix field names for INDIRECT_BUFFER_CONST/CIK for gfx9/gfx10 Xiaojie Yuan
2020-02-19 12:01 ` Tom St Denis
2020-02-19 12:02 ` Yuan, Xiaojie
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).