* [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV
@ 2020-07-29 8:23 Liu ChengZhe
2020-07-29 14:14 ` Luben Tuikov
0 siblings, 1 reply; 9+ messages in thread
From: Liu ChengZhe @ 2020-07-29 8:23 UTC (permalink / raw)
To: amd-gfx
Cc: Jack Xiao, Feifei Xu, Kevin Wang, Liu ChengZhe, Tuikov Luben,
Deucher Alexander, Xiaojie Yuan, Christian König,
Hawking Zhang
1. For Navi12, CHIP_SIENNA_CICHLID, skip tmr load operation;
2. Check pointer before release firmware.
v2: use CHIP_SIENNA_CICHLID instead
v3: remove local "bool ret"; fix grammer issue
v4: use my name instead of "root"
v5: fix grammer issue and indent issue
Signed-off-by: Liu ChengZhe <ChengZhe.Liu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 35 ++++++++++++++++++++-----
1 file changed, 29 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index a053b7af0680..c68369731b20 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -193,12 +193,18 @@ static int psp_sw_fini(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
psp_memory_training_fini(&adev->psp);
- release_firmware(adev->psp.sos_fw);
- adev->psp.sos_fw = NULL;
- release_firmware(adev->psp.asd_fw);
- adev->psp.asd_fw = NULL;
- release_firmware(adev->psp.ta_fw);
- adev->psp.ta_fw = NULL;
+ if (adev->psp.sos_fw) {
+ release_firmware(adev->psp.sos_fw);
+ adev->psp.sos_fw = NULL;
+ }
+ if (adev->psp.asd_fw) {
+ release_firmware(adev->psp.asd_fw);
+ adev->psp.asd_fw = NULL;
+ }
+ if (adev->psp.ta_fw) {
+ release_firmware(adev->psp.ta_fw);
+ adev->psp.ta_fw = NULL;
+ }
if (adev->asic_type == CHIP_NAVI10)
psp_sysfs_fini(adev);
@@ -409,11 +415,28 @@ static int psp_clear_vf_fw(struct psp_context *psp)
return ret;
}
+static bool psp_skip_tmr(struct psp_context *psp)
+{
+ switch (psp->adev->asic_type) {
+ case CHIP_NAVI12:
+ case CHIP_SIENNA_CICHLID:
+ return true;
+ default:
+ return false;
+ }
+}
+
static int psp_tmr_load(struct psp_context *psp)
{
int ret;
struct psp_gfx_cmd_resp *cmd;
+ /* For Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not set up TMR.
+ * Already set up by host driver.
+ */
+ if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
+ return 0;
+
cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
if (!cmd)
return -ENOMEM;
--
2.25.1
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV
2020-07-29 8:23 [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV Liu ChengZhe
@ 2020-07-29 14:14 ` Luben Tuikov
0 siblings, 0 replies; 9+ messages in thread
From: Luben Tuikov @ 2020-07-29 14:14 UTC (permalink / raw)
To: Liu ChengZhe, amd-gfx
Cc: Jack Xiao, Feifei Xu, Kevin Wang, Deucher Alexander,
Xiaojie Yuan, Christian König, Hawking Zhang
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
On 2020-07-29 04:23, Liu ChengZhe wrote:
> 1. For Navi12, CHIP_SIENNA_CICHLID, skip tmr load operation;
> 2. Check pointer before release firmware.
>
> v2: use CHIP_SIENNA_CICHLID instead
> v3: remove local "bool ret"; fix grammer issue
> v4: use my name instead of "root"
> v5: fix grammer issue and indent issue
>
> Signed-off-by: Liu ChengZhe <ChengZhe.Liu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 35 ++++++++++++++++++++-----
> 1 file changed, 29 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index a053b7af0680..c68369731b20 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -193,12 +193,18 @@ static int psp_sw_fini(void *handle)
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> psp_memory_training_fini(&adev->psp);
> - release_firmware(adev->psp.sos_fw);
> - adev->psp.sos_fw = NULL;
> - release_firmware(adev->psp.asd_fw);
> - adev->psp.asd_fw = NULL;
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> + if (adev->psp.sos_fw) {
> + release_firmware(adev->psp.sos_fw);
> + adev->psp.sos_fw = NULL;
> + }
> + if (adev->psp.asd_fw) {
> + release_firmware(adev->psp.asd_fw);
> + adev->psp.asd_fw = NULL;
> + }
> + if (adev->psp.ta_fw) {
> + release_firmware(adev->psp.ta_fw);
> + adev->psp.ta_fw = NULL;
> + }
>
> if (adev->asic_type == CHIP_NAVI10)
> psp_sysfs_fini(adev);
> @@ -409,11 +415,28 @@ static int psp_clear_vf_fw(struct psp_context *psp)
> return ret;
> }
>
> +static bool psp_skip_tmr(struct psp_context *psp)
> +{
> + switch (psp->adev->asic_type) {
> + case CHIP_NAVI12:
> + case CHIP_SIENNA_CICHLID:
> + return true;
> + default:
> + return false;
> + }
> +}
> +
> static int psp_tmr_load(struct psp_context *psp)
> {
> int ret;
> struct psp_gfx_cmd_resp *cmd;
>
> + /* For Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not set up TMR.
> + * Already set up by host driver.
> + */
> + if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
> + return 0;
> +
> cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
> if (!cmd)
> return -ENOMEM;
>
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV
2020-07-28 5:36 Liu ChengZhe
@ 2020-07-28 18:12 ` Luben Tuikov
0 siblings, 0 replies; 9+ messages in thread
From: Luben Tuikov @ 2020-07-28 18:12 UTC (permalink / raw)
To: Liu ChengZhe, amd-gfx
Cc: Jack Xiao, Feifei Xu, Kevin Wang, Deucher Alexander,
Xiaojie Yuan, Christian König, Hawking Zhang
On 2020-07-28 1:36 a.m., Liu ChengZhe wrote:
> 1. For Navi12, CHIP_SIENNA_CICHLID, skip tmr load operation;
> 2. Check pointer before release firmware.
>
> v2: use CHIP_SIENNA_CICHLID instead
> v3: remove local "bool ret"; fix grammer issue
> v4: use my name instead of "root"
>
Don't indent any lines.
> Signed-off-by: Liu ChengZhe <ChengZhe.Liu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 35 ++++++++++++++++++++-----
> 1 file changed, 29 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index a053b7af0680..7f18286a0cc2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -193,12 +193,18 @@ static int psp_sw_fini(void *handle)
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> psp_memory_training_fini(&adev->psp);
> - release_firmware(adev->psp.sos_fw);
> - adev->psp.sos_fw = NULL;
> - release_firmware(adev->psp.asd_fw);
> - adev->psp.asd_fw = NULL;
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> + if (adev->psp.sos_fw) {
> + release_firmware(adev->psp.sos_fw);
> + adev->psp.sos_fw = NULL;
> + }
> + if (adev->psp.asd_fw) {
> + release_firmware(adev->psp.asd_fw);
> + adev->psp.asd_fw = NULL;
> + }
> + if (adev->psp.ta_fw) {
> + release_firmware(adev->psp.ta_fw);
> + adev->psp.ta_fw = NULL;
> + }
>
> if (adev->asic_type == CHIP_NAVI10)
> psp_sysfs_fini(adev);
> @@ -409,11 +415,28 @@ static int psp_clear_vf_fw(struct psp_context *psp)
> return ret;
> }
>
> +static bool psp_skip_tmr(struct psp_context *psp)
> +{
> + switch (psp->adev->asic_type) {
> + case CHIP_NAVI12:
> + case CHIP_SIENNA_CICHLID:
> + return true;
> + default:
> + return false;
> + }
> +}
Yeah, that's very nice now.
> +
> static int psp_tmr_load(struct psp_context *psp)
> {
> int ret;
> struct psp_gfx_cmd_resp *cmd;
>
Fix this:
> + /* (F)for Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not set up TMR(.)
> + * (A)already set( )up by host driver(.)
Thanks,
Luben
> + */
> + if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
> + return 0;
> +
> cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
> if (!cmd)
> return -ENOMEM;
>
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV
2020-07-28 5:12 Liu ChengZhe
@ 2020-07-28 18:10 ` Luben Tuikov
0 siblings, 0 replies; 9+ messages in thread
From: Luben Tuikov @ 2020-07-28 18:10 UTC (permalink / raw)
To: Liu ChengZhe, amd-gfx
Cc: Jack Xiao, Feifei Xu, Kevin Wang, Deucher Alexander,
Xiaojie Yuan, Christian König, Hawking Zhang
Thanks for this patch.
On 2020-07-28 1:12 a.m., Liu ChengZhe wrote:
> From: root <ChengZhe.Liu@amd.com>
You should fix your Git setup to show proper user name,
not "root". I've prepared a Confluence page which shows
a way to do it, and a few other things along the way:
http://confluence.amd.com/display/~ltuikov/Git+Setup
>
> 1. For Navi12, CHIP_SIENNA_CICHLID, skip tmr load operation;
> 2. Check pointer before release firmware.
>
> v2: use CHIP_SIENNA_CICHLID instead
> v3: remove local "bool ret"; fix grammer issue
> Signed-off-by: root <ChengZhe.Liu@amd.com>
You're missing an empty line between your commit message
and the Signed-off-by: line.
Also please do not indent your commit message. "git log" already
indents it and it would look too indented to the right.
Below for more:
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 35 ++++++++++++++++++++-----
> 1 file changed, 29 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index a053b7af0680..7f18286a0cc2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -193,12 +193,18 @@ static int psp_sw_fini(void *handle)
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> psp_memory_training_fini(&adev->psp);
> - release_firmware(adev->psp.sos_fw);
> - adev->psp.sos_fw = NULL;
> - release_firmware(adev->psp.asd_fw);
> - adev->psp.asd_fw = NULL;
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> + if (adev->psp.sos_fw) {
> + release_firmware(adev->psp.sos_fw);
> + adev->psp.sos_fw = NULL;
> + }
> + if (adev->psp.asd_fw) {
> + release_firmware(adev->psp.asd_fw);
> + adev->psp.asd_fw = NULL;
> + }
> + if (adev->psp.ta_fw) {
> + release_firmware(adev->psp.ta_fw);
> + adev->psp.ta_fw = NULL;
> + }
>
> if (adev->asic_type == CHIP_NAVI10)
> psp_sysfs_fini(adev);
> @@ -409,11 +415,28 @@ static int psp_clear_vf_fw(struct psp_context *psp)
> return ret;
> }
>
> +static bool psp_skip_tmr(struct psp_context *psp)
> +{
> + switch (psp->adev->asic_type) {
> + case CHIP_NAVI12:
> + case CHIP_SIENNA_CICHLID:
> + return true;
> + default:
> + return false;
> + }
> +}
> +
> static int psp_tmr_load(struct psp_context *psp)
> {
> int ret;
> struct psp_gfx_cmd_resp *cmd;
>
> + /* for Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not set up TMR
> + * (already setup by host driver)
Thanks for fixing noun "setup" to verb "set up". But there
is another "already setup by" should be "already set up by the host driver".
Thanks and regards,
Luben
> + */
> + if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
> + return 0;
> +
> cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
> if (!cmd)
> return -ENOMEM;
>
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV
@ 2020-07-28 5:36 Liu ChengZhe
2020-07-28 18:12 ` Luben Tuikov
0 siblings, 1 reply; 9+ messages in thread
From: Liu ChengZhe @ 2020-07-28 5:36 UTC (permalink / raw)
To: amd-gfx
Cc: Jack Xiao, Feifei Xu, Kevin Wang, Liu ChengZhe, Tuikov Luben,
Deucher Alexander, Xiaojie Yuan, Christian König,
Hawking Zhang
1. For Navi12, CHIP_SIENNA_CICHLID, skip tmr load operation;
2. Check pointer before release firmware.
v2: use CHIP_SIENNA_CICHLID instead
v3: remove local "bool ret"; fix grammer issue
v4: use my name instead of "root"
Signed-off-by: Liu ChengZhe <ChengZhe.Liu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 35 ++++++++++++++++++++-----
1 file changed, 29 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index a053b7af0680..7f18286a0cc2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -193,12 +193,18 @@ static int psp_sw_fini(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
psp_memory_training_fini(&adev->psp);
- release_firmware(adev->psp.sos_fw);
- adev->psp.sos_fw = NULL;
- release_firmware(adev->psp.asd_fw);
- adev->psp.asd_fw = NULL;
- release_firmware(adev->psp.ta_fw);
- adev->psp.ta_fw = NULL;
+ if (adev->psp.sos_fw) {
+ release_firmware(adev->psp.sos_fw);
+ adev->psp.sos_fw = NULL;
+ }
+ if (adev->psp.asd_fw) {
+ release_firmware(adev->psp.asd_fw);
+ adev->psp.asd_fw = NULL;
+ }
+ if (adev->psp.ta_fw) {
+ release_firmware(adev->psp.ta_fw);
+ adev->psp.ta_fw = NULL;
+ }
if (adev->asic_type == CHIP_NAVI10)
psp_sysfs_fini(adev);
@@ -409,11 +415,28 @@ static int psp_clear_vf_fw(struct psp_context *psp)
return ret;
}
+static bool psp_skip_tmr(struct psp_context *psp)
+{
+ switch (psp->adev->asic_type) {
+ case CHIP_NAVI12:
+ case CHIP_SIENNA_CICHLID:
+ return true;
+ default:
+ return false;
+ }
+}
+
static int psp_tmr_load(struct psp_context *psp)
{
int ret;
struct psp_gfx_cmd_resp *cmd;
+ /* for Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not set up TMR
+ * (already setup by host driver)
+ */
+ if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
+ return 0;
+
cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
if (!cmd)
return -ENOMEM;
--
2.25.1
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV
@ 2020-07-28 5:12 Liu ChengZhe
2020-07-28 18:10 ` Luben Tuikov
0 siblings, 1 reply; 9+ messages in thread
From: Liu ChengZhe @ 2020-07-28 5:12 UTC (permalink / raw)
To: amd-gfx
Cc: Jack Xiao, Feifei Xu, Kevin Wang, root, Tuikov Luben,
Deucher Alexander, Xiaojie Yuan, Christian König,
Hawking Zhang
From: root <ChengZhe.Liu@amd.com>
1. For Navi12, CHIP_SIENNA_CICHLID, skip tmr load operation;
2. Check pointer before release firmware.
v2: use CHIP_SIENNA_CICHLID instead
v3: remove local "bool ret"; fix grammer issue
Signed-off-by: root <ChengZhe.Liu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 35 ++++++++++++++++++++-----
1 file changed, 29 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index a053b7af0680..7f18286a0cc2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -193,12 +193,18 @@ static int psp_sw_fini(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
psp_memory_training_fini(&adev->psp);
- release_firmware(adev->psp.sos_fw);
- adev->psp.sos_fw = NULL;
- release_firmware(adev->psp.asd_fw);
- adev->psp.asd_fw = NULL;
- release_firmware(adev->psp.ta_fw);
- adev->psp.ta_fw = NULL;
+ if (adev->psp.sos_fw) {
+ release_firmware(adev->psp.sos_fw);
+ adev->psp.sos_fw = NULL;
+ }
+ if (adev->psp.asd_fw) {
+ release_firmware(adev->psp.asd_fw);
+ adev->psp.asd_fw = NULL;
+ }
+ if (adev->psp.ta_fw) {
+ release_firmware(adev->psp.ta_fw);
+ adev->psp.ta_fw = NULL;
+ }
if (adev->asic_type == CHIP_NAVI10)
psp_sysfs_fini(adev);
@@ -409,11 +415,28 @@ static int psp_clear_vf_fw(struct psp_context *psp)
return ret;
}
+static bool psp_skip_tmr(struct psp_context *psp)
+{
+ switch (psp->adev->asic_type) {
+ case CHIP_NAVI12:
+ case CHIP_SIENNA_CICHLID:
+ return true;
+ default:
+ return false;
+ }
+}
+
static int psp_tmr_load(struct psp_context *psp)
{
int ret;
struct psp_gfx_cmd_resp *cmd;
+ /* for Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not set up TMR
+ * (already setup by host driver)
+ */
+ if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
+ return 0;
+
cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
if (!cmd)
return -ENOMEM;
--
2.25.1
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV
2020-07-27 10:57 Liu ChengZhe
2020-07-27 16:15 ` Deucher, Alexander
@ 2020-07-27 19:13 ` Luben Tuikov
1 sibling, 0 replies; 9+ messages in thread
From: Luben Tuikov @ 2020-07-27 19:13 UTC (permalink / raw)
To: Liu ChengZhe, amd-gfx
Cc: Jack Xiao, Feifei Xu, Kevin Wang, Deucher Alexander,
Xiaojie Yuan, Christian König, Hawking Zhang
On 2020-07-27 6:57 a.m., Liu ChengZhe wrote:
> From: root <ChengZhe.Liu@amd.com>
>
> 1. For Navi12, CHIP_SIENNA_CICHLID, skip tmr load operation;
> 2. Check pointer before release firmware.
>
> Signed-off-by: root <ChengZhe.Liu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 40 +++++++++++++++++++++----
> 1 file changed, 34 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index a053b7af0680..a9481e112cb3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -193,12 +193,18 @@ static int psp_sw_fini(void *handle)
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> psp_memory_training_fini(&adev->psp);
> - release_firmware(adev->psp.sos_fw);
> - adev->psp.sos_fw = NULL;
> - release_firmware(adev->psp.asd_fw);
> - adev->psp.asd_fw = NULL;
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> + if (adev->psp.sos_fw) {
> + release_firmware(adev->psp.sos_fw);
> + adev->psp.sos_fw = NULL;
> + }
> + if (adev->psp.asd_fw) {
> + release_firmware(adev->psp.asd_fw);
> + adev->psp.asd_fw = NULL;
> + }
> + if (adev->psp.ta_fw) {
> + release_firmware(adev->psp.ta_fw);
> + adev->psp.ta_fw = NULL;
> + }
>
> if (adev->asic_type == CHIP_NAVI10)
> psp_sysfs_fini(adev);
> @@ -409,11 +415,33 @@ static int psp_clear_vf_fw(struct psp_context *psp)
> return ret;
> }
>
> +static bool psp_skip_tmr(struct psp_context *psp)
> +{
> + bool ret = false;
> +
> + switch (psp->adev->asic_type) {
> + case CHIP_NAVI12:
> + case CHIP_SIENNA_CICHLID:
> + ret = true;
> + break;
> + default:
> + return false;
> + }
> +
> + return ret;
> +}
There's no need for the local "bool ret". Remove it.
See in the "default:" case you already do "return false;".
Do "return true;" in the NAVI12 and SIENNA CICHLID case.
Regards,
Luben
> +
> static int psp_tmr_load(struct psp_context *psp)
> {
> int ret;
> struct psp_gfx_cmd_resp *cmd;
>
> + /* for Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not setup TMR
> + * (already setup by host driver)
> + */
> + if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
> + return 0;
> +
> cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
> if (!cmd)
> return -ENOMEM;
>
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV
2020-07-27 10:57 Liu ChengZhe
@ 2020-07-27 16:15 ` Deucher, Alexander
2020-07-27 19:13 ` Luben Tuikov
1 sibling, 0 replies; 9+ messages in thread
From: Deucher, Alexander @ 2020-07-27 16:15 UTC (permalink / raw)
To: Liu, Cheng Zhe, amd-gfx
Cc: Xiao, Jack, Xu, Feifei, Wang, Kevin(Yang),
Tuikov, Luben, Yuan, Xiaojie, Koenig, Christian, Zhang, Hawking
[-- Attachment #1.1: Type: text/plain, Size: 3128 bytes --]
[AMD Official Use Only - Internal Distribution Only]
Please fix your git setup to use your name rather than "root" as the author.
Alex
________________________________
From: Liu ChengZhe <ChengZhe.Liu@amd.com>
Sent: Monday, July 27, 2020 6:57 AM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Tuikov, Luben <Luben.Tuikov@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Xiao, Jack <Jack.Xiao@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Xu, Feifei <Feifei.Xu@amd.com>; Wang, Kevin(Yang) <Kevin1.Wang@amd.com>; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>; Liu, Cheng Zhe <ChengZhe.Liu@amd.com>
Subject: [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV
From: root <ChengZhe.Liu@amd.com>
1. For Navi12, CHIP_SIENNA_CICHLID, skip tmr load operation;
2. Check pointer before release firmware.
Signed-off-by: root <ChengZhe.Liu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 40 +++++++++++++++++++++----
1 file changed, 34 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index a053b7af0680..a9481e112cb3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -193,12 +193,18 @@ static int psp_sw_fini(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
psp_memory_training_fini(&adev->psp);
- release_firmware(adev->psp.sos_fw);
- adev->psp.sos_fw = NULL;
- release_firmware(adev->psp.asd_fw);
- adev->psp.asd_fw = NULL;
- release_firmware(adev->psp.ta_fw);
- adev->psp.ta_fw = NULL;
+ if (adev->psp.sos_fw) {
+ release_firmware(adev->psp.sos_fw);
+ adev->psp.sos_fw = NULL;
+ }
+ if (adev->psp.asd_fw) {
+ release_firmware(adev->psp.asd_fw);
+ adev->psp.asd_fw = NULL;
+ }
+ if (adev->psp.ta_fw) {
+ release_firmware(adev->psp.ta_fw);
+ adev->psp.ta_fw = NULL;
+ }
if (adev->asic_type == CHIP_NAVI10)
psp_sysfs_fini(adev);
@@ -409,11 +415,33 @@ static int psp_clear_vf_fw(struct psp_context *psp)
return ret;
}
+static bool psp_skip_tmr(struct psp_context *psp)
+{
+ bool ret = false;
+
+ switch (psp->adev->asic_type) {
+ case CHIP_NAVI12:
+ case CHIP_SIENNA_CICHLID:
+ ret = true;
+ break;
+ default:
+ return false;
+ }
+
+ return ret;
+}
+
static int psp_tmr_load(struct psp_context *psp)
{
int ret;
struct psp_gfx_cmd_resp *cmd;
+ /* for Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not setup TMR
+ * (already setup by host driver)
+ */
+ if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
+ return 0;
+
cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
if (!cmd)
return -ENOMEM;
--
2.25.1
[-- Attachment #1.2: Type: text/html, Size: 6719 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV
@ 2020-07-27 10:57 Liu ChengZhe
2020-07-27 16:15 ` Deucher, Alexander
2020-07-27 19:13 ` Luben Tuikov
0 siblings, 2 replies; 9+ messages in thread
From: Liu ChengZhe @ 2020-07-27 10:57 UTC (permalink / raw)
To: amd-gfx
Cc: Jack Xiao, Feifei Xu, Kevin Wang, root, Tuikov Luben,
Deucher Alexander, Xiaojie Yuan, Christian König,
Hawking Zhang
From: root <ChengZhe.Liu@amd.com>
1. For Navi12, CHIP_SIENNA_CICHLID, skip tmr load operation;
2. Check pointer before release firmware.
Signed-off-by: root <ChengZhe.Liu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 40 +++++++++++++++++++++----
1 file changed, 34 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index a053b7af0680..a9481e112cb3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -193,12 +193,18 @@ static int psp_sw_fini(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
psp_memory_training_fini(&adev->psp);
- release_firmware(adev->psp.sos_fw);
- adev->psp.sos_fw = NULL;
- release_firmware(adev->psp.asd_fw);
- adev->psp.asd_fw = NULL;
- release_firmware(adev->psp.ta_fw);
- adev->psp.ta_fw = NULL;
+ if (adev->psp.sos_fw) {
+ release_firmware(adev->psp.sos_fw);
+ adev->psp.sos_fw = NULL;
+ }
+ if (adev->psp.asd_fw) {
+ release_firmware(adev->psp.asd_fw);
+ adev->psp.asd_fw = NULL;
+ }
+ if (adev->psp.ta_fw) {
+ release_firmware(adev->psp.ta_fw);
+ adev->psp.ta_fw = NULL;
+ }
if (adev->asic_type == CHIP_NAVI10)
psp_sysfs_fini(adev);
@@ -409,11 +415,33 @@ static int psp_clear_vf_fw(struct psp_context *psp)
return ret;
}
+static bool psp_skip_tmr(struct psp_context *psp)
+{
+ bool ret = false;
+
+ switch (psp->adev->asic_type) {
+ case CHIP_NAVI12:
+ case CHIP_SIENNA_CICHLID:
+ ret = true;
+ break;
+ default:
+ return false;
+ }
+
+ return ret;
+}
+
static int psp_tmr_load(struct psp_context *psp)
{
int ret;
struct psp_gfx_cmd_resp *cmd;
+ /* for Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not setup TMR
+ * (already setup by host driver)
+ */
+ if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))
+ return 0;
+
cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
if (!cmd)
return -ENOMEM;
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-07-29 14:15 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-29 8:23 [PATCH 1/2] drm amdgpu: Skip tmr load for SRIOV Liu ChengZhe
2020-07-29 14:14 ` Luben Tuikov
-- strict thread matches above, loose matches on Subject: below --
2020-07-28 5:36 Liu ChengZhe
2020-07-28 18:12 ` Luben Tuikov
2020-07-28 5:12 Liu ChengZhe
2020-07-28 18:10 ` Luben Tuikov
2020-07-27 10:57 Liu ChengZhe
2020-07-27 16:15 ` Deucher, Alexander
2020-07-27 19:13 ` Luben Tuikov
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