From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Rob Herring" <robh+dt@kernel.org>,
"Andreas Färber" <afaerber@suse.de>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-actions@lists.infradead.org
Subject: [PATCH 05/10] arm: dts: owl-s500: Add pinctrl node
Date: Fri, 26 Jun 2020 02:34:17 +0300 [thread overview]
Message-ID: <b43c9d1a1ef689403bc17b2474aff20629b58263.1593124368.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1593124368.git.cristian.ciocaltea@gmail.com>
Add pinctrl node for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
arch/arm/boot/dts/owl-s500.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 0b7ba2926f0e..3b625358d786 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -6,6 +6,7 @@
*/
#include <dt-bindings/clock/actions,s500-cmu.h>
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/owl-s500-powergate.h>
#include <dt-bindings/reset/actions,s500-reset.h>
@@ -208,6 +209,25 @@ sps: power-controller@b01b0100 {
#power-domain-cells = <1>;
};
+ pinctrl: pinctrl@b01b0000 {
+ compatible = "actions,s500-pinctrl";
+ reg = <0xb01b0000 0x40>, /* GPIO */
+ <0xb01b0040 0x10>,
+ <0xb01b0060 0x18>,
+ <0xb01b0080 0xc>;
+ clocks = <&cmu CLK_GPIO>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 132>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* GPIOA */
+ <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* GPIOB */
+ <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* GPIOC */
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, /* GPIOD */
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; /* GPIOE */
+ };
+
dma: dma-controller@b0260000 {
compatible = "actions,s900-dma";
reg = <0xb0260000 0xd00>;
--
2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Rob Herring" <robh+dt@kernel.org>,
"Andreas Färber" <afaerber@suse.de>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>
Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 05/10] arm: dts: owl-s500: Add pinctrl node
Date: Fri, 26 Jun 2020 02:34:17 +0300 [thread overview]
Message-ID: <b43c9d1a1ef689403bc17b2474aff20629b58263.1593124368.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1593124368.git.cristian.ciocaltea@gmail.com>
Add pinctrl node for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
arch/arm/boot/dts/owl-s500.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 0b7ba2926f0e..3b625358d786 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -6,6 +6,7 @@
*/
#include <dt-bindings/clock/actions,s500-cmu.h>
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/owl-s500-powergate.h>
#include <dt-bindings/reset/actions,s500-reset.h>
@@ -208,6 +209,25 @@ sps: power-controller@b01b0100 {
#power-domain-cells = <1>;
};
+ pinctrl: pinctrl@b01b0000 {
+ compatible = "actions,s500-pinctrl";
+ reg = <0xb01b0000 0x40>, /* GPIO */
+ <0xb01b0040 0x10>,
+ <0xb01b0060 0x18>,
+ <0xb01b0080 0xc>;
+ clocks = <&cmu CLK_GPIO>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 132>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* GPIOA */
+ <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* GPIOB */
+ <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* GPIOC */
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, /* GPIOD */
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; /* GPIOE */
+ };
+
dma: dma-controller@b0260000 {
compatible = "actions,s900-dma";
reg = <0xb0260000 0xd00>;
--
2.27.0
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next prev parent reply other threads:[~2020-06-25 23:35 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-25 23:34 [PATCH 00/10] Add CMU/RMU/DMA/MMC/I2C support for Actions Semi S500 SoCs Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 01/10] arm: dts: owl-s500: Add Clock Management Unit Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 02/10] arm: dts: owl-s500: Set UART clock refs from CMU Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 03/10] arm: dts: owl-s500: Add DMA controller Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 04/10] arm: dts: owl-s500: Add Reset Controller support Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea [this message]
2020-06-25 23:34 ` [PATCH 05/10] arm: dts: owl-s500: Add pinctrl node Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 06/10] arm: dts: owl-s500: Add MMC nodes Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 07/10] arm: dts: owl-s500: Add I2C nodes Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 08/10] arm: dts: owl-s500-roseapplepi: Use UART clock from CMU Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 09/10] arm: dts: owl-s500-roseapplepi: Add uSD support Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea
2020-06-25 23:34 ` [PATCH 10/10] arm: dts: owl-s500-roseapplepi: Enable I2C0 Cristian Ciocaltea
2020-06-25 23:34 ` Cristian Ciocaltea
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