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From: Johan Jonker <jbx6244@gmail.com>
To: Jon Lin <jon.lin@rock-chips.com>, linux-spi@vger.kernel.org
Cc: broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de,
	hjc@rock-chips.com, yifeng.zhao@rock-chips.com,
	sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, p.yadav@ti.com,
	macroalpha82@gmail.com, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Chris Morgan <macromorgan@hotmail.com>
Subject: Re: [PATCH v6 5/8] arm: dts: rockchip: Add SFC to RK3036
Date: Tue, 8 Jun 2021 20:39:23 +0200	[thread overview]
Message-ID: <b5f29e1c-f4ec-7a08-a97c-8a516ba6649a@gmail.com> (raw)
In-Reply-To: <20210608023305.25371-1-jon.lin@rock-chips.com>



On 6/8/21 4:33 AM, Jon Lin wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
> 
> Add a devicetree entry for the Rockchip SFC for the RK3036 SOC.
> 
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
> ---
> 
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> Changes in v1: None
> 
>  arch/arm/boot/dts/rk3036.dtsi | 42 +++++++++++++++++++++++++++++++++++
>  1 file changed, 42 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
> index e24230d50a78..e7faf815ca74 100644
> --- a/arch/arm/boot/dts/rk3036.dtsi
> +++ b/arch/arm/boot/dts/rk3036.dtsi
> @@ -206,6 +206,17 @@
>  		status = "disabled";
>  	};
>  
> +	sfc: spi@10208000 {
> +		compatible = "rockchip,rk3036-sfc";
> +		reg = <0x10208000 0x4000>;
> +		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&cru HCLK_SFC>, <&cru SCLK_SFC>;
> +		clock-names = "hclk_sfc", "clk_sfc";
> +		pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
> +		pinctrl-names = "default";
> +		status = "disabled";
> +	};
> +
>  	sdmmc: mmc@10214000 {
>  		compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
>  		reg = <0x10214000 0x4000>;
> @@ -684,6 +695,37 @@
>  			};
>  		};
>  

> +		serial_flash {

sfc {

Nodes are sort alphabetically.
Sort other patches with sfc nodes in this serie as well.
Maybe rename nodename consistent with sfc label?
Similar to nfc nodes?

> +			sfc_bus4: sfc-bus4 {
> +				rockchip,pins =

> +					<1 RK_PD0 3 &pcfg_pull_none>,
> +					<1 RK_PD1 3 &pcfg_pull_none>,
> +					<1 RK_PD2 3 &pcfg_pull_none>,
> +					<1 RK_PD3 3 &pcfg_pull_none>;

Keep align with the rest in the pinctrl node.
Check that in other sfc patches as well.

> +			};
> +
> +			sfc_bus2: sfc-bus2 {
> +				rockchip,pins =

> +					<1 RK_PD0 3 &pcfg_pull_none>,
> +					<1 RK_PD1 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_cs0: sfc-cs0 {
> +				rockchip,pins =

> +					<2 RK_PA2 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_cs1: sfc-cs1 {
> +				rockchip,pins =

> +					<2 RK_PA3 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_clk: sfc-clk {
> +				rockchip,pins =

> +					<2 RK_PA4 3 &pcfg_pull_none>;

dito

> +			};
> +		};
> +
>  		emac {
>  			emac_xfer: emac-xfer {
>  				rockchip,pins = <2 RK_PB2 1 &pcfg_pull_default>, /* crs_dvalid */
> 

WARNING: multiple messages have this Message-ID (diff)
From: Johan Jonker <jbx6244@gmail.com>
To: Jon Lin <jon.lin@rock-chips.com>, linux-spi@vger.kernel.org
Cc: broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de,
	hjc@rock-chips.com, yifeng.zhao@rock-chips.com,
	sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, p.yadav@ti.com,
	macroalpha82@gmail.com, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Chris Morgan <macromorgan@hotmail.com>
Subject: Re: [PATCH v6 5/8] arm: dts: rockchip: Add SFC to RK3036
Date: Tue, 8 Jun 2021 20:39:23 +0200	[thread overview]
Message-ID: <b5f29e1c-f4ec-7a08-a97c-8a516ba6649a@gmail.com> (raw)
In-Reply-To: <20210608023305.25371-1-jon.lin@rock-chips.com>



On 6/8/21 4:33 AM, Jon Lin wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
> 
> Add a devicetree entry for the Rockchip SFC for the RK3036 SOC.
> 
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
> ---
> 
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> Changes in v1: None
> 
>  arch/arm/boot/dts/rk3036.dtsi | 42 +++++++++++++++++++++++++++++++++++
>  1 file changed, 42 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
> index e24230d50a78..e7faf815ca74 100644
> --- a/arch/arm/boot/dts/rk3036.dtsi
> +++ b/arch/arm/boot/dts/rk3036.dtsi
> @@ -206,6 +206,17 @@
>  		status = "disabled";
>  	};
>  
> +	sfc: spi@10208000 {
> +		compatible = "rockchip,rk3036-sfc";
> +		reg = <0x10208000 0x4000>;
> +		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&cru HCLK_SFC>, <&cru SCLK_SFC>;
> +		clock-names = "hclk_sfc", "clk_sfc";
> +		pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
> +		pinctrl-names = "default";
> +		status = "disabled";
> +	};
> +
>  	sdmmc: mmc@10214000 {
>  		compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
>  		reg = <0x10214000 0x4000>;
> @@ -684,6 +695,37 @@
>  			};
>  		};
>  

> +		serial_flash {

sfc {

Nodes are sort alphabetically.
Sort other patches with sfc nodes in this serie as well.
Maybe rename nodename consistent with sfc label?
Similar to nfc nodes?

> +			sfc_bus4: sfc-bus4 {
> +				rockchip,pins =

> +					<1 RK_PD0 3 &pcfg_pull_none>,
> +					<1 RK_PD1 3 &pcfg_pull_none>,
> +					<1 RK_PD2 3 &pcfg_pull_none>,
> +					<1 RK_PD3 3 &pcfg_pull_none>;

Keep align with the rest in the pinctrl node.
Check that in other sfc patches as well.

> +			};
> +
> +			sfc_bus2: sfc-bus2 {
> +				rockchip,pins =

> +					<1 RK_PD0 3 &pcfg_pull_none>,
> +					<1 RK_PD1 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_cs0: sfc-cs0 {
> +				rockchip,pins =

> +					<2 RK_PA2 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_cs1: sfc-cs1 {
> +				rockchip,pins =

> +					<2 RK_PA3 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_clk: sfc-clk {
> +				rockchip,pins =

> +					<2 RK_PA4 3 &pcfg_pull_none>;

dito

> +			};
> +		};
> +
>  		emac {
>  			emac_xfer: emac-xfer {
>  				rockchip,pins = <2 RK_PB2 1 &pcfg_pull_default>, /* crs_dvalid */
> 

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Johan Jonker <jbx6244@gmail.com>
To: Jon Lin <jon.lin@rock-chips.com>, linux-spi@vger.kernel.org
Cc: broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de,
	hjc@rock-chips.com, yifeng.zhao@rock-chips.com,
	sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, p.yadav@ti.com,
	macroalpha82@gmail.com, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Chris Morgan <macromorgan@hotmail.com>
Subject: Re: [PATCH v6 5/8] arm: dts: rockchip: Add SFC to RK3036
Date: Tue, 8 Jun 2021 20:39:23 +0200	[thread overview]
Message-ID: <b5f29e1c-f4ec-7a08-a97c-8a516ba6649a@gmail.com> (raw)
In-Reply-To: <20210608023305.25371-1-jon.lin@rock-chips.com>



On 6/8/21 4:33 AM, Jon Lin wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
> 
> Add a devicetree entry for the Rockchip SFC for the RK3036 SOC.
> 
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
> ---
> 
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> Changes in v1: None
> 
>  arch/arm/boot/dts/rk3036.dtsi | 42 +++++++++++++++++++++++++++++++++++
>  1 file changed, 42 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
> index e24230d50a78..e7faf815ca74 100644
> --- a/arch/arm/boot/dts/rk3036.dtsi
> +++ b/arch/arm/boot/dts/rk3036.dtsi
> @@ -206,6 +206,17 @@
>  		status = "disabled";
>  	};
>  
> +	sfc: spi@10208000 {
> +		compatible = "rockchip,rk3036-sfc";
> +		reg = <0x10208000 0x4000>;
> +		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&cru HCLK_SFC>, <&cru SCLK_SFC>;
> +		clock-names = "hclk_sfc", "clk_sfc";
> +		pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
> +		pinctrl-names = "default";
> +		status = "disabled";
> +	};
> +
>  	sdmmc: mmc@10214000 {
>  		compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
>  		reg = <0x10214000 0x4000>;
> @@ -684,6 +695,37 @@
>  			};
>  		};
>  

> +		serial_flash {

sfc {

Nodes are sort alphabetically.
Sort other patches with sfc nodes in this serie as well.
Maybe rename nodename consistent with sfc label?
Similar to nfc nodes?

> +			sfc_bus4: sfc-bus4 {
> +				rockchip,pins =

> +					<1 RK_PD0 3 &pcfg_pull_none>,
> +					<1 RK_PD1 3 &pcfg_pull_none>,
> +					<1 RK_PD2 3 &pcfg_pull_none>,
> +					<1 RK_PD3 3 &pcfg_pull_none>;

Keep align with the rest in the pinctrl node.
Check that in other sfc patches as well.

> +			};
> +
> +			sfc_bus2: sfc-bus2 {
> +				rockchip,pins =

> +					<1 RK_PD0 3 &pcfg_pull_none>,
> +					<1 RK_PD1 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_cs0: sfc-cs0 {
> +				rockchip,pins =

> +					<2 RK_PA2 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_cs1: sfc-cs1 {
> +				rockchip,pins =

> +					<2 RK_PA3 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_clk: sfc-clk {
> +				rockchip,pins =

> +					<2 RK_PA4 3 &pcfg_pull_none>;

dito

> +			};
> +		};
> +
>  		emac {
>  			emac_xfer: emac-xfer {
>  				rockchip,pins = <2 RK_PB2 1 &pcfg_pull_default>, /* crs_dvalid */
> 

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Johan Jonker <jbx6244@gmail.com>
To: Jon Lin <jon.lin@rock-chips.com>, linux-spi@vger.kernel.org
Cc: broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de,
	hjc@rock-chips.com, yifeng.zhao@rock-chips.com,
	sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, p.yadav@ti.com,
	macroalpha82@gmail.com, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Chris Morgan <macromorgan@hotmail.com>
Subject: Re: [PATCH v6 5/8] arm: dts: rockchip: Add SFC to RK3036
Date: Tue, 8 Jun 2021 20:39:23 +0200	[thread overview]
Message-ID: <b5f29e1c-f4ec-7a08-a97c-8a516ba6649a@gmail.com> (raw)
In-Reply-To: <20210608023305.25371-1-jon.lin@rock-chips.com>



On 6/8/21 4:33 AM, Jon Lin wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
> 
> Add a devicetree entry for the Rockchip SFC for the RK3036 SOC.
> 
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
> ---
> 
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> Changes in v1: None
> 
>  arch/arm/boot/dts/rk3036.dtsi | 42 +++++++++++++++++++++++++++++++++++
>  1 file changed, 42 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
> index e24230d50a78..e7faf815ca74 100644
> --- a/arch/arm/boot/dts/rk3036.dtsi
> +++ b/arch/arm/boot/dts/rk3036.dtsi
> @@ -206,6 +206,17 @@
>  		status = "disabled";
>  	};
>  
> +	sfc: spi@10208000 {
> +		compatible = "rockchip,rk3036-sfc";
> +		reg = <0x10208000 0x4000>;
> +		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&cru HCLK_SFC>, <&cru SCLK_SFC>;
> +		clock-names = "hclk_sfc", "clk_sfc";
> +		pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
> +		pinctrl-names = "default";
> +		status = "disabled";
> +	};
> +
>  	sdmmc: mmc@10214000 {
>  		compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
>  		reg = <0x10214000 0x4000>;
> @@ -684,6 +695,37 @@
>  			};
>  		};
>  

> +		serial_flash {

sfc {

Nodes are sort alphabetically.
Sort other patches with sfc nodes in this serie as well.
Maybe rename nodename consistent with sfc label?
Similar to nfc nodes?

> +			sfc_bus4: sfc-bus4 {
> +				rockchip,pins =

> +					<1 RK_PD0 3 &pcfg_pull_none>,
> +					<1 RK_PD1 3 &pcfg_pull_none>,
> +					<1 RK_PD2 3 &pcfg_pull_none>,
> +					<1 RK_PD3 3 &pcfg_pull_none>;

Keep align with the rest in the pinctrl node.
Check that in other sfc patches as well.

> +			};
> +
> +			sfc_bus2: sfc-bus2 {
> +				rockchip,pins =

> +					<1 RK_PD0 3 &pcfg_pull_none>,
> +					<1 RK_PD1 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_cs0: sfc-cs0 {
> +				rockchip,pins =

> +					<2 RK_PA2 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_cs1: sfc-cs1 {
> +				rockchip,pins =

> +					<2 RK_PA3 3 &pcfg_pull_none>;

dito

> +			};
> +
> +			sfc_clk: sfc-clk {
> +				rockchip,pins =

> +					<2 RK_PA4 3 &pcfg_pull_none>;

dito

> +			};
> +		};
> +
>  		emac {
>  			emac_xfer: emac-xfer {
>  				rockchip,pins = <2 RK_PB2 1 &pcfg_pull_default>, /* crs_dvalid */
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-06-08 18:47 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-08  2:26 [PATCH v6 0/8] Add Rockchip SFC(serial flash controller) support Jon Lin
2021-06-08  2:26 ` Jon Lin
2021-06-08  2:26 ` Jon Lin
2021-06-08  2:26 ` Jon Lin
2021-06-08  2:26 ` [PATCH v6 1/8] dt-bindings: rockchip-sfc: Bindings for Rockchip serial flash controller Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-08 18:03   ` Johan Jonker
2021-06-08 18:03     ` Johan Jonker
2021-06-08 18:03     ` Johan Jonker
2021-06-08 18:03     ` Johan Jonker
2021-06-09  3:50     ` Jon Lin
2021-06-09  3:50       ` Jon Lin
2021-06-09  3:50       ` Jon Lin
2021-06-09  3:50       ` Jon Lin
2021-06-09  7:13       ` Johan Jonker
2021-06-09  7:13         ` Johan Jonker
2021-06-09  7:13         ` Johan Jonker
2021-06-09  7:13         ` Johan Jonker
2021-06-08 20:50   ` Rob Herring
2021-06-08 20:50     ` Rob Herring
2021-06-08 20:50     ` Rob Herring
2021-06-08 20:50     ` Rob Herring
2021-06-08  2:26 ` [PATCH v6 2/8] spi: rockchip-sfc: add rockchip " Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-09  2:36   ` Chris Morgan
2021-06-09  2:36     ` Chris Morgan
2021-06-09  2:36     ` Chris Morgan
2021-06-09  2:36     ` Chris Morgan
2021-06-09 13:48     ` Jon Lin
2021-06-09 13:48       ` Jon Lin
2021-06-09 13:48       ` Jon Lin
2021-06-09 13:48       ` Jon Lin
2021-06-09 16:57       ` Chris Morgan
2021-06-09 16:57         ` Chris Morgan
2021-06-09 16:57         ` Chris Morgan
2021-06-09 16:57         ` Chris Morgan
2021-06-08  2:26 ` [PATCH v6 3/8] arm64: dts: rockchip: Add SFC to PX30 Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-08  2:26 ` [PATCH v6 4/8] clk: rockchip: Add support for hclk_sfc on rk3036 Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-08  2:26   ` Jon Lin
2021-06-08 16:31   ` Johan Jonker
2021-06-08 16:31     ` Johan Jonker
2021-06-08 16:31     ` Johan Jonker
2021-06-08 16:31     ` Johan Jonker
2021-06-09 14:18     ` Jon Lin
2021-06-09 14:18       ` Jon Lin
2021-06-09 14:18       ` Jon Lin
2021-06-09 14:18       ` Jon Lin
2021-06-09 14:23     ` Jon Lin
2021-06-09 14:23       ` Jon Lin
2021-06-09 14:23       ` Jon Lin
2021-06-09 14:23       ` Jon Lin
2021-06-08  2:33 ` [PATCH v6 5/8] arm: dts: rockchip: Add SFC to RK3036 Jon Lin
2021-06-08  2:33   ` Jon Lin
2021-06-08  2:33   ` Jon Lin
2021-06-08  2:33   ` Jon Lin
2021-06-08  2:33   ` [PATCH v6 6/8] arm: dts: rockchip: Add SFC to RV1108 Jon Lin
2021-06-08  2:33     ` Jon Lin
2021-06-08  2:33     ` Jon Lin
2021-06-08  2:33     ` Jon Lin
2021-06-08  2:33   ` [PATCH v6 7/8] arm64: dts: rockchip: Add SFC to RK3308 Jon Lin
2021-06-08  2:33     ` Jon Lin
2021-06-08  2:33     ` Jon Lin
2021-06-08  2:33     ` Jon Lin
2021-06-08  2:33   ` [PATCH v6 8/8] arm64: dts: rockchip: Enable SFC for Odroid Go Advance Jon Lin
2021-06-08  2:33     ` Jon Lin
2021-06-08  2:33     ` Jon Lin
2021-06-08  2:33     ` Jon Lin
2021-06-08 18:39   ` Johan Jonker [this message]
2021-06-08 18:39     ` [PATCH v6 5/8] arm: dts: rockchip: Add SFC to RK3036 Johan Jonker
2021-06-08 18:39     ` Johan Jonker
2021-06-08 18:39     ` Johan Jonker

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