From: Jan Beulich <jbeulich@suse.com>
To: Juergen Gross <jgross@suse.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
"H. Peter Anvin" <hpa@zytor.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Jani Nikula <jani.nikula@linux.intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
xen-devel@lists.xenproject.org, x86@kernel.org,
linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 2/2] x86/pat: add functions to query specific cache mode availability
Date: Wed, 4 May 2022 11:51:17 +0200 [thread overview]
Message-ID: <b73fd351-7b1e-564e-28ca-0eeb68e52773@suse.com> (raw)
In-Reply-To: <0dcb05d0-108f-6252-e768-f75b393a7f5c@suse.com>
On 04.05.2022 11:14, Juergen Gross wrote:
> On 04.05.22 10:31, Jan Beulich wrote:
>> On 03.05.2022 15:22, Juergen Gross wrote:
>>> Some drivers are using pat_enabled() in order to test availability of
>>> special caching modes (WC and UC-). This will lead to false negatives
>>> in case the system was booted e.g. with the "nopat" variant and the
>>> BIOS did setup the PAT MSR supporting the queried mode, or if the
>>> system is running as a Xen PV guest.
>>
>> While, as per my earlier patch, I agree with the Xen PV case, I'm not
>> convinced "nopat" is supposed to honor firmware-provided settings. In
>> fact in my patch I did arrange for "nopat" to also take effect under
>> Xen PV.
>
> Depends on what the wanted semantics for "nopat" are.
>
> Right now "nopat" will result in the PAT MSR left unchanged and the
> cache mode translation tables be initialized accordingly.
>
> So does "nopat" mean that the PAT MSR shouldn't be changed, or that
> PAGE_BIT_PAT will never be set?
According to the documentation for the option ("Disable PAT (page
attribute table extension of pagetables) support") I'd say the latter.
Jan
WARNING: multiple messages have this Message-ID (diff)
From: Jan Beulich <jbeulich@suse.com>
To: Juergen Gross <jgross@suse.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>,
intel-gfx@lists.freedesktop.org,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, linux-kernel@vger.kernel.org,
David Airlie <airlied@linux.ie>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
dri-devel@lists.freedesktop.org,
Andy Lutomirski <luto@kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
xen-devel@lists.xenproject.org,
Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [PATCH 2/2] x86/pat: add functions to query specific cache mode availability
Date: Wed, 4 May 2022 11:51:17 +0200 [thread overview]
Message-ID: <b73fd351-7b1e-564e-28ca-0eeb68e52773@suse.com> (raw)
In-Reply-To: <0dcb05d0-108f-6252-e768-f75b393a7f5c@suse.com>
On 04.05.2022 11:14, Juergen Gross wrote:
> On 04.05.22 10:31, Jan Beulich wrote:
>> On 03.05.2022 15:22, Juergen Gross wrote:
>>> Some drivers are using pat_enabled() in order to test availability of
>>> special caching modes (WC and UC-). This will lead to false negatives
>>> in case the system was booted e.g. with the "nopat" variant and the
>>> BIOS did setup the PAT MSR supporting the queried mode, or if the
>>> system is running as a Xen PV guest.
>>
>> While, as per my earlier patch, I agree with the Xen PV case, I'm not
>> convinced "nopat" is supposed to honor firmware-provided settings. In
>> fact in my patch I did arrange for "nopat" to also take effect under
>> Xen PV.
>
> Depends on what the wanted semantics for "nopat" are.
>
> Right now "nopat" will result in the PAT MSR left unchanged and the
> cache mode translation tables be initialized accordingly.
>
> So does "nopat" mean that the PAT MSR shouldn't be changed, or that
> PAGE_BIT_PAT will never be set?
According to the documentation for the option ("Disable PAT (page
attribute table extension of pagetables) support") I'd say the latter.
Jan
WARNING: multiple messages have this Message-ID (diff)
From: Jan Beulich <jbeulich@suse.com>
To: Juergen Gross <jgross@suse.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
intel-gfx@lists.freedesktop.org,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, linux-kernel@vger.kernel.org,
David Airlie <airlied@linux.ie>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
dri-devel@lists.freedesktop.org,
Andy Lutomirski <luto@kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
xen-devel@lists.xenproject.org,
Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [Intel-gfx] [PATCH 2/2] x86/pat: add functions to query specific cache mode availability
Date: Wed, 4 May 2022 11:51:17 +0200 [thread overview]
Message-ID: <b73fd351-7b1e-564e-28ca-0eeb68e52773@suse.com> (raw)
In-Reply-To: <0dcb05d0-108f-6252-e768-f75b393a7f5c@suse.com>
On 04.05.2022 11:14, Juergen Gross wrote:
> On 04.05.22 10:31, Jan Beulich wrote:
>> On 03.05.2022 15:22, Juergen Gross wrote:
>>> Some drivers are using pat_enabled() in order to test availability of
>>> special caching modes (WC and UC-). This will lead to false negatives
>>> in case the system was booted e.g. with the "nopat" variant and the
>>> BIOS did setup the PAT MSR supporting the queried mode, or if the
>>> system is running as a Xen PV guest.
>>
>> While, as per my earlier patch, I agree with the Xen PV case, I'm not
>> convinced "nopat" is supposed to honor firmware-provided settings. In
>> fact in my patch I did arrange for "nopat" to also take effect under
>> Xen PV.
>
> Depends on what the wanted semantics for "nopat" are.
>
> Right now "nopat" will result in the PAT MSR left unchanged and the
> cache mode translation tables be initialized accordingly.
>
> So does "nopat" mean that the PAT MSR shouldn't be changed, or that
> PAGE_BIT_PAT will never be set?
According to the documentation for the option ("Disable PAT (page
attribute table extension of pagetables) support") I'd say the latter.
Jan
next prev parent reply other threads:[~2022-05-04 9:51 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-03 13:22 [PATCH 0/2] x86/pat: fix querying available caching modes Juergen Gross
2022-05-03 13:22 ` [Intel-gfx] " Juergen Gross
2022-05-03 13:22 ` Juergen Gross
2022-05-03 13:22 ` [PATCH 1/2] x86/pat: fix x86_has_pat_wp() Juergen Gross
2022-05-27 10:21 ` Juergen Gross
2022-06-14 15:09 ` Juergen Gross
2022-06-20 5:22 ` Thorsten Leemhuis
2022-06-20 5:30 ` Juergen Gross
2022-06-20 6:15 ` Thorsten Leemhuis
2022-06-20 10:26 ` Borislav Petkov
2022-06-20 10:41 ` Juergen Gross
2022-06-20 15:27 ` Dave Hansen
2022-06-20 15:34 ` Juergen Gross
2022-05-03 13:22 ` [PATCH 2/2] x86/pat: add functions to query specific cache mode availability Juergen Gross
2022-05-03 13:22 ` [Intel-gfx] " Juergen Gross
2022-05-03 13:22 ` Juergen Gross
2022-05-04 8:31 ` Jan Beulich
2022-05-04 8:31 ` [Intel-gfx] " Jan Beulich
2022-05-04 8:31 ` Jan Beulich
2022-05-04 9:14 ` Juergen Gross
2022-05-04 9:14 ` [Intel-gfx] " Juergen Gross
2022-05-04 9:14 ` Juergen Gross
2022-05-04 9:51 ` Jan Beulich [this message]
2022-05-04 9:51 ` [Intel-gfx] " Jan Beulich
2022-05-04 9:51 ` Jan Beulich
2022-05-20 4:43 ` Chuck Zmudzinski
2022-05-20 4:43 ` Chuck Zmudzinski
2022-05-20 5:56 ` Chuck Zmudzinski
2022-05-20 5:56 ` Chuck Zmudzinski
2022-05-20 6:05 ` Jan Beulich
2022-05-20 6:05 ` Jan Beulich
2022-05-20 6:59 ` Chuck Zmudzinski
2022-05-20 6:59 ` Chuck Zmudzinski
2022-05-20 8:30 ` Chuck Zmudzinski
2022-05-20 8:30 ` Chuck Zmudzinski
2022-05-20 9:41 ` Jan Beulich
2022-05-20 9:41 ` Jan Beulich
2022-05-20 13:33 ` Chuck Zmudzinski
2022-05-20 13:33 ` Chuck Zmudzinski
2022-05-20 14:06 ` Jan Beulich
2022-05-20 14:06 ` Jan Beulich
2022-05-20 14:48 ` Chuck Zmudzinski
2022-05-20 14:48 ` Chuck Zmudzinski
2022-05-21 10:47 ` Thorsten Leemhuis
2022-05-21 10:47 ` [Intel-gfx] " Thorsten Leemhuis
2022-05-21 10:47 ` Thorsten Leemhuis
2022-05-24 18:32 ` Chuck Zmudzinski
2022-05-24 18:32 ` [Intel-gfx] " Chuck Zmudzinski
2022-05-24 18:32 ` Chuck Zmudzinski
2022-05-25 7:45 ` [Intel-gfx] " Thorsten Leemhuis
2022-05-25 7:45 ` Thorsten Leemhuis
2022-05-25 7:45 ` Thorsten Leemhuis
2022-05-25 8:04 ` Juergen Gross
2022-05-25 8:04 ` [Intel-gfx] " Juergen Gross
2022-05-25 8:04 ` Juergen Gross
2022-05-25 8:37 ` Jan Beulich
2022-05-25 8:37 ` Jan Beulich
2022-05-25 8:51 ` Thorsten Leemhuis
2022-05-25 8:51 ` [Intel-gfx] " Thorsten Leemhuis
2022-05-25 8:51 ` Thorsten Leemhuis
2022-05-25 19:25 ` Chuck Zmudzinski
2022-05-25 19:25 ` [Intel-gfx] " Chuck Zmudzinski
2022-05-25 19:25 ` Chuck Zmudzinski
2022-05-20 15:46 ` [REGRESSION} " Chuck Zmudzinski
2022-05-20 15:46 ` Chuck Zmudzinski
2022-05-20 17:13 ` Chuck Zmudzinski
2022-05-20 17:13 ` Chuck Zmudzinski
2022-05-20 17:17 ` Chuck Zmudzinski
2022-05-20 17:17 ` Chuck Zmudzinski
2022-05-18 13:45 ` Christoph Hellwig
2022-05-18 13:45 ` [Intel-gfx] " Christoph Hellwig
2022-05-20 2:15 ` Chuck Zmudzinski
2022-05-20 2:15 ` Chuck Zmudzinski
2022-05-20 2:21 ` Chuck Zmudzinski
2022-05-20 2:21 ` Chuck Zmudzinski
2022-05-21 13:24 ` Chuck Zmudzinski
2022-05-21 13:24 ` Chuck Zmudzinski
2022-07-11 9:46 ` [tip: x86/urgent] x86/pat: Fix x86_has_pat_wp() tip-bot2 for Juergen Gross
2022-07-13 10:45 ` tip-bot2 for Juergen Gross
2022-07-13 10:52 ` tip-bot2 for Juergen Gross
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