All of lore.kernel.org
 help / color / mirror / Atom feed
From: Vidya Sagar <vidyas@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: lorenzo.pieralisi@arm.com, bhelgaas@google.com,
	robh+dt@kernel.org, mark.rutland@arm.com, jonathanh@nvidia.com,
	kishon@ti.com, catalin.marinas@arm.com, will.deacon@arm.com,
	jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
	mperttunen@nvidia.com, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kthota@nvidia.com,
	mmaddireddy@nvidia.com, sagar.tv@gmail.com
Subject: Re: [PATCH V5 02/16] PCI/PME: Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs
Date: Tue, 7 May 2019 12:40:36 +0530	[thread overview]
Message-ID: <b8f482f4-8136-07b5-3d68-f45a6fd580ba@nvidia.com> (raw)
In-Reply-To: <20190503110159.GB32400@ulmo>

On 5/3/2019 4:31 PM, Thierry Reding wrote:
> On Wed, Apr 24, 2019 at 10:49:50AM +0530, Vidya Sagar wrote:
>> Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs to enable drivers
>> using this API be able to build as loadable modules.
>>
>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>> ---
>> Changes from [v4]:
>> * None
>>
>> Changes from [v3]:
>> * None
>>
>> Changes from [v2]:
>> * Exported pcie_pme_no_msi() API after making pcie_pme_msi_disabled a static
>>
>> Changes from [v1]:
>> * This is a new patch in v2 series
>>
>>   drivers/pci/pcie/pme.c     | 14 +++++++++++++-
>>   drivers/pci/pcie/portdrv.h | 16 +++-------------
>>   2 files changed, 16 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c
>> index 54d593d10396..d5e0ea4a62fc 100644
>> --- a/drivers/pci/pcie/pme.c
>> +++ b/drivers/pci/pcie/pme.c
>> @@ -25,7 +25,19 @@
>>    * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
>>    * wake-up from system sleep states.
>>    */
>> -bool pcie_pme_msi_disabled;
>> +static bool pcie_pme_msi_disabled;
>> +
>> +void pcie_pme_disable_msi(void)
>> +{
>> +	pcie_pme_msi_disabled = true;
>> +}
>> +EXPORT_SYMBOL_GPL(pcie_pme_disable_msi);
>> +
>> +bool pcie_pme_no_msi(void)
>> +{
>> +	return pcie_pme_msi_disabled;
>> +}
>> +EXPORT_SYMBOL_GPL(pcie_pme_no_msi);
>>   
>>   static int __init pcie_pme_setup(char *str)
>>   {
>> diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h
>> index 1d50dc58ac40..7c8c3da4bd58 100644
>> --- a/drivers/pci/pcie/portdrv.h
>> +++ b/drivers/pci/pcie/portdrv.h
>> @@ -125,22 +125,12 @@ void pcie_port_bus_unregister(void);
>>   struct pci_dev;
>>   
>>   #ifdef CONFIG_PCIE_PME
>> -extern bool pcie_pme_msi_disabled;
>> -
>> -static inline void pcie_pme_disable_msi(void)
>> -{
>> -	pcie_pme_msi_disabled = true;
>> -}
>> -
>> -static inline bool pcie_pme_no_msi(void)
>> -{
>> -	return pcie_pme_msi_disabled;
>> -}
>> -
>> +void pcie_pme_disable_msi(void);
>> +bool pcie_pme_no_msi(void);
>>   void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
>>   #else /* !CONFIG_PCIE_PME */
>>   static inline void pcie_pme_disable_msi(void) {}
>> -static inline bool pcie_pme_no_msi(void) { return false; }
>> +static inline bool pcie_pme_no_msi(void) {}
> 
> This looks wrong.
Can you please give more info on what is wrong in this?

> 
> Thierry
> 

WARNING: multiple messages have this Message-ID (diff)
From: Vidya Sagar <vidyas@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
	<robh+dt@kernel.org>, <mark.rutland@arm.com>,
	<jonathanh@nvidia.com>, <kishon@ti.com>,
	<catalin.marinas@arm.com>, <will.deacon@arm.com>,
	<jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>,
	<mperttunen@nvidia.com>, <linux-pci@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
	<mmaddireddy@nvidia.com>, <sagar.tv@gmail.com>
Subject: Re: [PATCH V5 02/16] PCI/PME: Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs
Date: Tue, 7 May 2019 12:40:36 +0530	[thread overview]
Message-ID: <b8f482f4-8136-07b5-3d68-f45a6fd580ba@nvidia.com> (raw)
In-Reply-To: <20190503110159.GB32400@ulmo>

On 5/3/2019 4:31 PM, Thierry Reding wrote:
> On Wed, Apr 24, 2019 at 10:49:50AM +0530, Vidya Sagar wrote:
>> Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs to enable drivers
>> using this API be able to build as loadable modules.
>>
>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>> ---
>> Changes from [v4]:
>> * None
>>
>> Changes from [v3]:
>> * None
>>
>> Changes from [v2]:
>> * Exported pcie_pme_no_msi() API after making pcie_pme_msi_disabled a static
>>
>> Changes from [v1]:
>> * This is a new patch in v2 series
>>
>>   drivers/pci/pcie/pme.c     | 14 +++++++++++++-
>>   drivers/pci/pcie/portdrv.h | 16 +++-------------
>>   2 files changed, 16 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c
>> index 54d593d10396..d5e0ea4a62fc 100644
>> --- a/drivers/pci/pcie/pme.c
>> +++ b/drivers/pci/pcie/pme.c
>> @@ -25,7 +25,19 @@
>>    * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
>>    * wake-up from system sleep states.
>>    */
>> -bool pcie_pme_msi_disabled;
>> +static bool pcie_pme_msi_disabled;
>> +
>> +void pcie_pme_disable_msi(void)
>> +{
>> +	pcie_pme_msi_disabled = true;
>> +}
>> +EXPORT_SYMBOL_GPL(pcie_pme_disable_msi);
>> +
>> +bool pcie_pme_no_msi(void)
>> +{
>> +	return pcie_pme_msi_disabled;
>> +}
>> +EXPORT_SYMBOL_GPL(pcie_pme_no_msi);
>>   
>>   static int __init pcie_pme_setup(char *str)
>>   {
>> diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h
>> index 1d50dc58ac40..7c8c3da4bd58 100644
>> --- a/drivers/pci/pcie/portdrv.h
>> +++ b/drivers/pci/pcie/portdrv.h
>> @@ -125,22 +125,12 @@ void pcie_port_bus_unregister(void);
>>   struct pci_dev;
>>   
>>   #ifdef CONFIG_PCIE_PME
>> -extern bool pcie_pme_msi_disabled;
>> -
>> -static inline void pcie_pme_disable_msi(void)
>> -{
>> -	pcie_pme_msi_disabled = true;
>> -}
>> -
>> -static inline bool pcie_pme_no_msi(void)
>> -{
>> -	return pcie_pme_msi_disabled;
>> -}
>> -
>> +void pcie_pme_disable_msi(void);
>> +bool pcie_pme_no_msi(void);
>>   void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
>>   #else /* !CONFIG_PCIE_PME */
>>   static inline void pcie_pme_disable_msi(void) {}
>> -static inline bool pcie_pme_no_msi(void) { return false; }
>> +static inline bool pcie_pme_no_msi(void) {}
> 
> This looks wrong.
Can you please give more info on what is wrong in this?

> 
> Thierry
> 


WARNING: multiple messages have this Message-ID (diff)
From: Vidya Sagar <vidyas@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	lorenzo.pieralisi@arm.com, mperttunen@nvidia.com,
	mmaddireddy@nvidia.com, linux-pci@vger.kernel.org,
	catalin.marinas@arm.com, will.deacon@arm.com,
	linux-kernel@vger.kernel.org, kthota@nvidia.com, kishon@ti.com,
	linux-tegra@vger.kernel.org, robh+dt@kernel.org,
	gustavo.pimentel@synopsys.com, jingoohan1@gmail.com,
	bhelgaas@google.com, jonathanh@nvidia.com,
	linux-arm-kernel@lists.infradead.org, sagar.tv@gmail.com
Subject: Re: [PATCH V5 02/16] PCI/PME: Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs
Date: Tue, 7 May 2019 12:40:36 +0530	[thread overview]
Message-ID: <b8f482f4-8136-07b5-3d68-f45a6fd580ba@nvidia.com> (raw)
In-Reply-To: <20190503110159.GB32400@ulmo>

On 5/3/2019 4:31 PM, Thierry Reding wrote:
> On Wed, Apr 24, 2019 at 10:49:50AM +0530, Vidya Sagar wrote:
>> Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs to enable drivers
>> using this API be able to build as loadable modules.
>>
>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>> ---
>> Changes from [v4]:
>> * None
>>
>> Changes from [v3]:
>> * None
>>
>> Changes from [v2]:
>> * Exported pcie_pme_no_msi() API after making pcie_pme_msi_disabled a static
>>
>> Changes from [v1]:
>> * This is a new patch in v2 series
>>
>>   drivers/pci/pcie/pme.c     | 14 +++++++++++++-
>>   drivers/pci/pcie/portdrv.h | 16 +++-------------
>>   2 files changed, 16 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c
>> index 54d593d10396..d5e0ea4a62fc 100644
>> --- a/drivers/pci/pcie/pme.c
>> +++ b/drivers/pci/pcie/pme.c
>> @@ -25,7 +25,19 @@
>>    * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
>>    * wake-up from system sleep states.
>>    */
>> -bool pcie_pme_msi_disabled;
>> +static bool pcie_pme_msi_disabled;
>> +
>> +void pcie_pme_disable_msi(void)
>> +{
>> +	pcie_pme_msi_disabled = true;
>> +}
>> +EXPORT_SYMBOL_GPL(pcie_pme_disable_msi);
>> +
>> +bool pcie_pme_no_msi(void)
>> +{
>> +	return pcie_pme_msi_disabled;
>> +}
>> +EXPORT_SYMBOL_GPL(pcie_pme_no_msi);
>>   
>>   static int __init pcie_pme_setup(char *str)
>>   {
>> diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h
>> index 1d50dc58ac40..7c8c3da4bd58 100644
>> --- a/drivers/pci/pcie/portdrv.h
>> +++ b/drivers/pci/pcie/portdrv.h
>> @@ -125,22 +125,12 @@ void pcie_port_bus_unregister(void);
>>   struct pci_dev;
>>   
>>   #ifdef CONFIG_PCIE_PME
>> -extern bool pcie_pme_msi_disabled;
>> -
>> -static inline void pcie_pme_disable_msi(void)
>> -{
>> -	pcie_pme_msi_disabled = true;
>> -}
>> -
>> -static inline bool pcie_pme_no_msi(void)
>> -{
>> -	return pcie_pme_msi_disabled;
>> -}
>> -
>> +void pcie_pme_disable_msi(void);
>> +bool pcie_pme_no_msi(void);
>>   void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
>>   #else /* !CONFIG_PCIE_PME */
>>   static inline void pcie_pme_disable_msi(void) {}
>> -static inline bool pcie_pme_no_msi(void) { return false; }
>> +static inline bool pcie_pme_no_msi(void) {}
> 
> This looks wrong.
Can you please give more info on what is wrong in this?

> 
> Thierry
> 


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2019-05-07  7:10 UTC|newest]

Thread overview: 143+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-24  5:19 [PATCH V5 00/16] Add Tegra194 PCIe support Vidya Sagar
2019-04-24  5:19 ` Vidya Sagar
2019-04-24  5:19 ` Vidya Sagar
2019-04-24  5:19 ` [PATCH V5 01/16] PCI: Add #defines for some of PCIe spec r4.0 features Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19 ` [PATCH V5 02/16] PCI/PME: Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-05-03 11:01   ` Thierry Reding
2019-05-03 11:01     ` Thierry Reding
2019-05-07  7:10     ` Vidya Sagar [this message]
2019-05-07  7:10       ` Vidya Sagar
2019-05-07  7:10       ` Vidya Sagar
2019-05-07  7:51       ` Vidya Sagar
2019-05-07  7:51         ` Vidya Sagar
2019-05-07  7:51         ` Vidya Sagar
2019-04-24  5:19 ` [PATCH V5 03/16] PCI: Export pcie_bus_config symbol Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-05-03 11:07   ` Thierry Reding
2019-05-03 11:07     ` Thierry Reding
2019-05-10  6:21     ` Vidya Sagar
2019-05-10  6:21       ` Vidya Sagar
2019-05-10  6:21       ` Vidya Sagar
2019-05-10 16:46       ` Bjorn Helgaas
2019-05-10 16:46         ` Bjorn Helgaas
2019-05-10 16:46         ` Bjorn Helgaas
2019-05-10 16:46         ` Bjorn Helgaas
2019-05-10 17:50         ` Vidya Sagar
2019-05-10 17:50           ` Vidya Sagar
2019-05-10 17:50           ` Vidya Sagar
2019-04-24  5:19 ` [PATCH V5 04/16] PCI: dwc: Perform dbi regs write lock towards the end Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-05-03 11:13   ` Thierry Reding
2019-05-03 11:13     ` Thierry Reding
2019-05-07  7:49     ` Vidya Sagar
2019-05-07  7:49       ` Vidya Sagar
2019-05-07  7:49       ` Vidya Sagar
2019-04-24  5:19 ` [PATCH V5 05/16] PCI: dwc: Move config space capability search API Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  8:13   ` Gustavo Pimentel
2019-04-24  8:13     ` Gustavo Pimentel
2019-04-24  8:13     ` Gustavo Pimentel
2019-05-07  8:04     ` Vidya Sagar
2019-05-07  8:04       ` Vidya Sagar
2019-05-07  8:04       ` Vidya Sagar
2019-04-24  5:19 ` [PATCH V5 06/16] PCI: dwc: Add ext " Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19 ` [PATCH V5 07/16] dt-bindings: PCI: designware: Add binding for CDM register check Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-26 14:32   ` Rob Herring
2019-04-26 14:32     ` Rob Herring
2019-05-07  8:25     ` Vidya Sagar
2019-05-07  8:25       ` Vidya Sagar
2019-05-07  8:25       ` Vidya Sagar
2019-05-13 15:15       ` Rob Herring
2019-05-13 15:15         ` Rob Herring
2019-05-13 15:15         ` Rob Herring
2019-05-14  5:29         ` Vidya Sagar
2019-05-14  5:29           ` Vidya Sagar
2019-05-14  5:29           ` Vidya Sagar
2019-04-24  5:19 ` [PATCH V5 08/16] PCI: dwc: Add support to enable " Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19 ` [PATCH V5 09/16] Documentation/devicetree: Add PCIe supports-clkreq property Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-26 15:22   ` Rob Herring
2019-04-26 15:22     ` Rob Herring
2019-05-07  8:31     ` Vidya Sagar
2019-05-07  8:31       ` Vidya Sagar
2019-05-07  8:31       ` Vidya Sagar
2019-04-24  5:19 ` [PATCH V5 10/16] dt-bindings: PCI: tegra: Add device tree support for T194 Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-26 15:43   ` Rob Herring
2019-04-26 15:43     ` Rob Herring
2019-05-07  9:20     ` Vidya Sagar
2019-05-07  9:20       ` Vidya Sagar
2019-05-07  9:20       ` Vidya Sagar
2019-05-13 15:20       ` Rob Herring
2019-05-13 15:20         ` Rob Herring
2019-05-13 15:20         ` Rob Herring
2019-05-14  6:25         ` Vidya Sagar
2019-05-14  6:25           ` Vidya Sagar
2019-05-14  6:25           ` Vidya Sagar
2019-05-03 11:19   ` Thierry Reding
2019-05-03 11:19     ` Thierry Reding
2019-05-07  9:26     ` Vidya Sagar
2019-05-07  9:26       ` Vidya Sagar
2019-05-07  9:26       ` Vidya Sagar
2019-04-24  5:19 ` [PATCH V5 11/16] dt-bindings: PHY: P2U: Add Tegra 194 P2U block Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-24  5:19   ` Vidya Sagar
2019-04-26 15:45   ` Rob Herring
2019-04-26 15:45     ` Rob Herring
2019-04-26 16:07     ` Thierry Reding
2019-04-26 16:07       ` Thierry Reding
2019-04-26 18:05       ` Rob Herring
2019-04-26 18:05         ` Rob Herring
2019-05-07  9:57     ` Vidya Sagar
2019-05-07  9:57       ` Vidya Sagar
2019-05-07  9:57       ` Vidya Sagar
2019-04-24  5:20 ` [PATCH V5 12/16] arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT Vidya Sagar
2019-04-24  5:20   ` Vidya Sagar
2019-04-24  5:20   ` Vidya Sagar
2019-05-03 11:26   ` Thierry Reding
2019-05-03 11:26     ` Thierry Reding
2019-05-07 10:10     ` Vidya Sagar
2019-05-07 10:10       ` Vidya Sagar
2019-05-07 10:10       ` Vidya Sagar
2019-04-24  5:20 ` [PATCH V5 13/16] arm64: tegra: Enable PCIe slots in P2972-0000 board Vidya Sagar
2019-04-24  5:20   ` Vidya Sagar
2019-04-24  5:20   ` Vidya Sagar
2019-05-03 11:27   ` Thierry Reding
2019-05-03 11:27     ` Thierry Reding
2019-05-07 10:11     ` Vidya Sagar
2019-05-07 10:11       ` Vidya Sagar
2019-05-07 10:11       ` Vidya Sagar
2019-04-24  5:20 ` [PATCH V5 14/16] phy: tegra: Add PCIe PIPE2UPHY support Vidya Sagar
2019-04-24  5:20   ` Vidya Sagar
2019-04-24  5:20   ` Vidya Sagar
2019-05-03 11:35   ` Thierry Reding
2019-05-03 11:35     ` Thierry Reding
2019-05-07 10:25     ` Vidya Sagar
2019-05-07 10:25       ` Vidya Sagar
2019-05-07 10:25       ` Vidya Sagar
2019-04-24  5:20 ` [PATCH V5 15/16] PCI: tegra: Add Tegra194 PCIe support Vidya Sagar
2019-04-24  5:20   ` Vidya Sagar
2019-04-24  5:20   ` Vidya Sagar
2019-05-03 13:08   ` Thierry Reding
2019-05-03 13:08     ` Thierry Reding
2019-05-07 13:54     ` Vidya Sagar
2019-05-07 13:54       ` Vidya Sagar
2019-05-07 13:54       ` Vidya Sagar
2019-04-24  5:20 ` [PATCH V5 16/16] arm64: Add Tegra194 PCIe driver to defconfig Vidya Sagar
2019-04-24  5:20   ` Vidya Sagar
2019-04-24  5:20   ` Vidya Sagar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=b8f482f4-8136-07b5-3d68-f45a6fd580ba@nvidia.com \
    --to=vidyas@nvidia.com \
    --cc=bhelgaas@google.com \
    --cc=catalin.marinas@arm.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=jingoohan1@gmail.com \
    --cc=jonathanh@nvidia.com \
    --cc=kishon@ti.com \
    --cc=kthota@nvidia.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=mmaddireddy@nvidia.com \
    --cc=mperttunen@nvidia.com \
    --cc=robh+dt@kernel.org \
    --cc=sagar.tv@gmail.com \
    --cc=thierry.reding@gmail.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.