Re: [PATCH] arm64: dts: rockchip: Fix rk3328-roc-cc sdmmcio-regulator

From: Adam Van Ymeren <adam@vany.ca>
To: Robin Murphy <robin.murphy@arm.com>, Peter Geis <pgwipeout@gmail.com>
Cc: "open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	Heiko Stuebner <heiko@sntech.de>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm64: dts: rockchip: Fix rk3328-roc-cc sdmmcio-regulator
Date: Tue, 11 Feb 2020 16:39:34 -0500	[thread overview]
Message-ID: <bc928fc2-830c-51ce-a25e-1046ed109a82@vany.ca> (raw)
In-Reply-To: <fc529695-ccd7-f1b5-ebf5-8241fec3a24a@arm.com>

I'm dumb, I forgot about the rootwait kernel parameter...

15 successful boots in a row so far after adding that.  Sorry for all
the noise.

Thanks for the help and patience,

-Adam

On 2020-02-10 8:37 a.m., Robin Murphy wrote:
> On 09/02/2020 1:07 am, Adam Van Ymeren wrote:
>> Got it working. Robin you were right, it just needed enable-active-high;
>> added to the regulator, updated patch at the end of this message.
>
> Weird... after my initial excitement I went back and looked more
> closely at the binding and gpiolib-of code, only to realise that that
> property is only supposed to apply to specific 'enable' GPIOs (of
> which there are none here since it's always-on), and that the 'state'
> GPIOs were a separate thing and I'd jumped to the wrong conclusion. So
> now I'm doubly surprised that it actually makes a difference :/
>
>> I went back over my config with a fine tooth comb and found a few
>> rockchip drivers I was missing including PINCTRL_RK805 which seems
>> related but I honestly can't figure out how.  I will try to narrow down
>> which specific driver was missing.  It was odd because it would find the
>> mmc host but just fail notice that a card was present.  It seemed to set
>> the register correctly and identify the mmc host, but failed to notice
>> any card present.
>
> PINCTRL_RK805 should only be for the couple of GPIO pins on the PMIC
> itself which IIRC the reference design uses for the ethernet LEDs, so
> I wouldn't expect it to be relevant.
>
> Those symptoms make sense for the voltages being backwards (or just
> stuck at 1.8V) though - when the I/O domain is configured to expect
> 3.3V, 1.8V is too low to register as a logic high, so Linux will
> always think that something is inserted in the slot, but not talking
> back.
>
> Robin.
>
>> I haven't yet tested this with a high speed card yet to verify 1.8v
>> signaling works but I'll find one and give it a shot.
>>
>> Thanks a ton to both of your for the help
>>
>>
>> On 2020-02-05 1:43 p.m., Peter Geis wrote:
>>>>> First question, which kernel are you running?
>>>>> Current mainline (5.4.17) works out of the box for the rk3328-roc-cc.
>>>> Not from my experience.  I'm trying 5.5, but I also tried a fresh
>>>> build
>>>> ot 5.4.17 and neither will load from the sdcard in their default
>>>> configuration.  If you have this working can you share your kernel
>>>> config?
>>> Considering all of the components to boot off emmc (which you are
>>> clearly doing since you boot at all) are the same as the ones required
>>> for sdmmc I doubt it's a configuration issue.
>>> But to answer your question, I used the defconfig, stripped all of the
>>> non rockchip components out, and made the base drivers builtin.
>>
>> So I wasn't booting off of emmc.  I was booting from the sdcard, it
>> would work so long as I prevented the kernel from trying to initialize
>> the vcc_sdio regulator (by removing it or changing the gpio pin),
>> presumably as u-boot left it in a reasonable state.
>>
>>> Makes sense. If I remove vcc_sdio from the device tree, and remove the
>>>> vqmmc entry from the sdmmc node, then the kernel continues to
>>>> boot.  In
>>>> that case I have
>>>>
>>>> # cat /sys/kernel/debug/regmap/dummy-syscon\@ff100000/registers |
>>>> grep 428
>>>>
>>>> 428: 0000f800
>>> As it should be, this should mean your mute pin is off (default state)
>>> and the vqmmc voltage should be 3.3v.
>>
>> Gotcha.  I also managed to verify this works as expected on my board
>> with a multimeter and toggling the register from the u-boot shell.
>>
>>>
>>>> # cat /sys/kernel/debug/mmc1/ios
>>>> clock:        0 Hz
>>>> vdd:        0 (invalid)
>>>> bus mode:    2 (push-pull)
>>>> chip select:    0 (don't care)
>>>> power mode:    0 (off)
>>>> bus width:    0 (1 bits)
>>>> timing spec:    0 (legacy)
>>>> signal voltage:    0 (3.30 V)
>>>> driver type:    0 (driver type B)
>>> It's not detecting anything at all.
>>> You say you booted off this card?
>> So this is booting when I disabled vcc_sdio and just left it in the
>> state that u-boot left it in, which is probably where the nonsensical
>> output comes from.
>>>
>>> Could you run a `dmesg | grep mmc` and send all the results?
>>
>> Here's a slightly scrubbed log of one of my failed boots.  I left in my
>> traces of register writes to 428 and gpio-regulator state changes.
>>
>> [    0.000000] Kernel command line: earlycon=uart8250,mmio32,0xff130000
>> console=ttyS2,1500000 rw root=/dev/mmcblk0p5 init=/sbin/init
>> kgdboc=ttyS2,1500000 dynamic_debug.verbose=1 loglevel=7 dyndbg="module
>> dw_mmc +p ; module dw_mmc_rockchip +p ; module mmc_core +p"
>> <snip>
>> [    0.793750] dwmmc_rockchip ff500000.dwmmc: IDMAC supports 32-bit
>> address mode.
>> [    0.794402] dwmmc_rockchip ff500000.dwmmc: Using internal DMA
>> controller.
>> [    0.798582] dwmmc_rockchip ff500000.dwmmc: Version ID is 270a
>> [    0.801194] dwmmc_rockchip ff500000.dwmmc: DW MMC controller at irq
>> 29,32 bit host data width,256 deep fifo
>> [    0.815437] dwmmc_rockchip ff520000.dwmmc: IDMAC supports 32-bit
>> address mode.
>> [    0.820273] dwmmc_rockchip ff520000.dwmmc: Version ID is 270a
>> [    0.822904] dwmmc_rockchip ff520000.dwmmc: DW MMC controller at irq
>> 30,32 bit host data width,256 deep fifo
>> [    0.825527] mmc_host mmc0: card is non-removable.
>> [    0.838770] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req
>> 400000Hz, actual 400000HZ div = 0)
>> [    0.888886] ADAMVY Regmap write 428 <= 2f802
>> [    0.904218] dwmmc_rockchip ff500000.dwmmc: IDMAC supports 32-bit
>> address mode.
>> [    0.904870] dwmmc_rockchip ff500000.dwmmc: Using internal DMA
>> controller.
>> [    0.909055] dwmmc_rockchip ff500000.dwmmc: Version ID is 270a
>> [    0.911637] dwmmc_rockchip ff500000.dwmmc: DW MMC controller at irq
>> 29,32 bit host data width,256 deep fifo
>> [    0.913954] ADAMVY Setting gpio regulator to value 3300000 state 0
>> [    0.914503] ADAMVY Regmap write 428 <= 2f800
>> [    0.927612] mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req
>> 400000Hz, actual 400000HZ div = 0)
>> [    0.950160] VFS: Cannot open root device "mmcblk0p5" or
>> unknown-block(0,0): error -6
>>
>>
>>
>> Finally here's an updated patch for the device tree with Robin's
>> original suggestion.
>>
>>
>> Index: linux-5.5/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
>> ===================================================================
>> --- linux-5.5.orig/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
>> +++ linux-5.5/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
>> @@ -45,6 +45,7 @@
>>       vcc_sdio: sdmmcio-regulator {
>>           compatible = "regulator-gpio";
>>           gpios = <&grf_gpio 0 GPIO_ACTIVE_HIGH>;
>> +                enable-active-high;
>>           states = <1800000 0x1
>>                 3300000 0x0>;
>>           regulator-name = "vcc_sdio";
>>
>>

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