From: Konrad Dybcio <konrad.dybcio@linaro.org> To: devi priya <quic_devipriy@quicinc.com>, agross@kernel.org, andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, ulf.hansson@linaro.org, linus.walleij@linaro.org, catalin.marinas@arm.com, will@kernel.org, p.zabel@pengutronix.de, shawnguo@kernel.org, arnd@arndb.de, marcel.ziswiler@toradex.com, dmitry.baryshkov@linaro.org, nfraprado@collabora.com, broonie@kernel.org, tdas@codeaurora.org, bhupesh.sharma@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: quic_srichara@quicinc.com, quic_gokulsri@quicinc.com, quic_sjaganat@quicinc.com, quic_kathirav@quicinc.com, quic_arajkuma@quicinc.com, quic_anusha@quicinc.com, quic_poovendh@quicinc.com Subject: Re: [PATCH V1 4/8] pinctrl: qcom: Add IPQ9574 pinctrl driver Date: Thu, 26 Jan 2023 00:51:43 +0100 [thread overview] Message-ID: <bd788bbd-bc62-4a16-994e-f7b527f58fe5@linaro.org> (raw) In-Reply-To: <20230124141541.8290-5-quic_devipriy@quicinc.com> On 24.01.2023 15:15, devi priya wrote: > Add pinctrl definitions for the TLMM of IPQ9574 > > Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> > Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> > Signed-off-by: devi priya <quic_devipriy@quicinc.com> > --- [...] > +enum ipq9574_functions { > + msm_mux_atest_char, > + msm_mux_atest_char0, > + msm_mux_atest_char1, > + msm_mux_atest_char2, > + msm_mux_atest_char3, > + msm_mux_audio_pdm0, > + msm_mux_audio_pdm1, > + msm_mux_audio_pri, > + msm_mux_audio_sec, > + msm_mux_blsp0_spi, > + msm_mux_blsp0_uart, > + msm_mux_blsp1_i2c, > + msm_mux_blsp1_spi, > + msm_mux_blsp1_uart, > + msm_mux_blsp2_i2c, > + msm_mux_blsp2_spi, > + msm_mux_blsp2_uart, > + msm_mux_blsp3_i2c, > + msm_mux_blsp3_spi, > + msm_mux_blsp3_uart, > + msm_mux_blsp4_i2c, > + msm_mux_blsp4_spi, > + msm_mux_blsp4_uart, > + msm_mux_blsp5_i2c, > + msm_mux_blsp5_uart, > + msm_mux_cri_trng0, > + msm_mux_cri_trng1, > + msm_mux_cri_trng2, > + msm_mux_cri_trng3, > + msm_mux_cxc0, > + msm_mux_cxc1, > + msm_mux_dbg_out, > + msm_mux_dwc_ddrphy, > + msm_mux_gcc_plltest, > + msm_mux_gcc_tlmm, > + msm_mux_gpio, > + msm_mux_mac00, > + msm_mux_mac01, > + msm_mux_mac10, > + msm_mux_mac11, msm_mux_mac? > + msm_mux_mdc, > + msm_mux_mdio, > + msm_mux_pcie0_clk, > + msm_mux_pcie0_wake, > + msm_mux_pcie1_clk, > + msm_mux_pcie1_wake, > + msm_mux_pcie2_clk, > + msm_mux_pcie2_wake, > + msm_mux_pcie3_clk, > + msm_mux_pcie3_wake, > + msm_mux_prng_rosc0, > + msm_mux_prng_rosc1, > + msm_mux_prng_rosc2, > + msm_mux_prng_rosc3, > + msm_mux_pta1_0, > + msm_mux_pta1_1, > + msm_mux_pta1_2, > + msm_mux_pta20, > + msm_mux_pta21, msm_mux_pta? > + msm_mux_pwm00, > + msm_mux_pwm01, > + msm_mux_pwm02, > + msm_mux_pwm03, > + msm_mux_pwm04, > + msm_mux_pwm10, > + msm_mux_pwm11, > + msm_mux_pwm12, > + msm_mux_pwm13, > + msm_mux_pwm14, > + msm_mux_pwm20, > + msm_mux_pwm21, > + msm_mux_pwm22, > + msm_mux_pwm23, > + msm_mux_pwm24, > + msm_mux_pwm30, > + msm_mux_pwm31, > + msm_mux_pwm32, > + msm_mux_pwm33, msm_mux_pwm? [...] > + > +static const int ipq9574_reserved_gpios[] = { > + 59, -1 > +}; We know it's necessary and it's good that you take care of it, but it would be even nicer if you left a comment explaining why the rx0/pwm23/qdss_tracedata_a gpio can not be accessed and what it's used for. Konrad > + > +static const struct msm_pinctrl_soc_data ipq9574_pinctrl = { > + .pins = ipq9574_pins, > + .npins = ARRAY_SIZE(ipq9574_pins), > + .functions = ipq9574_functions, > + .nfunctions = ARRAY_SIZE(ipq9574_functions), > + .groups = ipq9574_groups, > + .ngroups = ARRAY_SIZE(ipq9574_groups), > + .reserved_gpios = ipq9574_reserved_gpios, > + .ngpios = 65, > +}; > + > +static int ipq9574_pinctrl_probe(struct platform_device *pdev) > +{ > + return msm_pinctrl_probe(pdev, &ipq9574_pinctrl); > +} > + > +static const struct of_device_id ipq9574_pinctrl_of_match[] = { > + { .compatible = "qcom,ipq9574-tlmm", }, > + { }, > +}; > + > +static struct platform_driver ipq9574_pinctrl_driver = { > + .driver = { > + .name = "ipq9574-tlmm", > + .of_match_table = ipq9574_pinctrl_of_match, > + }, > + .probe = ipq9574_pinctrl_probe, > + .remove = msm_pinctrl_remove, > +}; > + > +static int __init ipq9574_pinctrl_init(void) > +{ > + return platform_driver_register(&ipq9574_pinctrl_driver); > +} > +arch_initcall(ipq9574_pinctrl_init); > + > +static void __exit ipq9574_pinctrl_exit(void) > +{ > + platform_driver_unregister(&ipq9574_pinctrl_driver); > +} > +module_exit(ipq9574_pinctrl_exit); > + > +MODULE_DESCRIPTION("QTI IPQ9574 TLMM driver"); > +MODULE_LICENSE("GPL"); > +MODULE_DEVICE_TABLE(of, ipq9574_pinctrl_of_match);
WARNING: multiple messages have this Message-ID (diff)
From: Konrad Dybcio <konrad.dybcio@linaro.org> To: devi priya <quic_devipriy@quicinc.com>, agross@kernel.org, andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, ulf.hansson@linaro.org, linus.walleij@linaro.org, catalin.marinas@arm.com, will@kernel.org, p.zabel@pengutronix.de, shawnguo@kernel.org, arnd@arndb.de, marcel.ziswiler@toradex.com, dmitry.baryshkov@linaro.org, nfraprado@collabora.com, broonie@kernel.org, tdas@codeaurora.org, bhupesh.sharma@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: quic_srichara@quicinc.com, quic_gokulsri@quicinc.com, quic_sjaganat@quicinc.com, quic_kathirav@quicinc.com, quic_arajkuma@quicinc.com, quic_anusha@quicinc.com, quic_poovendh@quicinc.com Subject: Re: [PATCH V1 4/8] pinctrl: qcom: Add IPQ9574 pinctrl driver Date: Thu, 26 Jan 2023 00:51:43 +0100 [thread overview] Message-ID: <bd788bbd-bc62-4a16-994e-f7b527f58fe5@linaro.org> (raw) In-Reply-To: <20230124141541.8290-5-quic_devipriy@quicinc.com> On 24.01.2023 15:15, devi priya wrote: > Add pinctrl definitions for the TLMM of IPQ9574 > > Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> > Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> > Signed-off-by: devi priya <quic_devipriy@quicinc.com> > --- [...] > +enum ipq9574_functions { > + msm_mux_atest_char, > + msm_mux_atest_char0, > + msm_mux_atest_char1, > + msm_mux_atest_char2, > + msm_mux_atest_char3, > + msm_mux_audio_pdm0, > + msm_mux_audio_pdm1, > + msm_mux_audio_pri, > + msm_mux_audio_sec, > + msm_mux_blsp0_spi, > + msm_mux_blsp0_uart, > + msm_mux_blsp1_i2c, > + msm_mux_blsp1_spi, > + msm_mux_blsp1_uart, > + msm_mux_blsp2_i2c, > + msm_mux_blsp2_spi, > + msm_mux_blsp2_uart, > + msm_mux_blsp3_i2c, > + msm_mux_blsp3_spi, > + msm_mux_blsp3_uart, > + msm_mux_blsp4_i2c, > + msm_mux_blsp4_spi, > + msm_mux_blsp4_uart, > + msm_mux_blsp5_i2c, > + msm_mux_blsp5_uart, > + msm_mux_cri_trng0, > + msm_mux_cri_trng1, > + msm_mux_cri_trng2, > + msm_mux_cri_trng3, > + msm_mux_cxc0, > + msm_mux_cxc1, > + msm_mux_dbg_out, > + msm_mux_dwc_ddrphy, > + msm_mux_gcc_plltest, > + msm_mux_gcc_tlmm, > + msm_mux_gpio, > + msm_mux_mac00, > + msm_mux_mac01, > + msm_mux_mac10, > + msm_mux_mac11, msm_mux_mac? > + msm_mux_mdc, > + msm_mux_mdio, > + msm_mux_pcie0_clk, > + msm_mux_pcie0_wake, > + msm_mux_pcie1_clk, > + msm_mux_pcie1_wake, > + msm_mux_pcie2_clk, > + msm_mux_pcie2_wake, > + msm_mux_pcie3_clk, > + msm_mux_pcie3_wake, > + msm_mux_prng_rosc0, > + msm_mux_prng_rosc1, > + msm_mux_prng_rosc2, > + msm_mux_prng_rosc3, > + msm_mux_pta1_0, > + msm_mux_pta1_1, > + msm_mux_pta1_2, > + msm_mux_pta20, > + msm_mux_pta21, msm_mux_pta? > + msm_mux_pwm00, > + msm_mux_pwm01, > + msm_mux_pwm02, > + msm_mux_pwm03, > + msm_mux_pwm04, > + msm_mux_pwm10, > + msm_mux_pwm11, > + msm_mux_pwm12, > + msm_mux_pwm13, > + msm_mux_pwm14, > + msm_mux_pwm20, > + msm_mux_pwm21, > + msm_mux_pwm22, > + msm_mux_pwm23, > + msm_mux_pwm24, > + msm_mux_pwm30, > + msm_mux_pwm31, > + msm_mux_pwm32, > + msm_mux_pwm33, msm_mux_pwm? [...] > + > +static const int ipq9574_reserved_gpios[] = { > + 59, -1 > +}; We know it's necessary and it's good that you take care of it, but it would be even nicer if you left a comment explaining why the rx0/pwm23/qdss_tracedata_a gpio can not be accessed and what it's used for. Konrad > + > +static const struct msm_pinctrl_soc_data ipq9574_pinctrl = { > + .pins = ipq9574_pins, > + .npins = ARRAY_SIZE(ipq9574_pins), > + .functions = ipq9574_functions, > + .nfunctions = ARRAY_SIZE(ipq9574_functions), > + .groups = ipq9574_groups, > + .ngroups = ARRAY_SIZE(ipq9574_groups), > + .reserved_gpios = ipq9574_reserved_gpios, > + .ngpios = 65, > +}; > + > +static int ipq9574_pinctrl_probe(struct platform_device *pdev) > +{ > + return msm_pinctrl_probe(pdev, &ipq9574_pinctrl); > +} > + > +static const struct of_device_id ipq9574_pinctrl_of_match[] = { > + { .compatible = "qcom,ipq9574-tlmm", }, > + { }, > +}; > + > +static struct platform_driver ipq9574_pinctrl_driver = { > + .driver = { > + .name = "ipq9574-tlmm", > + .of_match_table = ipq9574_pinctrl_of_match, > + }, > + .probe = ipq9574_pinctrl_probe, > + .remove = msm_pinctrl_remove, > +}; > + > +static int __init ipq9574_pinctrl_init(void) > +{ > + return platform_driver_register(&ipq9574_pinctrl_driver); > +} > +arch_initcall(ipq9574_pinctrl_init); > + > +static void __exit ipq9574_pinctrl_exit(void) > +{ > + platform_driver_unregister(&ipq9574_pinctrl_driver); > +} > +module_exit(ipq9574_pinctrl_exit); > + > +MODULE_DESCRIPTION("QTI IPQ9574 TLMM driver"); > +MODULE_LICENSE("GPL"); > +MODULE_DEVICE_TABLE(of, ipq9574_pinctrl_of_match); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-01-25 23:51 UTC|newest] Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-24 14:15 [PATCH V1 0/8] Add minimal boot support for IPQ9574 devi priya 2023-01-24 14:15 ` devi priya 2023-01-24 14:15 ` [PATCH V1 1/8] dt-bindings: Add ipq9574 clock and reset definitions devi priya 2023-01-24 14:15 ` devi priya 2023-01-25 9:04 ` Kathiravan Thirumoorthy 2023-01-25 9:04 ` Kathiravan Thirumoorthy 2023-01-29 11:21 ` Devi Priya 2023-01-29 11:21 ` Devi Priya 2023-01-24 14:15 ` [PATCH V1 2/8] clk: qcom: Add Global Clock Controller driver for IPQ9574 devi priya 2023-01-25 23:47 ` Konrad Dybcio 2023-01-25 23:47 ` Konrad Dybcio 2023-01-27 9:08 ` Devi Priya 2023-01-27 9:08 ` Devi Priya 2023-01-24 14:15 ` [PATCH V1 3/8] dt-bindings: pinctrl: qcom: Document IPQ9574 pinctrl driver devi priya 2023-01-24 14:15 ` devi priya 2023-01-24 15:08 ` Krzysztof Kozlowski 2023-01-24 15:08 ` Krzysztof Kozlowski 2023-01-25 11:02 ` Devi Priya 2023-01-25 11:02 ` Devi Priya 2023-01-25 11:07 ` Krzysztof Kozlowski 2023-01-25 11:07 ` Krzysztof Kozlowski 2023-01-29 11:19 ` Devi Priya 2023-01-29 11:19 ` Devi Priya 2023-01-24 14:15 ` [PATCH V1 4/8] pinctrl: qcom: Add " devi priya 2023-01-24 14:15 ` devi priya 2023-01-25 23:51 ` Konrad Dybcio [this message] 2023-01-25 23:51 ` Konrad Dybcio 2023-01-27 9:16 ` Devi Priya 2023-01-27 9:16 ` Devi Priya 2023-01-24 14:15 ` [PATCH V1 5/8] dt-bindings: arm: qcom: Add ipq9574 compatible devi priya 2023-01-24 14:15 ` devi priya 2023-01-24 14:15 ` [PATCH V1 6/8] dt-bindings: mmc: sdhci-msm: Document the IPQ9574 compatible devi priya 2023-01-24 14:15 ` devi priya 2023-01-27 8:50 ` Linus Walleij 2023-01-27 8:50 ` Linus Walleij 2023-01-27 10:56 ` Ulf Hansson 2023-01-27 10:56 ` Ulf Hansson 2023-01-24 14:15 ` [PATCH V1 7/8] arm64: dts: qcom: Add ipq9574 SoC and AL02 board support devi priya 2023-01-24 14:15 ` devi priya 2023-01-24 15:14 ` Krzysztof Kozlowski 2023-01-24 15:14 ` Krzysztof Kozlowski 2023-01-25 11:12 ` Devi Priya 2023-01-25 11:12 ` Devi Priya 2023-01-25 23:40 ` Konrad Dybcio 2023-01-25 23:40 ` Konrad Dybcio 2023-01-27 9:38 ` Devi Priya 2023-01-27 9:38 ` Devi Priya 2023-01-24 17:11 ` Dmitry Baryshkov 2023-01-24 17:11 ` Dmitry Baryshkov 2023-01-25 11:07 ` Devi Priya 2023-01-25 11:07 ` Devi Priya 2023-01-24 14:15 ` [PATCH V1 8/8] arm64: defconfig: Enable IPQ9574 SoC base configs devi priya 2023-01-24 14:15 ` devi priya 2023-01-24 14:32 ` [PATCH V1 0/8] Add minimal boot support for IPQ9574 Krzysztof Kozlowski 2023-01-24 14:32 ` Krzysztof Kozlowski 2023-01-25 11:11 ` Devi Priya 2023-01-25 11:11 ` Devi Priya
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