From: Marek Vasut <marex@denx.de>
To: Lucas Stach <l.stach@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org,
Frieder Schrempf <frieder.schrempf@kontron.de>,
patchwork-lst@pengutronix.de, NXP Linux Team <linux-imx@nxp.com>,
kernel@pengutronix.de, Fabio Estevam <festevam@gmail.com>,
linux-arm-kernel@lists.infradead.org,
Abel Vesa <abel.vesa@nxp.com>
Subject: Re: [PATCH 07/11] soc: imx: gpcv2: add support for optional resets
Date: Wed, 30 Sep 2020 18:38:31 +0200 [thread overview]
Message-ID: <c06ebae8-c694-47ed-3533-219ed820b8fb@denx.de> (raw)
In-Reply-To: <502fb976959b61472be351576ca8e6c880bea2bf.camel@pengutronix.de>
On 9/30/20 6:34 PM, Lucas Stach wrote:
> On Mi, 2020-09-30 at 18:30 +0200, Marek Vasut wrote:
>> On 9/30/20 6:23 PM, Lucas Stach wrote:
>>> On Mi, 2020-09-30 at 18:15 +0200, Marek Vasut wrote:
>>>> On 9/30/20 5:50 PM, Lucas Stach wrote:
>>>>> Normally the reset for the devices inside the power domain is
>>>>> triggered automatically from the PGC in the power-up sequencing,
>>>>> however on i.MX8MM this doesn't work for the GPU power domains.
>>>>
>>>> One has to wonder whether the VPU power domain has similar hardware bug
>>>> on the MX8MM ?
>>>
>>> Nope the VPUs have separate reset bits in the BLK_CTL. So after
>>> powering up the VPUMIX domain one can assert/deassert reset to the
>>> individual VPU cores.
>>
>> Is there any documentation for the BLK_CTL on MX8MM ? I can't find any
>> in the official RM.
>
> I'm still waiting on some info from NXP about this. It is not
> documented in the RM.
Yes, I know.
>> And also, the GPUs need to use SRC reset, does the BLK_CTL reset do the
>> same "degree" of reset to the VPU as the SRC reset does to the GPUs ?
>
> At least that is what I'm assuming.
>
> The fundamental issue with the GPU domain is that there is no BLK_CTL
> in the GPUMIX domain and the resets are hooked up to the shared SRC
> reset, instead of having GPU BLK_CTL level resets.
Yep.
I'll CC Abel, maybe there is still undocumented way to reset the GPUs on
the MX8MM separately too.
WARNING: multiple messages have this Message-ID (diff)
From: Marek Vasut <marex@denx.de>
To: Lucas Stach <l.stach@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org, Abel Vesa <abel.vesa@nxp.com>,
Frieder Schrempf <frieder.schrempf@kontron.de>,
patchwork-lst@pengutronix.de, NXP Linux Team <linux-imx@nxp.com>,
kernel@pengutronix.de, Fabio Estevam <festevam@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 07/11] soc: imx: gpcv2: add support for optional resets
Date: Wed, 30 Sep 2020 18:38:31 +0200 [thread overview]
Message-ID: <c06ebae8-c694-47ed-3533-219ed820b8fb@denx.de> (raw)
In-Reply-To: <502fb976959b61472be351576ca8e6c880bea2bf.camel@pengutronix.de>
On 9/30/20 6:34 PM, Lucas Stach wrote:
> On Mi, 2020-09-30 at 18:30 +0200, Marek Vasut wrote:
>> On 9/30/20 6:23 PM, Lucas Stach wrote:
>>> On Mi, 2020-09-30 at 18:15 +0200, Marek Vasut wrote:
>>>> On 9/30/20 5:50 PM, Lucas Stach wrote:
>>>>> Normally the reset for the devices inside the power domain is
>>>>> triggered automatically from the PGC in the power-up sequencing,
>>>>> however on i.MX8MM this doesn't work for the GPU power domains.
>>>>
>>>> One has to wonder whether the VPU power domain has similar hardware bug
>>>> on the MX8MM ?
>>>
>>> Nope the VPUs have separate reset bits in the BLK_CTL. So after
>>> powering up the VPUMIX domain one can assert/deassert reset to the
>>> individual VPU cores.
>>
>> Is there any documentation for the BLK_CTL on MX8MM ? I can't find any
>> in the official RM.
>
> I'm still waiting on some info from NXP about this. It is not
> documented in the RM.
Yes, I know.
>> And also, the GPUs need to use SRC reset, does the BLK_CTL reset do the
>> same "degree" of reset to the VPU as the SRC reset does to the GPUs ?
>
> At least that is what I'm assuming.
>
> The fundamental issue with the GPU domain is that there is no BLK_CTL
> in the GPUMIX domain and the resets are hooked up to the shared SRC
> reset, instead of having GPU BLK_CTL level resets.
Yep.
I'll CC Abel, maybe there is still undocumented way to reset the GPUs on
the MX8MM separately too.
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next prev parent reply other threads:[~2020-09-30 16:38 UTC|newest]
Thread overview: 118+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 15:49 [PATCH 00/11] i.MX8MM power domain support Lucas Stach
2020-09-30 15:49 ` Lucas Stach
2020-09-30 15:49 ` [PATCH 01/11] soc: imx: gpcv2: move to more ideomatic error handling in probe Lucas Stach
2020-09-30 15:49 ` Lucas Stach
2020-09-30 16:04 ` Marek Vasut
2020-09-30 16:04 ` Marek Vasut
2020-09-30 15:49 ` [PATCH 02/11] soc: imx: gpcv2: move domain mapping to domain driver probe Lucas Stach
2020-09-30 15:49 ` Lucas Stach
2020-09-30 16:07 ` Marek Vasut
2020-09-30 16:07 ` Marek Vasut
2020-09-30 15:49 ` [PATCH 03/11] soc: imx: gpcv2: split power up and power down sequence control Lucas Stach
2020-09-30 15:49 ` Lucas Stach
2020-09-30 16:10 ` Marek Vasut
2020-09-30 16:10 ` Marek Vasut
2020-09-30 15:49 ` [PATCH 04/11] soc: imx: gpcv2: wait for ADB400 handshake Lucas Stach
2020-09-30 15:49 ` Lucas Stach
2020-09-30 16:11 ` Marek Vasut
2020-09-30 16:11 ` Marek Vasut
2020-09-30 16:19 ` Lucas Stach
2020-09-30 16:19 ` Lucas Stach
2020-09-30 16:23 ` Marek Vasut
2020-09-30 16:23 ` Marek Vasut
2020-10-09 3:05 ` Jacky Bai
2020-10-09 3:05 ` Jacky Bai
2020-10-09 7:27 ` Marek Vasut
2020-10-09 7:27 ` Marek Vasut
2020-10-09 7:51 ` Jacky Bai
2020-10-09 7:51 ` Jacky Bai
2020-10-09 8:19 ` Marek Vasut
2020-10-09 8:19 ` Marek Vasut
2020-09-30 15:50 ` [PATCH 05/11] soc: imx: gpcv2: add runtime PM support for power-domains Lucas Stach
2020-09-30 15:50 ` Lucas Stach
2020-09-30 16:14 ` Marek Vasut
2020-09-30 16:14 ` Marek Vasut
2020-09-30 16:20 ` Lucas Stach
2020-09-30 16:20 ` Lucas Stach
2020-09-30 15:50 ` [PATCH 06/11] soc: imx: gpcv2: allow domains without power-sequence control Lucas Stach
2020-09-30 15:50 ` Lucas Stach
2020-10-09 7:54 ` Jacky Bai
2020-10-09 7:54 ` Jacky Bai
2020-10-09 7:57 ` Jacky Bai
2020-10-09 7:57 ` Jacky Bai
2020-09-30 15:50 ` [PATCH 07/11] soc: imx: gpcv2: add support for optional resets Lucas Stach
2020-09-30 15:50 ` Lucas Stach
2020-09-30 16:15 ` Marek Vasut
2020-09-30 16:15 ` Marek Vasut
2020-09-30 16:23 ` Lucas Stach
2020-09-30 16:23 ` Lucas Stach
2020-09-30 16:30 ` Marek Vasut
2020-09-30 16:30 ` Marek Vasut
2020-09-30 16:34 ` Lucas Stach
2020-09-30 16:34 ` Lucas Stach
2020-09-30 16:38 ` Marek Vasut [this message]
2020-09-30 16:38 ` Marek Vasut
2020-10-01 8:59 ` Krzysztof Kozlowski
2020-10-01 8:59 ` Krzysztof Kozlowski
2020-10-06 19:42 ` Rob Herring
2020-10-06 19:42 ` Rob Herring
2020-09-30 15:50 ` [PATCH 08/11] dt-bindings: add defines for i.MX8MM power domains Lucas Stach
2020-09-30 15:50 ` Lucas Stach
2020-10-01 8:54 ` Krzysztof Kozlowski
2020-10-01 8:54 ` Krzysztof Kozlowski
2020-10-06 19:47 ` Rob Herring
2020-10-06 19:47 ` Rob Herring
2020-09-30 15:50 ` [PATCH 09/11] soc: imx: gpcv2: add support " Lucas Stach
2020-09-30 15:50 ` Lucas Stach
2020-09-30 16:18 ` Marek Vasut
2020-09-30 16:18 ` Marek Vasut
2020-09-30 15:50 ` [PATCH 10/11] arm64: dts: imx8mm: add GPC node and " Lucas Stach
2020-09-30 15:50 ` Lucas Stach
2020-09-30 16:20 ` Marek Vasut
2020-09-30 16:20 ` Marek Vasut
2020-10-01 8:51 ` Krzysztof Kozlowski
2020-10-01 8:51 ` Krzysztof Kozlowski
2020-10-23 13:22 ` Adam Ford
2020-10-23 13:22 ` Adam Ford
2020-10-23 14:39 ` Jacky Bai
2020-10-23 14:39 ` Jacky Bai
2020-10-26 10:56 ` Abel Vesa
2020-10-26 10:56 ` Abel Vesa
2020-10-26 11:01 ` Abel Vesa
2020-10-26 11:01 ` Abel Vesa
2020-10-26 11:13 ` Adam Ford
2020-10-26 11:13 ` Adam Ford
2020-10-26 11:02 ` Lucas Stach
2020-10-26 11:02 ` Lucas Stach
2020-09-30 15:50 ` [PATCH 11/11] arm64: dts: imx8mm: put USB controllers into power-domains Lucas Stach
2020-09-30 15:50 ` Lucas Stach
2020-10-01 7:46 ` [PATCH 00/11] i.MX8MM power domain support Frieder Schrempf
2020-10-01 7:46 ` Frieder Schrempf
2020-10-03 18:03 ` Adam Ford
2020-10-03 18:03 ` Adam Ford
[not found] ` <CAHCN7xKjWEwQr9y0QLrR6KVT=ut=v=coqt4beAvrz1kQSGbX1g@mail.gmail.com>
2020-10-03 18:08 ` Marek Vasut
2020-10-03 18:08 ` Marek Vasut
2020-10-03 18:11 ` Adam Ford
2020-10-03 18:11 ` Adam Ford
2020-10-08 20:47 ` Adam Ford
2020-10-08 20:47 ` Adam Ford
2020-10-09 3:00 ` Jacky Bai
2020-10-09 3:00 ` Jacky Bai
2020-10-09 11:12 ` Lucas Stach
2020-10-09 11:12 ` Lucas Stach
2020-10-09 12:57 ` Adam Ford
2020-10-09 12:57 ` Adam Ford
2020-10-10 2:16 ` Jacky Bai
2020-10-10 2:16 ` Jacky Bai
2020-10-13 18:26 ` Lucas Stach
2020-10-13 18:26 ` Lucas Stach
2020-10-14 1:23 ` Peng Fan
2020-10-14 1:23 ` Peng Fan
2020-10-22 8:24 ` Lucas Stach
2020-10-22 8:24 ` Lucas Stach
2020-10-22 16:36 ` Fabio Estevam
2020-10-22 16:36 ` Fabio Estevam
2020-10-28 13:50 ` Peng Fan
2020-10-28 13:50 ` Peng Fan
2020-10-31 13:56 ` Adam Ford
2020-10-31 13:56 ` Adam Ford
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