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From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	dja@axtens.net
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	linux-mm@kvack.org
Subject: [PATCH v5 15/17] powerpc/32s: reorganise DSI handler.
Date: Sat, 21 Dec 2019 08:32:36 +0000 (UTC)	[thread overview]
Message-ID: <c31b22c91af8b011d0a4fd9e52ad6afb4b593f71.1576916812.git.christophe.leroy@c-s.fr> (raw)
In-Reply-To: <cover.1576916812.git.christophe.leroy@c-s.fr>

The part decidated to handling hash_page() is fully unneeded for
processors not having real hash pages like the 603.

Lets enlarge the content of the feature fixup, and provide
an alternative which jumps directly instead of getting NIPs.

Also, in preparation of VMAP stacks, the end of DSI handler has moved
to later in the code as it won't fit anymore once VMAP stacks
are there.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
 arch/powerpc/kernel/head_32.S | 31 +++++++++++++++++--------------
 1 file changed, 17 insertions(+), 14 deletions(-)

diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 449625b4ff03..7ec780858299 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -295,24 +295,20 @@ __secondary_hold_acknowledge:
 	DO_KVM  0x300
 DataAccess:
 	EXCEPTION_PROLOG
-	mfspr	r10,SPRN_DSISR
-	stw	r10,_DSISR(r11)
+	get_and_save_dar_dsisr_on_stack	r4, r5, r11
+BEGIN_MMU_FTR_SECTION
 #ifdef CONFIG_PPC_KUAP
-	andis.	r0,r10,(DSISR_BAD_FAULT_32S | DSISR_DABRMATCH | DSISR_PROTFAULT)@h
+	andis.	r0, r5, (DSISR_BAD_FAULT_32S | DSISR_DABRMATCH | DSISR_PROTFAULT)@h
 #else
-	andis.	r0,r10,(DSISR_BAD_FAULT_32S|DSISR_DABRMATCH)@h
+	andis.	r0, r5, (DSISR_BAD_FAULT_32S | DSISR_DABRMATCH)@h
 #endif
-	bne	1f			/* if not, try to put a PTE */
-	mfspr	r4,SPRN_DAR		/* into the hash table */
-	rlwinm	r3,r10,32-15,21,21	/* DSISR_STORE -> _PAGE_RW */
-BEGIN_MMU_FTR_SECTION
+	bne	handle_page_fault_tramp_2	/* if not, try to put a PTE */
+	rlwinm	r3, r5, 32 - 15, 21, 21		/* DSISR_STORE -> _PAGE_RW */
 	bl	hash_page
-END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
-1:	lwz	r5,_DSISR(r11)		/* get DSISR value */
-	mfspr	r4,SPRN_DAR
-	stw	r4, _DAR(r11)
-	EXC_XFER_LITE(0x300, handle_page_fault)
-
+	b	handle_page_fault_tramp_1
+FTR_SECTION_ELSE
+	b	handle_page_fault_tramp_2
+ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE)
 
 /* Instruction access exception. */
 	. = 0x400
@@ -642,6 +638,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
 
 	. = 0x3000
 
+handle_page_fault_tramp_1:
+	lwz	r4, _DAR(r11)
+	lwz	r5, _DSISR(r11)
+	/* fall through */
+handle_page_fault_tramp_2:
+	EXC_XFER_LITE(0x300, handle_page_fault)
+
 AltiVecUnavailable:
 	EXCEPTION_PROLOG
 #ifdef CONFIG_ALTIVEC
-- 
2.13.3


WARNING: multiple messages have this Message-ID (diff)
From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	 dja@axtens.net
Cc: linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v5 15/17] powerpc/32s: reorganise DSI handler.
Date: Sat, 21 Dec 2019 08:32:36 +0000 (UTC)	[thread overview]
Message-ID: <c31b22c91af8b011d0a4fd9e52ad6afb4b593f71.1576916812.git.christophe.leroy@c-s.fr> (raw)
In-Reply-To: <cover.1576916812.git.christophe.leroy@c-s.fr>

The part decidated to handling hash_page() is fully unneeded for
processors not having real hash pages like the 603.

Lets enlarge the content of the feature fixup, and provide
an alternative which jumps directly instead of getting NIPs.

Also, in preparation of VMAP stacks, the end of DSI handler has moved
to later in the code as it won't fit anymore once VMAP stacks
are there.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
 arch/powerpc/kernel/head_32.S | 31 +++++++++++++++++--------------
 1 file changed, 17 insertions(+), 14 deletions(-)

diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 449625b4ff03..7ec780858299 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -295,24 +295,20 @@ __secondary_hold_acknowledge:
 	DO_KVM  0x300
 DataAccess:
 	EXCEPTION_PROLOG
-	mfspr	r10,SPRN_DSISR
-	stw	r10,_DSISR(r11)
+	get_and_save_dar_dsisr_on_stack	r4, r5, r11
+BEGIN_MMU_FTR_SECTION
 #ifdef CONFIG_PPC_KUAP
-	andis.	r0,r10,(DSISR_BAD_FAULT_32S | DSISR_DABRMATCH | DSISR_PROTFAULT)@h
+	andis.	r0, r5, (DSISR_BAD_FAULT_32S | DSISR_DABRMATCH | DSISR_PROTFAULT)@h
 #else
-	andis.	r0,r10,(DSISR_BAD_FAULT_32S|DSISR_DABRMATCH)@h
+	andis.	r0, r5, (DSISR_BAD_FAULT_32S | DSISR_DABRMATCH)@h
 #endif
-	bne	1f			/* if not, try to put a PTE */
-	mfspr	r4,SPRN_DAR		/* into the hash table */
-	rlwinm	r3,r10,32-15,21,21	/* DSISR_STORE -> _PAGE_RW */
-BEGIN_MMU_FTR_SECTION
+	bne	handle_page_fault_tramp_2	/* if not, try to put a PTE */
+	rlwinm	r3, r5, 32 - 15, 21, 21		/* DSISR_STORE -> _PAGE_RW */
 	bl	hash_page
-END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
-1:	lwz	r5,_DSISR(r11)		/* get DSISR value */
-	mfspr	r4,SPRN_DAR
-	stw	r4, _DAR(r11)
-	EXC_XFER_LITE(0x300, handle_page_fault)
-
+	b	handle_page_fault_tramp_1
+FTR_SECTION_ELSE
+	b	handle_page_fault_tramp_2
+ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE)
 
 /* Instruction access exception. */
 	. = 0x400
@@ -642,6 +638,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
 
 	. = 0x3000
 
+handle_page_fault_tramp_1:
+	lwz	r4, _DAR(r11)
+	lwz	r5, _DSISR(r11)
+	/* fall through */
+handle_page_fault_tramp_2:
+	EXC_XFER_LITE(0x300, handle_page_fault)
+
 AltiVecUnavailable:
 	EXCEPTION_PROLOG
 #ifdef CONFIG_ALTIVEC
-- 
2.13.3


  parent reply	other threads:[~2019-12-21  8:32 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-21  8:32 [PATCH v5 00/17] Enable CONFIG_VMAP_STACK on PPC32 Christophe Leroy
2019-12-21  8:32 ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 01/17] powerpc/32: replace MTMSRD() by mtmsr Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2020-01-29  5:17   ` Michael Ellerman
2019-12-21  8:32 ` [PATCH v5 02/17] powerpc/32: Add EXCEPTION_PROLOG_0 in head_32.h Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 03/17] powerpc/32: save DEAR/DAR before calling handle_page_fault Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 04/17] powerpc/32: move MSR_PR test into EXCEPTION_PROLOG_0 Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 05/17] powerpc/32: add a macro to get and/or save DAR and DSISR on stack Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 06/17] powerpc/32: prepare for CONFIG_VMAP_STACK Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 07/17] powerpc: align stack to 2 * THREAD_SIZE with VMAP_STACK Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 08/17] powerpc/32: Add early stack overflow detection with VMAP stack Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 09/17] powerpc/32: Use vmapped stacks for interrupts Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 10/17] powerpc/8xx: Use alternative scratch registers in DTLB miss handler Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 11/17] powerpc/8xx: drop exception entries for non-existing exceptions Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 12/17] powerpc/8xx: move DataStoreTLBMiss perf handler Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 13/17] powerpc/8xx: split breakpoint exception Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 14/17] powerpc/8xx: Enable CONFIG_VMAP_STACK Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` Christophe Leroy [this message]
2019-12-21  8:32   ` [PATCH v5 15/17] powerpc/32s: reorganise DSI handler Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 16/17] powerpc/32s: avoid crossing page boundary while changing SRR0/1 Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2019-12-21  8:32 ` [PATCH v5 17/17] powerpc/32s: Enable CONFIG_VMAP_STACK Christophe Leroy
2019-12-21  8:32   ` Christophe Leroy
2020-01-18 12:46   ` Michael Ellerman
2020-01-18 12:46     ` Michael Ellerman
2020-02-06 20:31   ` Guenter Roeck
2020-02-06 20:31     ` Guenter Roeck
2020-02-07  6:13     ` Christophe Leroy
2020-02-07  6:13       ` Christophe Leroy
2020-02-07  8:28       ` Christophe Leroy
2020-02-07  8:28         ` Christophe Leroy
2020-02-07 13:08         ` Guenter Roeck
2020-02-07 13:08           ` Guenter Roeck
2020-02-07 13:29           ` Christophe Leroy
2020-02-07 13:29             ` Christophe Leroy
2020-02-07 13:44             ` Guenter Roeck
2020-02-07 13:44               ` Guenter Roeck
2020-02-07 17:16               ` Christophe Leroy
2020-02-07 17:16                 ` Christophe Leroy

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