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From: <Conor.Dooley@microchip.com>
To: <herbert@gondor.apana.org.au>
Cc: <linux-kernel@vger.kernel.org>, <linux-crypto@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>
Subject: Re: hwrng: mpfs - Enable COMPILE_TEST
Date: Fri, 15 Apr 2022 10:18:41 +0000	[thread overview]
Message-ID: <cf6b0236-32d7-09c3-db00-702a2a92bf71@microchip.com> (raw)
In-Reply-To: <Ylku27J41IMmMe7x@gondor.apana.org.au>

On 15/04/2022 08:37, Herbert Xu wrote:
> The dependency on HW_RANDOM is redundant so this patch removes it.
> As this driver seems to cross-compile just fine we could also enable
> COMPILE_TEST.

Sorry about that. Compile test makes sense to me too.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com

Thanks for applying my patch :)
Conor

> 
> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
> 
> diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
> index 18aa97974b8b..dad084c0ecee 100644
> --- a/drivers/char/hw_random/Kconfig
> +++ b/drivers/char/hw_random/Kconfig
> @@ -387,7 +387,7 @@ config HW_RANDOM_PIC32
>   
>   config HW_RANDOM_POLARFIRE_SOC
>   	tristate "Microchip PolarFire SoC Random Number Generator support"
> -	depends on HW_RANDOM && POLARFIRE_SOC_SYS_CTRL
> +	depends on POLARFIRE_SOC_SYS_CTRL || COMPILE_TEST
>   	help
>   	  This driver provides kernel-side support for the Random Number
>   	  Generator hardware found on PolarFire SoC (MPFS).

WARNING: multiple messages have this Message-ID (diff)
From: <Conor.Dooley@microchip.com>
To: <herbert@gondor.apana.org.au>
Cc: <linux-kernel@vger.kernel.org>, <linux-crypto@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>
Subject: Re: hwrng: mpfs - Enable COMPILE_TEST
Date: Fri, 15 Apr 2022 10:18:41 +0000	[thread overview]
Message-ID: <cf6b0236-32d7-09c3-db00-702a2a92bf71@microchip.com> (raw)
In-Reply-To: <Ylku27J41IMmMe7x@gondor.apana.org.au>

On 15/04/2022 08:37, Herbert Xu wrote:
> The dependency on HW_RANDOM is redundant so this patch removes it.
> As this driver seems to cross-compile just fine we could also enable
> COMPILE_TEST.

Sorry about that. Compile test makes sense to me too.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com

Thanks for applying my patch :)
Conor

> 
> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
> 
> diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
> index 18aa97974b8b..dad084c0ecee 100644
> --- a/drivers/char/hw_random/Kconfig
> +++ b/drivers/char/hw_random/Kconfig
> @@ -387,7 +387,7 @@ config HW_RANDOM_PIC32
>   
>   config HW_RANDOM_POLARFIRE_SOC
>   	tristate "Microchip PolarFire SoC Random Number Generator support"
> -	depends on HW_RANDOM && POLARFIRE_SOC_SYS_CTRL
> +	depends on POLARFIRE_SOC_SYS_CTRL || COMPILE_TEST
>   	help
>   	  This driver provides kernel-side support for the Random Number
>   	  Generator hardware found on PolarFire SoC (MPFS).
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  reply	other threads:[~2022-04-15 10:18 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-08 10:09 [v2] Add support for hwrng on PolarFire SoC conor.dooley
2022-04-08 10:09 ` conor.dooley
2022-04-08 10:09 ` [PATCH v2 1/1] hwrng: mpfs - add polarfire soc hwrng support conor.dooley
2022-04-08 10:09   ` conor.dooley
2022-04-15  8:37   ` hwrng: mpfs - Enable COMPILE_TEST Herbert Xu
2022-04-15  8:37     ` Herbert Xu
2022-04-15 10:18     ` Conor.Dooley [this message]
2022-04-15 10:18       ` Conor.Dooley
2022-04-15 10:20       ` Conor.Dooley
2022-04-15 10:20         ` Conor.Dooley
2022-04-15  8:40   ` [PATCH v2 1/1] hwrng: mpfs - add polarfire soc hwrng support Herbert Xu
2022-04-15  8:40     ` Herbert Xu

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