[cip-dev] [PATCH 0/3] Add CAN support to iwg22d

[cip-dev] [PATCH 0/3] Add CAN support to iwg22d

[Fabrizio Castro]

Hello Ben,

this series backports CAN support for the iwg22d.
This series depends on series "Add PWM and TPU support":
https://lists.cip-project.org/pipermail/cip-dev/2018-July/001400.html

and it applies on top of branch linux-4.4.y-cip, commit
4d769b2b8749e89dfc7ea179a44f652dcfbedb37 ("PM / OPP: Move error
message to debug level").

Thanks,
Fab

Fabrizio Castro (3):
  ARM: dts: r8a7745: Add CAN[01] SoC support
  ARM: dts: iwg22d-sodimm: Add can0 support to carrier board
  ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DB

 .../arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 12 ++++++++
 arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts        | 12 ++++++++
 arch/arm/boot/dts/r8a7745.dtsi                     | 34 ++++++++++++++++++++++
 3 files changed, 58 insertions(+)

-- 
2.7.4

[cip-dev] [PATCH 1/3] ARM: dts: r8a7745: Add CAN[01] SoC support

[Fabrizio Castro]

Add the definitions for can0 and can1 to the SoC .dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 85d3122659be310c632ef1908532157ce82900ee)
(moved nodes to a better location to allow for better sorting.
modified clocks and power-domains properties. removed resets
properties)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7745.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 6fdd3c2..c2e38ae 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -32,6 +32,14 @@
 		spi3 = &msiof2;
 	};
 
+	/* External CAN clock */
+	can_clk: can {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		/* This value must be overridden by the board. */
+		clock-frequency = <0>;
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -844,6 +852,32 @@
 			status = "disabled";
 		};
 
+		can0: can at e6e80000 {
+			compatible = "renesas,can-r8a7745",
+				     "renesas,rcar-gen2-can";
+			reg = <0 0xe6e80000 0 0x1000>;
+			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp9_clks R8A7745_CLK_RCAN0>,
+				 <&cpg_clocks R8A7745_CLK_RCAN>,
+				 <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		can1: can at e6e88000 {
+			compatible = "renesas,can-r8a7745",
+				     "renesas,rcar-gen2-can";
+			reg = <0 0xe6e88000 0 0x1000>;
+			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp9_clks R8A7745_CLK_RCAN1>,
+				 <&cpg_clocks R8A7745_CLK_RCAN>,
+				 <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
 		pci0: pci at ee090000 {
 			compatible = "renesas,pci-r8a7745",
 				     "renesas,pci-rcar-gen2";
-- 
2.7.4

[cip-dev] [PATCH 2/3] ARM: dts: iwg22d-sodimm: Add can0 support to carrier board

[Fabrizio Castro]

This patch enables CAN0 interface exposed through connector J15 on the
carrier board.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 805a5263f4212e431a44c4a04738022a2498f652)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index bffe735..1486565 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -40,6 +40,13 @@
 	};
 };
 
+&can0 {
+	pinctrl-0 = <&can0_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
 &hscif1 {
 	pinctrl-0 = <&hscif1_pins>;
 	pinctrl-names = "default";
@@ -49,6 +56,11 @@
 };
 
 &pfc {
+	can0_pins: can0 {
+		groups = "can0_data";
+		function = "can0";
+	};
+
 	hscif1_pins: hscif1 {
 		groups = "hscif1_data", "hscif1_ctrl";
 		function = "hscif1";
-- 
2.7.4

[cip-dev] [PATCH 3/3] ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DB

[Fabrizio Castro]

CAN1 interface is exposed via connector J1 found on the HDMI daughter
board. This patch enables can1 DT node from within the daughter board
specific device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit d6033e7c6589c74299635eb3d84c56ccac8db5e4)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
index fc0f559..654d28b 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm-dbhd-ca.dts
@@ -54,6 +54,13 @@
 	};
 };
 
+&can1 {
+	pinctrl-0 = <&can1_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
+
 &hscif2 {
 	pinctrl-0 = <&hscif2_pins>;
 	pinctrl-names = "default";
@@ -103,6 +110,11 @@
 };
 
 &pfc {
+	can1_pins: can1 {
+		groups = "can1_data_b";
+		function = "can1";
+	};
+
 	du0_pins: du0 {
 		groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out";
 		function = "du0";
-- 
2.7.4

[cip-dev] [PATCH 0/3] Add CAN support to iwg22d

[Ben Hutchings]

On Tue, 2018-07-24 at 12:03 +0100, Fabrizio Castro wrote:
> Hello Ben,
> 
> this series backports CAN support for the iwg22d.
> This series depends on series "Add PWM and TPU support":
> https://lists.cip-project.org/pipermail/cip-dev/2018-July/001400.html
> 
> and it applies on top of branch linux-4.4.y-cip, commit
> 4d769b2b8749e89dfc7ea179a44f652dcfbedb37 ("PM / OPP: Move error
> message to debug level").

Applied, thanks.

Ben.

-- 
Ben Hutchings, Software Developer                ?        Codethink Ltd
https://www.codethink.co.uk/                 Dale House, 35 Dale Street
                                     Manchester, M1 2HF, United Kingdom