[cip-dev] [PATCH 0/3] Add CMT support to iwg22m

[cip-dev] [PATCH 0/3] Add CMT support to iwg22m

[Fabrizio Castro]

Hello Ben,

this series backports all that is required for CMT to work on the iwg22m
powered by the r8a7745.

This series depends on patch:
https://lists.cip-project.org/pipermail/cip-dev/2018-July/001408.html

and it applies on top of branch linux-4.4.y-cip, commit
4d769b2b8749e89dfc7ea179a44f652dcfbedb37 ("PM / OPP: Move error
message to debug level").

Thanks,
Fab

Benjamin Gaignard (1):
  selftests/timers: make loop consistent with array size

Fabrizio Castro (2):
  ARM: dts: r8a7745: Add CMT SoC specific support
  ARM: dts: iwg22m: Enable cmt0

 arch/arm/boot/dts/r8a7745-iwg22m.dtsi              |  4 +++
 arch/arm/boot/dts/r8a7745.dtsi                     | 32 ++++++++++++++++++++++
 .../testing/selftests/timers/clocksource-switch.c  |  2 +-
 3 files changed, 37 insertions(+), 1 deletion(-)

-- 
2.7.4

[cip-dev] [PATCH 1/3] selftests/timers: make loop consistent with array size

[Fabrizio Castro]

From: Benjamin Gaignard <benjamin.gaignard@linaro.org>

clocksource_list array is defined as char [10][30] so
to initialise it we only have to iterate 10 times.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Shuah Khan <shuahkh@osg.samsung.com>
(cherry picked from commit 8f14e26b63b1b6c7c681409e9db1bbf054e00b32)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 tools/testing/selftests/timers/clocksource-switch.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/timers/clocksource-switch.c b/tools/testing/selftests/timers/clocksource-switch.c
index 627ec74..ad55426 100644
--- a/tools/testing/selftests/timers/clocksource-switch.c
+++ b/tools/testing/selftests/timers/clocksource-switch.c
@@ -61,7 +61,7 @@ int get_clocksources(char list[][30])
 
 	close(fd);
 
-	for (i = 0; i < 30; i++)
+	for (i = 0; i < 10; i++)
 		list[i][0] = '\0';
 
 	head = buf;
-- 
2.7.4

[cip-dev] [PATCH 2/3] ARM: dts: r8a7745: Add CMT SoC specific support

[Fabrizio Castro]

Add CMT[01] support to SoC DT.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 9680c97b516cbb70efe73dde05d497b1203bde6d)
(updated clocks and power-domains properties. removed resets property.
added renesas,channels-mask property. updated compatible strings)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7745.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 0335e45..46fb046 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -1062,6 +1062,38 @@
 			};
 		};
 
+		cmt0: timer at ffca0000 {
+			compatible = "renesas,cmt-48-r8a7745",
+				     "renesas,cmt-48-gen2";
+			reg = <0 0xffca0000 0 0x1004>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp1_clks R8A7745_CLK_CMT0>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			renesas,channels-mask = <0x60>;
+			status = "disabled";
+		};
+
+		cmt1: timer at e6130000 {
+			compatible = "renesas,cmt-48-r8a7745",
+				     "renesas,cmt-48-gen2";
+			reg = <0 0xe6130000 0 0x1004>;
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp3_clks R8A7745_CLK_CMT1>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			renesas,channels-mask = <0xff>;
+			status = "disabled";
+		};
+
 		clocks {
 			#address-cells = <2>;
 			#size-cells = <2>;
-- 
2.7.4

[cip-dev] [PATCH 3/3] ARM: dts: iwg22m: Enable cmt0

[Fabrizio Castro]

This patch enables cmt0 support from within the iwg22m SoM dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 7d1671828696650db6123ab1d7a592a0bbf42ff2)
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
index ed9a8cf..8d0a392b 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
@@ -29,6 +29,10 @@
 	};
 };
 
+&cmt0 {
+	status = "okay";
+};
+
 &extal_clk {
 	clock-frequency = <20000000>;
 };
-- 
2.7.4

[cip-dev] [PATCH 0/3] Add CMT support to iwg22m

[Ben Hutchings]

On Thu, 2018-07-26 at 15:28 +0100, Fabrizio Castro wrote:
> Hello Ben,
> 
> this series backports all that is required for CMT to work on the iwg22m
> powered by the r8a7745.
> 
> This series depends on patch:
> https://lists.cip-project.org/pipermail/cip-dev/2018-July/001408.html
> 
> and it applies on top of branch linux-4.4.y-cip, commit
> 4d769b2b8749e89dfc7ea179a44f652dcfbedb37 ("PM / OPP: Move error
> message to debug level").

Applied, thanks.

Ben.

-- 
Ben Hutchings, Software Developer                ?        Codethink Ltd
https://www.codethink.co.uk/                 Dale House, 35 Dale Street
                                     Manchester, M1 2HF, United Kingdom