* [cip-dev] [PATCH 4.4.y-cip 01/10] dt-bindings: irqchip: renesas-irqc: Document r8a7742 bindings
2020-09-01 11:41 [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Biju Das
@ 2020-09-01 11:41 ` Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 02/10] ARM: dts: r8a7742: Add IRQC support Biju Das
` (9 subsequent siblings)
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From: Biju Das @ 2020-09-01 11:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1359 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit a658d9bcd262421e7e63f4f3693e7e60b18422f3 upstream.
Document SoC specific bindings for RZ/G1H (r8a7742) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../devicetree/bindings/interrupt-controller/renesas,irqc.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
index eea4c7b6a09e..9ab84cb471f6 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
@@ -5,6 +5,7 @@ Required properties:
- compatible: has to be "renesas,irqc-<soctype>", "renesas,irqc" as fallback.
Examples with soctypes are:
- "renesas,irqc-r8a73a4" (R-Mobile APE6)
+ - "renesas,irqc-r8a7742" (RZ/G1H)
- "renesas,irqc-r8a7743" (RZ/G1M)
- "renesas,irqc-r8a7744" (RZ/G1N)
- "renesas,irqc-r8a7745" (RZ/G1E)
--
2.17.1
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^ permalink raw reply related [flat|nested] 13+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 02/10] ARM: dts: r8a7742: Add IRQC support
2020-09-01 11:41 [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 01/10] dt-bindings: irqchip: renesas-irqc: Document r8a7742 bindings Biju Das
@ 2020-09-01 11:41 ` Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 03/10] dt-bindings: i2c: renesas, i2c: Document r8a7742 support Biju Das
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From: Biju Das @ 2020-09-01 11:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1581 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit a31a8c9cbc0762b096e0b176ba481a60e54db5bf upstream.
Describe the IRQC interrupt controller in the r8a7742 device tree.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/1588794695-27852-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: changed clocks and power-domains properties, removed resets property]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 9e26313e09e1..d128fa1d4847 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -700,6 +700,19 @@
reg = <0 0xe6160000 0 0x0100>;
};
+ irqc: interrupt-controller@e61c0000 {
+ compatible = "renesas,irqc-r8a7742", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp4_clks R8A7742_CLK_IRQC>;
+ power-domains = <&cpg_clocks>;
+ };
+
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
--
2.17.1
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^ permalink raw reply related [flat|nested] 13+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 03/10] dt-bindings: i2c: renesas, i2c: Document r8a7742 support
2020-09-01 11:41 [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 01/10] dt-bindings: irqchip: renesas-irqc: Document r8a7742 bindings Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 02/10] ARM: dts: r8a7742: Add IRQC support Biju Das
@ 2020-09-01 11:41 ` Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 04/10] dt-bindings: i2c: renesas, iic: " Biju Das
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From: Biju Das @ 2020-09-01 11:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1357 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 315148547563856f48907633cf89da4dd680f72a upstream.
Document i2c controller for RZ/G1H (R8A7742) SoC, which is compatible
with R-Car Gen2 SoC family.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
[biju: Patched the changes from renamed file]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/i2c/i2c-rcar.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
index 0d1aa9e4c292..3587816115db 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
@@ -2,6 +2,7 @@ I2C for R-Car platforms
Required properties:
- compatible:
+ "renesas,i2c-r8a7742" if the device is a part of a R8A7742 SoC.
"renesas,i2c-r8a7743" if the device is a part of a R8A7743 SoC.
"renesas,i2c-r8a7744" if the device is a part of a R8A7744 SoC.
"renesas,i2c-r8a7745" if the device is a part of a R8A7745 SoC.
--
2.17.1
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^ permalink raw reply related [flat|nested] 13+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 04/10] dt-bindings: i2c: renesas, iic: Document r8a7742 support
2020-09-01 11:41 [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Biju Das
` (2 preceding siblings ...)
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 03/10] dt-bindings: i2c: renesas, i2c: Document r8a7742 support Biju Das
@ 2020-09-01 11:41 ` Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 05/10] ARM: dts: r8a7742: Add I2C and IIC support Biju Das
` (6 subsequent siblings)
10 siblings, 0 replies; 13+ messages in thread
From: Biju Das @ 2020-09-01 11:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1331 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 90f90af71876914f03e4740e263c4738b703fa89 upstream.
Document IIC controller for RZ/G1H (R8A7742) SoC, which is compatible
with R-Car Gen2 SoC family.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
[biju: Pacthed the changes from renamed file]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
index f4727c6ea01e..348d87c5cd06 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
@@ -4,6 +4,7 @@ Required properties:
- compatible :
- "renesas,iic-r8a73a4" (R-Mobile APE6)
- "renesas,iic-r8a7740" (R-Mobile A1)
+ - "renesas,iic-r8a7742" (RZ/G1H)
- "renesas,iic-r8a7743" (RZ/G1M)
- "renesas,iic-r8a7744" (RZ/G1N)
- "renesas,iic-r8a7745" (RZ/G1E)
--
2.17.1
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2020-09-01 11:41 [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Biju Das
` (3 preceding siblings ...)
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 04/10] dt-bindings: i2c: renesas, iic: " Biju Das
@ 2020-09-01 11:41 ` Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 06/10] dt-bindings: net: renesas, ravb: Add support for r8a7742 SoC Biju Das
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10 siblings, 0 replies; 13+ messages in thread
From: Biju Das @ 2020-09-01 11:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 4658 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 9af42b81cfc7f48d5384fc6a6c382dc716b45563 upstream.
Add the I2C[0-3] and IIC[0-3] device nodes to the R8A7742 device tree.
Automatic transmission for PMIC control is not available on IIC3 hence
compatible strings "renesas,rcar-gen2-iic" and "renesas,rmobile-iic" are
not added to iic3 node.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1589555337-5498-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: changed clocks and power-domains properties, removed resets, i2c-scl-internal-delay-ns properties]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742.dtsi | 110 +++++++++++++++++++++++++++++++++
1 file changed, 110 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index d128fa1d4847..6693a54367aa 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -742,6 +742,116 @@
ranges = <0 0 0xe6300000 0x40000>;
};
+ i2c0: i2c@e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7742",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7742_CLK_I2C0>;
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@e6518000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7742",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6518000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7742_CLK_I2C1>;
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@e6530000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7742",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6530000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7742_CLK_I2C2>;
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@e6540000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7742",
+ "renesas,rcar-gen2-i2c";
+ reg = <0 0xe6540000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7742_CLK_I2C3>;
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ iic0: i2c@e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7742",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x425>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7742_CLK_IIC0>;
+ dmas = <&dmac0 0x61>, <&dmac0 0x62>,
+ <&dmac1 0x61>, <&dmac1 0x62>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ iic1: i2c@e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7742",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x425>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7742_CLK_IIC1>;
+ dmas = <&dmac0 0x65>, <&dmac0 0x66>,
+ <&dmac1 0x65>, <&dmac1 0x66>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ iic2: i2c@e6520000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7742",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe6520000 0 0x425>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7742_CLK_IIC2>;
+ dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
+ <&dmac1 0x69>, <&dmac1 0x6a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
+ iic3: i2c@e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7742";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7742_CLK_IICDVFS>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
+
dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a7742",
"renesas,rcar-dmac";
--
2.17.1
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^ permalink raw reply related [flat|nested] 13+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 06/10] dt-bindings: net: renesas, ravb: Add support for r8a7742 SoC
2020-09-01 11:41 [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Biju Das
` (4 preceding siblings ...)
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 05/10] ARM: dts: r8a7742: Add I2C and IIC support Biju Das
@ 2020-09-01 11:41 ` Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 07/10] ARM: dts: r8a7742: Add Ethernet AVB support Biju Das
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From: Biju Das @ 2020-09-01 11:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1276 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 9c95312aad21bf5c6f23a5158d1cd7f42d4560e2 upstream.
Document RZ/G1H (R8A7742) SoC bindings.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/net/renesas,ravb.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
index 0a8e8df01f4b..132d6c72c4d3 100644
--- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
+++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
@@ -5,6 +5,7 @@ interface contains.
Required properties:
- compatible: Must contain one or more of the following:
+ - "renesas,etheravb-r8a7742" for the R8A7742 SoC.
- "renesas,etheravb-r8a7743" for the R8A7743 SoC.
- "renesas,etheravb-r8a7744" for the R8A7744 SoC.
- "renesas,etheravb-r8a7745" for the R8A7745 SoC.
--
2.17.1
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^ permalink raw reply related [flat|nested] 13+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 07/10] ARM: dts: r8a7742: Add Ethernet AVB support
2020-09-01 11:41 [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Biju Das
` (5 preceding siblings ...)
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 06/10] dt-bindings: net: renesas, ravb: Add support for r8a7742 SoC Biju Das
@ 2020-09-01 11:41 ` Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 08/10] ARM: dts: r8a7742-iwg21d-q7: Enable Ethernet AVB Biju Das
` (3 subsequent siblings)
10 siblings, 0 replies; 13+ messages in thread
From: Biju Das @ 2020-09-01 11:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1535 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 9451f394e9cfb30e5a9b66f1022ef7f91717548b upstream.
Add Ethernet AVB support for R8A7742 SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1589555337-5498-13-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: changed clocks and power-domains properties, removed resets property]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 6693a54367aa..3f72658ba96d 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -916,6 +916,18 @@
dma-channels = <15>;
};
+ avb: ethernet@e6800000 {
+ compatible = "renesas,etheravb-r8a7742",
+ "renesas,etheravb-rcar-gen2";
+ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp8_clks R8A7742_CLK_ETHERAVB>;
+ power-domains = <&cpg_clocks>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
scifa2: serial@e6c60000 {
compatible = "renesas,scifa-r8a7742",
"renesas,rcar-gen2-scifa", "renesas,scifa";
--
2.17.1
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^ permalink raw reply related [flat|nested] 13+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 08/10] ARM: dts: r8a7742-iwg21d-q7: Enable Ethernet AVB
2020-09-01 11:41 [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Biju Das
` (6 preceding siblings ...)
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 07/10] ARM: dts: r8a7742: Add Ethernet AVB support Biju Das
@ 2020-09-01 11:41 ` Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 09/10] dt-bindings: power: renesas,apmu: Document r8a7742 support Biju Das
` (2 subsequent siblings)
10 siblings, 0 replies; 13+ messages in thread
From: Biju Das @ 2020-09-01 11:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1413 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 8a8c81aa605cec4a086bd46a9b9214b9671f8f42 upstream.
Enable Ethernet AVB on iWave RZ/G1H carrier board.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590420129-7531-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 1f5c35c66d91..8ce82ad3d946 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -14,6 +14,7 @@
aliases {
serial2 = &scifa2;
+ ethernet0 = &avb;
};
chosen {
@@ -22,7 +23,27 @@
};
};
+&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+
+ phy-handle = <&phy3>;
+ phy-mode = "gmii";
+ renesas,no-ether-link;
+ status = "okay";
+
+ phy3: ethernet-phy@3 {
+ reg = <3>;
+ micrel,led-mode = <1>;
+ };
+};
+
&pfc {
+ avb_pins: avb {
+ groups = "avb_mdio", "avb_gmii";
+ function = "avb";
+ };
+
scifa2_pins: scifa2 {
groups = "scifa2_data_c";
function = "scifa2";
--
2.17.1
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^ permalink raw reply related [flat|nested] 13+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 09/10] dt-bindings: power: renesas,apmu: Document r8a7742 support
2020-09-01 11:41 [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Biju Das
` (7 preceding siblings ...)
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 08/10] ARM: dts: r8a7742-iwg21d-q7: Enable Ethernet AVB Biju Das
@ 2020-09-01 11:41 ` Biju Das
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 10/10] ARM: dts: r8a7742: Add APMU nodes Biju Das
2020-09-01 20:11 ` [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Pavel Machek
10 siblings, 0 replies; 13+ messages in thread
From: Biju Das @ 2020-09-01 11:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1324 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit a08790960382c24d92af43a34626ed0f3899d299 upstream.
Document APMU and SMP enable method for RZ/G1H (also known as r8a7742)
SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
[biju: Patched text version of bindings file]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Documentation/devicetree/bindings/power/renesas,apmu.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.txt b/Documentation/devicetree/bindings/power/renesas,apmu.txt
index 21157fb60f36..8ffb21e20bc4 100644
--- a/Documentation/devicetree/bindings/power/renesas,apmu.txt
+++ b/Documentation/devicetree/bindings/power/renesas,apmu.txt
@@ -7,6 +7,7 @@ Required properties:
- compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.
Examples with soctypes are:
+ - "renesas,r8a7742-apmu" (RZ/G1H)
- "renesas,r8a7743-apmu" (RZ/G1M)
- "renesas,r8a7744-apmu" (RZ/G1N)
- "renesas,r8a7745-apmu" (RZ/G1E)
--
2.17.1
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^ permalink raw reply related [flat|nested] 13+ messages in thread* [cip-dev] [PATCH 4.4.y-cip 10/10] ARM: dts: r8a7742: Add APMU nodes
2020-09-01 11:41 [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Biju Das
` (8 preceding siblings ...)
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 09/10] dt-bindings: power: renesas,apmu: Document r8a7742 support Biju Das
@ 2020-09-01 11:41 ` Biju Das
2020-09-01 20:11 ` [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Pavel Machek
10 siblings, 0 replies; 13+ messages in thread
From: Biju Das @ 2020-09-01 11:41 UTC (permalink / raw)
To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek
Cc: Chris Paterson, Biju Das, Prabhakar Mahadev Lad
[-- Attachment #1: Type: text/plain, Size: 1635 bytes --]
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
commit 57e7dad22bdb4bffa158d32a2e9d5b7145ab1e85 upstream.
Add DT nodes for the Advanced Power Management Units (APMU), and use the
enable-method to point out that the APMU should be used for SMP support.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1589555337-5498-16-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 3f72658ba96d..1db3682a1deb 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -424,6 +424,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
+ enable-method = "renesas,apmu";
cpu0: cpu@0 {
device_type = "cpu";
@@ -695,6 +696,18 @@
reg = <0 0xe6060000 0 0x250>;
};
+ apmu@e6151000 {
+ compatible = "renesas,r8a7742-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
+ };
+
+ apmu@e6152000 {
+ compatible = "renesas,r8a7742-apmu", "renesas,apmu";
+ reg = <0 0xe6152000 0 0x188>;
+ cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
+ };
+
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7742-rst";
reg = <0 0xe6160000 0 0x0100>;
--
2.17.1
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^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H
2020-09-01 11:41 [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Biju Das
` (9 preceding siblings ...)
2020-09-01 11:41 ` [cip-dev] [PATCH 4.4.y-cip 10/10] ARM: dts: r8a7742: Add APMU nodes Biju Das
@ 2020-09-01 20:11 ` Pavel Machek
2020-09-02 1:25 ` Nobuhiro Iwamatsu
10 siblings, 1 reply; 13+ messages in thread
From: Pavel Machek @ 2020-09-01 20:11 UTC (permalink / raw)
To: Biju Das
Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Chris Paterson,
Prabhakar Mahadev Lad
[-- Attachment #1.1: Type: text/plain, Size: 485 bytes --]
Hi!
> This patch series add IRQC/I2C/IIC/AVB/APMU support for iWave RZ/G1H board based on
> r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
> are cherry-picked from mainline.
Series looks good to me. I can apply it if there are no other comments
(and if it passes testing).
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H
2020-09-01 20:11 ` [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H Pavel Machek
@ 2020-09-02 1:25 ` Nobuhiro Iwamatsu
0 siblings, 0 replies; 13+ messages in thread
From: Nobuhiro Iwamatsu @ 2020-09-02 1:25 UTC (permalink / raw)
To: cip-dev, biju.das.jz, pavel; +Cc: chris.paterson2, prabhakar.mahadev-lad.rj
[-- Attachment #1: Type: text/plain, Size: 1235 bytes --]
Hi,
> -----Original Message-----
> From: cip-dev@lists.cip-project.org [mailto:cip-dev@lists.cip-project.org] On Behalf Of Pavel Machek
> Sent: Wednesday, September 2, 2020 5:12 AM
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ)
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Chris Paterson <chris.paterson2@renesas.com>;
> Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [cip-dev] [PATCH 4.4.y-cip 00/10] Add IRQC/I2C/IIC/AVB/APMU support for RZ/G1H
>
> Hi!
>
> > This patch series add IRQC/I2C/IIC/AVB/APMU support for iWave RZ/G1H board based on
> > r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
> > are cherry-picked from mainline.
>
> Series looks good to me. I can apply it if there are no other comments
> (and if it passes testing).
This series looks good to me too. The test seems to be fine.
I applied and pushed.
>
> Best regards,
> Pavel
Best regards,
Nobuhiro
>
> --
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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