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* [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF
@ 2020-10-20 14:57 Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 01/26] PCI: endpoint: Add new pci_epc_ops to get EPC features Lad Prabhakar
                   ` (26 more replies)
  0 siblings, 27 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 2995 bytes --]

Hi All,

This patch series is part of RFC series [1] ("Add PCIe EP support for
Renesas R-Car Gen3 and RZ/G2x"). For making it more cleaner and easier
to review series [1] is split up as suggested by Pavel, patches 1-22,
30, 32, 49, 50  are included in this set from [1].

[1] https://patchwork.kernel.org/project/cip-dev/list/?series=363279

Cheers,
Prabhakar


Alan Mikhak (5):
  PCI: endpoint: Set endpoint controller pointer to NULL
  PCI: endpoint: Allocate enough space for fixed size BAR
  PCI: endpoint: Skip odd BAR when skipping 64bit BAR
  PCI: endpoint: Clear BAR before freeing its space
  PCI: endpoint: Cast the page number to phys_addr_t

Hewenliang (1):
  tools: PCI: Fix fd leakage

Jean-Jacques Hiblot (1):
  tools: PCI: Exit with error code when test fails

Kangjie Lu (1):
  PCI: endpoint: Fix a potential NULL pointer dereference

Kishon Vijay Abraham I (17):
  PCI: endpoint: Add new pci_epc_ops to get EPC features
  PCI: dwc: Add ->get_features() callback function to dw_pcie_ep_ops
  PCI: designware-plat: Populate ->get_features() dw_pcie_ep_ops
  PCI: pci-dra7xx: Populate ->get_features() dw_pcie_ep_ops
  PCI: rockchip: Populate ->get_features() dw_pcie_ep_ops
  PCI: cadence: Populate ->get_features() cdns_pcie_epc_ops
  PCI: endpoint: Add helper to get first unreserved BAR
  PCI: endpoint: Fix pci_epf_alloc_space() to set correct MEM TYPE flags
  PCI: pci-epf-test: Remove setting epf_bar flags in function driver
  PCI: pci-epf-test: Do not allocate next BARs memory if current BAR is
    64Bit
  PCI: pci-epf-test: Use pci_epc_get_features() to get EPC features
  PCI: cadence: Remove pci_epf_linkup() from Cadence EP driver
  PCI: rockchip: Remove pci_epf_linkup() from Rockchip EP driver
  PCI: designware-plat: Remove setting epc->features in Designware plat
    EP driver
  PCI: endpoint: Remove features member in struct pci_epc
  PCI: endpoint: Add support to specify alignment for buffers allocated
    to BARs
  PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table
    address

Kunihiko Hayashi (1):
  PCI: endpoint: Fix clearing start entry in configfs

 drivers/pci/controller/dwc/pci-dra7xx.c       |  13 ++
 .../pci/controller/dwc/pcie-designware-ep.c   |  12 ++
 .../pci/controller/dwc/pcie-designware-plat.c |  17 ++-
 drivers/pci/controller/dwc/pcie-designware.h  |   1 +
 drivers/pci/controller/pcie-cadence-ep.c      |  25 ++--
 drivers/pci/controller/pcie-rockchip-ep.c     |  16 ++-
 drivers/pci/endpoint/functions/pci-epf-test.c | 134 +++++++++++-------
 drivers/pci/endpoint/pci-ep-cfs.c             |   1 +
 drivers/pci/endpoint/pci-epc-core.c           |  56 +++++++-
 drivers/pci/endpoint/pci-epc-mem.c            |   2 +-
 drivers/pci/endpoint/pci-epf-core.c           |  16 ++-
 include/linux/pci-epc.h                       |  33 +++--
 include/linux/pci-epf.h                       |  18 ++-
 tools/pci/pcitest.c                           |   5 +-
 14 files changed, 263 insertions(+), 86 deletions(-)

-- 
2.17.1


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* [cip-dev] [PATCH 4.19.y-cip 01/26] PCI: endpoint: Add new pci_epc_ops to get EPC features
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 02/26] PCI: dwc: Add ->get_features() callback function to dw_pcie_ep_ops Lad Prabhakar
                   ` (25 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 3941 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 41cb8d189c9d4964df52a6f497cab7b301ae831b upstream.

Add a new pci_epc_ops ->get_features() to get the features
supported by the EPC. Since EPC can provide different features to
different functions, the ->get_features() ops takes _func_no_ as
an argument.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/pci-epc-core.c | 30 +++++++++++++++++++++++++++++
 include/linux/pci-epc.h             | 22 +++++++++++++++++++++
 2 files changed, 52 insertions(+)

diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c
index 094dcc3203b8..5a099479d9ab 100644
--- a/drivers/pci/endpoint/pci-epc-core.c
+++ b/drivers/pci/endpoint/pci-epc-core.c
@@ -83,6 +83,36 @@ struct pci_epc *pci_epc_get(const char *epc_name)
 }
 EXPORT_SYMBOL_GPL(pci_epc_get);
 
+/**
+ * pci_epc_get_features() - get the features supported by EPC
+ * @epc: the features supported by *this* EPC device will be returned
+ * @func_no: the features supported by the EPC device specific to the
+ *	     endpoint function with func_no will be returned
+ *
+ * Invoke to get the features provided by the EPC which may be
+ * specific to an endpoint function. Returns pci_epc_features on success
+ * and NULL for any failures.
+ */
+const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc,
+						    u8 func_no)
+{
+	const struct pci_epc_features *epc_features;
+	unsigned long flags;
+
+	if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions)
+		return NULL;
+
+	if (!epc->ops->get_features)
+		return NULL;
+
+	spin_lock_irqsave(&epc->lock, flags);
+	epc_features = epc->ops->get_features(epc, func_no);
+	spin_unlock_irqrestore(&epc->lock, flags);
+
+	return epc_features;
+}
+EXPORT_SYMBOL_GPL(pci_epc_get_features);
+
 /**
  * pci_epc_stop() - stop the PCI link
  * @epc: the link of the EPC device that has to be stopped
diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index 931fda3e5e0d..fcd5e5047546 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -59,6 +59,8 @@ struct pci_epc_ops {
 			     enum pci_epc_irq_type type, u16 interrupt_num);
 	int	(*start)(struct pci_epc *epc);
 	void	(*stop)(struct pci_epc *epc);
+	const struct pci_epc_features* (*get_features)(struct pci_epc *epc,
+						       u8 func_no);
 	struct module *owner;
 };
 
@@ -103,6 +105,24 @@ struct pci_epc {
 	unsigned int			features;
 };
 
+/**
+ * struct pci_epc_features - features supported by a EPC device per function
+ * @linkup_notifier: indicate if the EPC device can notify EPF driver on link up
+ * @msi_capable: indicate if the endpoint function has MSI capability
+ * @msix_capable: indicate if the endpoint function has MSI-X capability
+ * @reserved_bar: bitmap to indicate reserved BAR unavailable to function driver
+ * @bar_fixed_64bit: bitmap to indicate fixed 64bit BARs
+ * @bar_fixed_size: Array specifying the size supported by each BAR
+ */
+struct pci_epc_features {
+	unsigned int	linkup_notifier : 1;
+	unsigned int	msi_capable : 1;
+	unsigned int	msix_capable : 1;
+	u8	reserved_bar;
+	u8	bar_fixed_64bit;
+	u64	bar_fixed_size[BAR_5 + 1];
+};
+
 #define EPC_FEATURE_NO_LINKUP_NOTIFIER		BIT(0)
 #define EPC_FEATURE_BAR_MASK			(BIT(1) | BIT(2) | BIT(3))
 #define EPC_FEATURE_MSIX_AVAILABLE		BIT(4)
@@ -161,6 +181,8 @@ int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
 		      enum pci_epc_irq_type type, u16 interrupt_num);
 int pci_epc_start(struct pci_epc *epc);
 void pci_epc_stop(struct pci_epc *epc);
+const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc,
+						    u8 func_no);
 struct pci_epc *pci_epc_get(const char *epc_name);
 void pci_epc_put(struct pci_epc *epc);
 
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 02/26] PCI: dwc: Add ->get_features() callback function to dw_pcie_ep_ops
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 01/26] PCI: endpoint: Add new pci_epc_ops to get EPC features Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 03/26] PCI: designware-plat: Populate ->get_features() dw_pcie_ep_ops Lad Prabhakar
                   ` (24 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 2354 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit fee35cb76a54c87985410ea6aa12002e5d38b367 upstream.

Each platform using Designware PCIe core can support different set of
endpoint features. Add a new callback function ->get_features() in
dw_pcie_ep_ops so that each platform using Designware PCIe core can
advertise its supported features to the endpoint function driver.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/controller/dwc/pcie-designware-ep.c | 12 ++++++++++++
 drivers/pci/controller/dwc/pcie-designware.h    |  1 +
 2 files changed, 13 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index a3d07d9c598b..d1bb4b852b6c 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -355,6 +355,17 @@ static int dw_pcie_ep_start(struct pci_epc *epc)
 	return pci->ops->start_link(pci);
 }
 
+static const struct pci_epc_features*
+dw_pcie_ep_get_features(struct pci_epc *epc, u8 func_no)
+{
+	struct dw_pcie_ep *ep = epc_get_drvdata(epc);
+
+	if (!ep->ops->get_features)
+		return NULL;
+
+	return ep->ops->get_features(ep);
+}
+
 static const struct pci_epc_ops epc_ops = {
 	.write_header		= dw_pcie_ep_write_header,
 	.set_bar		= dw_pcie_ep_set_bar,
@@ -368,6 +379,7 @@ static const struct pci_epc_ops epc_ops = {
 	.raise_irq		= dw_pcie_ep_raise_irq,
 	.start			= dw_pcie_ep_start,
 	.stop			= dw_pcie_ep_stop,
+	.get_features		= dw_pcie_ep_get_features,
 };
 
 int dw_pcie_ep_raise_legacy_irq(struct dw_pcie_ep *ep, u8 func_no)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 14dcf6646699..90f978f2d1b0 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -181,6 +181,7 @@ struct dw_pcie_ep_ops {
 	void	(*ep_init)(struct dw_pcie_ep *ep);
 	int	(*raise_irq)(struct dw_pcie_ep *ep, u8 func_no,
 			     enum pci_epc_irq_type type, u16 interrupt_num);
+	const struct pci_epc_features* (*get_features)(struct dw_pcie_ep *ep);
 };
 
 struct dw_pcie_ep {
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 03/26] PCI: designware-plat: Populate ->get_features() dw_pcie_ep_ops
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 01/26] PCI: endpoint: Add new pci_epc_ops to get EPC features Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 02/26] PCI: dwc: Add ->get_features() callback function to dw_pcie_ep_ops Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 04/26] PCI: pci-dra7xx: " Lad Prabhakar
                   ` (23 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1494 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 3b4322e589a630fe35944ced5852655fcc4a5d24 upstream.

Populate ->get_features() dw_pcie_ep_ops to return the EPC features
supported by Designware PCIe endpoint controller.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/controller/dwc/pcie-designware-plat.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-designware-plat.c b/drivers/pci/controller/dwc/pcie-designware-plat.c
index c12bf794d69c..bd0516afc86f 100644
--- a/drivers/pci/controller/dwc/pcie-designware-plat.c
+++ b/drivers/pci/controller/dwc/pcie-designware-plat.c
@@ -100,9 +100,22 @@ static int dw_plat_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
 	return 0;
 }
 
+static const struct pci_epc_features dw_plat_pcie_epc_features = {
+	.linkup_notifier = false,
+	.msi_capable = true,
+	.msix_capable = true,
+};
+
+static const struct pci_epc_features*
+dw_plat_pcie_get_features(struct dw_pcie_ep *ep)
+{
+	return &dw_plat_pcie_epc_features;
+}
+
 static struct dw_pcie_ep_ops pcie_ep_ops = {
 	.ep_init = dw_plat_pcie_ep_init,
 	.raise_irq = dw_plat_pcie_ep_raise_irq,
+	.get_features = dw_plat_pcie_get_features,
 };
 
 static int dw_plat_add_pcie_port(struct dw_plat_pcie *dw_plat_pcie,
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 04/26] PCI: pci-dra7xx: Populate ->get_features() dw_pcie_ep_ops
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (2 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 03/26] PCI: designware-plat: Populate ->get_features() dw_pcie_ep_ops Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 05/26] PCI: rockchip: " Lad Prabhakar
                   ` (22 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1424 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 4894467e78619232a79e39c2f26ae8378c4500ed upstream.

Populate ->get_features() dw_pcie_ep_ops to return the EPC features
supported by DRA7xx PCIe endpoint controller.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/controller/dwc/pci-dra7xx.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c
index 412524aa1fde..49417092f5e3 100644
--- a/drivers/pci/controller/dwc/pci-dra7xx.c
+++ b/drivers/pci/controller/dwc/pci-dra7xx.c
@@ -390,9 +390,22 @@ static int dra7xx_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
 	return 0;
 }
 
+static const struct pci_epc_features dra7xx_pcie_epc_features = {
+	.linkup_notifier = true,
+	.msi_capable = true,
+	.msix_capable = false,
+};
+
+static const struct pci_epc_features*
+dra7xx_pcie_get_features(struct dw_pcie_ep *ep)
+{
+	return &dra7xx_pcie_epc_features;
+}
+
 static struct dw_pcie_ep_ops pcie_ep_ops = {
 	.ep_init = dra7xx_pcie_ep_init,
 	.raise_irq = dra7xx_pcie_raise_irq,
+	.get_features = dra7xx_pcie_get_features,
 };
 
 static int __init dra7xx_add_pcie_ep(struct dra7xx_pcie *dra7xx,
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 05/26] PCI: rockchip: Populate ->get_features() dw_pcie_ep_ops
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (3 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 04/26] PCI: pci-dra7xx: " Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 06/26] PCI: cadence: Populate ->get_features() cdns_pcie_epc_ops Lad Prabhakar
                   ` (21 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1677 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 146221768c74bbd969f968b61ec95a0254a6b311 upstream.

Populate ->get_features() dw_pcie_ep_ops to return the EPC features
supported by Rockchip PCIe endpoint controller.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/controller/pcie-rockchip-ep.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index caf34661d38d..ab6478334101 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -505,6 +505,18 @@ static int rockchip_pcie_ep_start(struct pci_epc *epc)
 	return 0;
 }
 
+static const struct pci_epc_features rockchip_pcie_epc_features = {
+	.linkup_notifier = false,
+	.msi_capable = true,
+	.msix_capable = false,
+};
+
+static const struct pci_epc_features*
+rockchip_pcie_ep_get_features(struct pci_epc *epc, u8 func_no)
+{
+	return &rockchip_pcie_epc_features;
+}
+
 static const struct pci_epc_ops rockchip_pcie_epc_ops = {
 	.write_header	= rockchip_pcie_ep_write_header,
 	.set_bar	= rockchip_pcie_ep_set_bar,
@@ -515,6 +527,7 @@ static const struct pci_epc_ops rockchip_pcie_epc_ops = {
 	.get_msi	= rockchip_pcie_ep_get_msi,
 	.raise_irq	= rockchip_pcie_ep_raise_irq,
 	.start		= rockchip_pcie_ep_start,
+	.get_features	= rockchip_pcie_ep_get_features,
 };
 
 static int rockchip_pcie_parse_ep_dt(struct rockchip_pcie *rockchip,
-- 
2.17.1


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* [cip-dev] [PATCH 4.19.y-cip 06/26] PCI: cadence: Populate ->get_features() cdns_pcie_epc_ops
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (4 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 05/26] PCI: rockchip: " Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 07/26] PCI: endpoint: Add helper to get first unreserved BAR Lad Prabhakar
                   ` (20 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1615 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 67c777e6015d857a5e9662c68281d83d946d9b70 upstream.

Populate ->get_features() dw_pcie_ep_ops to return the EPC features
supported by Cadence PCIe endpoint controller.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/controller/pcie-cadence-ep.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/pci/controller/pcie-cadence-ep.c b/drivers/pci/controller/pcie-cadence-ep.c
index c3a088910f48..14c2545bb17e 100644
--- a/drivers/pci/controller/pcie-cadence-ep.c
+++ b/drivers/pci/controller/pcie-cadence-ep.c
@@ -411,6 +411,18 @@ static int cdns_pcie_ep_start(struct pci_epc *epc)
 	return 0;
 }
 
+static const struct pci_epc_features cdns_pcie_epc_features = {
+	.linkup_notifier = false,
+	.msi_capable = true,
+	.msix_capable = false,
+};
+
+static const struct pci_epc_features*
+cdns_pcie_ep_get_features(struct pci_epc *epc, u8 func_no)
+{
+	return &cdns_pcie_epc_features;
+}
+
 static const struct pci_epc_ops cdns_pcie_epc_ops = {
 	.write_header	= cdns_pcie_ep_write_header,
 	.set_bar	= cdns_pcie_ep_set_bar,
@@ -421,6 +433,7 @@ static const struct pci_epc_ops cdns_pcie_epc_ops = {
 	.get_msi	= cdns_pcie_ep_get_msi,
 	.raise_irq	= cdns_pcie_ep_raise_irq,
 	.start		= cdns_pcie_ep_start,
+	.get_features	= cdns_pcie_ep_get_features,
 };
 
 static const struct of_device_id cdns_pcie_ep_of_match[] = {
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 07/26] PCI: endpoint: Add helper to get first unreserved BAR
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (5 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 06/26] PCI: cadence: Populate ->get_features() cdns_pcie_epc_ops Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 08/26] PCI: endpoint: Fix pci_epf_alloc_space() to set correct MEM TYPE flags Lad Prabhakar
                   ` (19 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 2250 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 1e9efe6c9976552e88c6e6feaca3a78b8cf5aaf6 upstream.

Add a helper function pci_epc_get_first_free_bar() to get the first
unreserved BAR that can be used for endpoint function.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/pci-epc-core.c | 23 +++++++++++++++++++++++
 include/linux/pci-epc.h             |  2 ++
 2 files changed, 25 insertions(+)

diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c
index 5a099479d9ab..e4712a0f249c 100644
--- a/drivers/pci/endpoint/pci-epc-core.c
+++ b/drivers/pci/endpoint/pci-epc-core.c
@@ -83,6 +83,29 @@ struct pci_epc *pci_epc_get(const char *epc_name)
 }
 EXPORT_SYMBOL_GPL(pci_epc_get);
 
+/**
+ * pci_epc_get_first_free_bar() - helper to get first unreserved BAR
+ * @epc_features: pci_epc_features structure that holds the reserved bar bitmap
+ *
+ * Invoke to get the first unreserved BAR that can be used for endpoint
+ * function. For any incorrect value in reserved_bar return '0'.
+ */
+unsigned int pci_epc_get_first_free_bar(const struct pci_epc_features
+					*epc_features)
+{
+	int free_bar;
+
+	if (!epc_features)
+		return 0;
+
+	free_bar = ffz(epc_features->reserved_bar);
+	if (free_bar > 5)
+		return 0;
+
+	return free_bar;
+}
+EXPORT_SYMBOL_GPL(pci_epc_get_first_free_bar);
+
 /**
  * pci_epc_get_features() - get the features supported by EPC
  * @epc: the features supported by *this* EPC device will be returned
diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index fcd5e5047546..dcaecf715b1c 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -183,6 +183,8 @@ int pci_epc_start(struct pci_epc *epc);
 void pci_epc_stop(struct pci_epc *epc);
 const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc,
 						    u8 func_no);
+unsigned int pci_epc_get_first_free_bar(const struct pci_epc_features
+					*epc_features);
 struct pci_epc *pci_epc_get(const char *epc_name);
 void pci_epc_put(struct pci_epc *epc);
 
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 08/26] PCI: endpoint: Fix pci_epf_alloc_space() to set correct MEM TYPE flags
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (6 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 07/26] PCI: endpoint: Add helper to get first unreserved BAR Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 09/26] PCI: pci-epf-test: Remove setting epf_bar flags in function driver Lad Prabhakar
                   ` (18 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1237 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 5544d67ed11245ccb64099deb32831308297bf6b upstream.

pci_epf_alloc_space() sets the MEM TYPE flags to indicate a 32-bit
Base Address Register irrespective of the size. Fix it here to indicate
64-bit BAR if the size is > 2GB.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/pci-epf-core.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci-epf-core.c
index 825fa24427a3..8bfdcd291196 100644
--- a/drivers/pci/endpoint/pci-epf-core.c
+++ b/drivers/pci/endpoint/pci-epf-core.c
@@ -131,7 +131,9 @@ void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar)
 	epf->bar[bar].phys_addr = phys_addr;
 	epf->bar[bar].size = size;
 	epf->bar[bar].barno = bar;
-	epf->bar[bar].flags = PCI_BASE_ADDRESS_SPACE_MEMORY;
+	epf->bar[bar].flags |= upper_32_bits(size) ?
+				PCI_BASE_ADDRESS_MEM_TYPE_64 :
+				PCI_BASE_ADDRESS_MEM_TYPE_32;
 
 	return space;
 }
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 09/26] PCI: pci-epf-test: Remove setting epf_bar flags in function driver
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (7 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 08/26] PCI: endpoint: Fix pci_epf_alloc_space() to set correct MEM TYPE flags Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 10/26] PCI: pci-epf-test: Do not allocate next BARs memory if current BAR is 64Bit Lad Prabhakar
                   ` (17 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1227 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 0342e9a797db42a7d4d083d10b5d3f38b0cfc193 upstream.

Now that pci_epf_alloc_space() sets BAR MEM TYPE flags as 64Bit or
32Bit based on size, remove setting it in function driver.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/functions/pci-epf-test.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
index 4bbd26e8a9e2..ad0efa4446ba 100644
--- a/drivers/pci/endpoint/functions/pci-epf-test.c
+++ b/drivers/pci/endpoint/functions/pci-epf-test.c
@@ -406,10 +406,6 @@ static int pci_epf_test_set_bar(struct pci_epf *epf)
 	for (bar = BAR_0; bar <= BAR_5; bar++) {
 		epf_bar = &epf->bar[bar];
 
-		epf_bar->flags |= upper_32_bits(epf_bar->size) ?
-			PCI_BASE_ADDRESS_MEM_TYPE_64 :
-			PCI_BASE_ADDRESS_MEM_TYPE_32;
-
 		ret = pci_epc_set_bar(epc, epf->func_no, epf_bar);
 		if (ret) {
 			pci_epf_free_space(epf, epf_test->reg[bar], bar);
-- 
2.17.1


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* [cip-dev] [PATCH 4.19.y-cip 10/26] PCI: pci-epf-test: Do not allocate next BARs memory if current BAR is 64Bit
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (8 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 09/26] PCI: pci-epf-test: Remove setting epf_bar flags in function driver Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 11/26] PCI: pci-epf-test: Use pci_epc_get_features() to get EPC features Lad Prabhakar
                   ` (16 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1713 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit b866c56b66d88a632e2fa6b922c4ea051937acbd upstream.

It's useless to allocate memory for next BAR if the current BAR is a
64Bit BAR. Stop allocating memory for the next BAR, if the current
BARs flag indicates this is a 64Bit BAR.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/functions/pci-epf-test.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
index ad0efa4446ba..a385927a9239 100644
--- a/drivers/pci/endpoint/functions/pci-epf-test.c
+++ b/drivers/pci/endpoint/functions/pci-epf-test.c
@@ -429,6 +429,7 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 {
 	struct pci_epf_test *epf_test = epf_get_drvdata(epf);
 	struct device *dev = &epf->dev;
+	struct pci_epf_bar *epf_bar;
 	void *base;
 	int bar;
 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
@@ -442,6 +443,7 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 	epf_test->reg[test_reg_bar] = base;
 
 	for (bar = BAR_0; bar <= BAR_5; bar++) {
+		epf_bar = &epf->bar[bar];
 		if (bar == test_reg_bar)
 			continue;
 		base = pci_epf_alloc_space(epf, bar_size[bar], bar);
@@ -449,6 +451,8 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 			dev_err(dev, "Failed to allocate space for BAR%d\n",
 				bar);
 		epf_test->reg[bar] = base;
+		if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
+			bar++;
 	}
 
 	return 0;
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 11/26] PCI: pci-epf-test: Use pci_epc_get_features() to get EPC features
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (9 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 10/26] PCI: pci-epf-test: Do not allocate next BARs memory if current BAR is 64Bit Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 12/26] PCI: cadence: Remove pci_epf_linkup() from Cadence EP driver Lad Prabhakar
                   ` (15 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 6439 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 2c04c5b8eef797dca99699cfb55ff42dd3c12c23 upstream.

Use pci_epc_get_features() to get EPC features such as linkup
notifier support, MSI/MSIX capable, BAR configuration etc and use it
for configuring pci-epf-test. Since these features are now obtained
directly from EPC driver, remove pci_epf_test_data which was initially
added to have EPC features in endpoint function driver.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/functions/pci-epf-test.c | 87 ++++++++++++-------
 1 file changed, 54 insertions(+), 33 deletions(-)

diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
index a385927a9239..d0b91da49bf4 100644
--- a/drivers/pci/endpoint/functions/pci-epf-test.c
+++ b/drivers/pci/endpoint/functions/pci-epf-test.c
@@ -47,9 +47,8 @@ struct pci_epf_test {
 	void			*reg[6];
 	struct pci_epf		*epf;
 	enum pci_barno		test_reg_bar;
-	bool			linkup_notifier;
-	bool			msix_available;
 	struct delayed_work	cmd_handler;
+	const struct pci_epc_features *epc_features;
 };
 
 struct pci_epf_test_reg {
@@ -71,11 +70,6 @@ static struct pci_epf_header test_header = {
 	.interrupt_pin	= PCI_INTERRUPT_INTA,
 };
 
-struct pci_epf_test_data {
-	enum pci_barno	test_reg_bar;
-	bool		linkup_notifier;
-};
-
 static size_t bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 };
 
 static int pci_epf_test_copy(struct pci_epf_test *epf_test)
@@ -402,10 +396,16 @@ static int pci_epf_test_set_bar(struct pci_epf *epf)
 	struct device *dev = &epf->dev;
 	struct pci_epf_test *epf_test = epf_get_drvdata(epf);
 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
+	const struct pci_epc_features *epc_features;
+
+	epc_features = epf_test->epc_features;
 
 	for (bar = BAR_0; bar <= BAR_5; bar++) {
 		epf_bar = &epf->bar[bar];
 
+		if (!!(epc_features->reserved_bar & (1 << bar)))
+			continue;
+
 		ret = pci_epc_set_bar(epc, epf->func_no, epf_bar);
 		if (ret) {
 			pci_epf_free_space(epf, epf_test->reg[bar], bar);
@@ -433,6 +433,9 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 	void *base;
 	int bar;
 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
+	const struct pci_epc_features *epc_features;
+
+	epc_features = epf_test->epc_features;
 
 	base = pci_epf_alloc_space(epf, sizeof(struct pci_epf_test_reg),
 				   test_reg_bar);
@@ -446,6 +449,10 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 		epf_bar = &epf->bar[bar];
 		if (bar == test_reg_bar)
 			continue;
+
+		if (!!(epc_features->reserved_bar & (1 << bar)))
+			continue;
+
 		base = pci_epf_alloc_space(epf, bar_size[bar], bar);
 		if (!base)
 			dev_err(dev, "Failed to allocate space for BAR%d\n",
@@ -458,25 +465,50 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 	return 0;
 }
 
+static void pci_epf_configure_bar(struct pci_epf *epf,
+				  const struct pci_epc_features *epc_features)
+{
+	struct pci_epf_bar *epf_bar;
+	bool bar_fixed_64bit;
+	int i;
+
+	for (i = BAR_0; i <= BAR_5; i++) {
+		epf_bar = &epf->bar[i];
+		bar_fixed_64bit = !!(epc_features->bar_fixed_64bit & (1 << i));
+		if (bar_fixed_64bit)
+			epf_bar->flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
+		if (epc_features->bar_fixed_size[i])
+			bar_size[i] = epc_features->bar_fixed_size[i];
+	}
+}
+
 static int pci_epf_test_bind(struct pci_epf *epf)
 {
 	int ret;
 	struct pci_epf_test *epf_test = epf_get_drvdata(epf);
 	struct pci_epf_header *header = epf->header;
+	const struct pci_epc_features *epc_features;
+	enum pci_barno test_reg_bar = BAR_0;
 	struct pci_epc *epc = epf->epc;
 	struct device *dev = &epf->dev;
+	bool linkup_notifier = false;
+	bool msix_capable = false;
+	bool msi_capable = true;
 
 	if (WARN_ON_ONCE(!epc))
 		return -EINVAL;
 
-	if (epc->features & EPC_FEATURE_NO_LINKUP_NOTIFIER)
-		epf_test->linkup_notifier = false;
-	else
-		epf_test->linkup_notifier = true;
-
-	epf_test->msix_available = epc->features & EPC_FEATURE_MSIX_AVAILABLE;
+	epc_features = pci_epc_get_features(epc, epf->func_no);
+	if (epc_features) {
+		linkup_notifier = epc_features->linkup_notifier;
+		msix_capable = epc_features->msix_capable;
+		msi_capable = epc_features->msi_capable;
+		test_reg_bar = pci_epc_get_first_free_bar(epc_features);
+		pci_epf_configure_bar(epf, epc_features);
+	}
 
-	epf_test->test_reg_bar = EPC_FEATURE_GET_BAR(epc->features);
+	epf_test->test_reg_bar = test_reg_bar;
+	epf_test->epc_features = epc_features;
 
 	ret = pci_epc_write_header(epc, epf->func_no, header);
 	if (ret) {
@@ -492,13 +524,15 @@ static int pci_epf_test_bind(struct pci_epf *epf)
 	if (ret)
 		return ret;
 
-	ret = pci_epc_set_msi(epc, epf->func_no, epf->msi_interrupts);
-	if (ret) {
-		dev_err(dev, "MSI configuration failed\n");
-		return ret;
+	if (msi_capable) {
+		ret = pci_epc_set_msi(epc, epf->func_no, epf->msi_interrupts);
+		if (ret) {
+			dev_err(dev, "MSI configuration failed\n");
+			return ret;
+		}
 	}
 
-	if (epf_test->msix_available) {
+	if (msix_capable) {
 		ret = pci_epc_set_msix(epc, epf->func_no, epf->msix_interrupts);
 		if (ret) {
 			dev_err(dev, "MSI-X configuration failed\n");
@@ -506,7 +540,7 @@ static int pci_epf_test_bind(struct pci_epf *epf)
 		}
 	}
 
-	if (!epf_test->linkup_notifier)
+	if (!linkup_notifier)
 		queue_work(kpcitest_workqueue, &epf_test->cmd_handler.work);
 
 	return 0;
@@ -523,17 +557,6 @@ static int pci_epf_test_probe(struct pci_epf *epf)
 {
 	struct pci_epf_test *epf_test;
 	struct device *dev = &epf->dev;
-	const struct pci_epf_device_id *match;
-	struct pci_epf_test_data *data;
-	enum pci_barno test_reg_bar = BAR_0;
-	bool linkup_notifier = true;
-
-	match = pci_epf_match_device(pci_epf_test_ids, epf);
-	data = (struct pci_epf_test_data *)match->driver_data;
-	if (data) {
-		test_reg_bar = data->test_reg_bar;
-		linkup_notifier = data->linkup_notifier;
-	}
 
 	epf_test = devm_kzalloc(dev, sizeof(*epf_test), GFP_KERNEL);
 	if (!epf_test)
@@ -541,8 +564,6 @@ static int pci_epf_test_probe(struct pci_epf *epf)
 
 	epf->header = &test_header;
 	epf_test->epf = epf;
-	epf_test->test_reg_bar = test_reg_bar;
-	epf_test->linkup_notifier = linkup_notifier;
 
 	INIT_DELAYED_WORK(&epf_test->cmd_handler, pci_epf_test_cmd_handler);
 
-- 
2.17.1


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* [cip-dev] [PATCH 4.19.y-cip 12/26] PCI: cadence: Remove pci_epf_linkup() from Cadence EP driver
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (10 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 11/26] PCI: pci-epf-test: Use pci_epc_get_features() to get EPC features Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 13/26] PCI: rockchip: Remove pci_epf_linkup() from Rockchip " Lad Prabhakar
                   ` (14 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1583 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit c274c9f4ea758bd6667a363f275e45275f2b5672 upstream.

pci_epf_linkup() is intended to be invoked if the EPC supports linkup
notification. Now that pci-epf-test uses the get_features() callback,
which indicates Cadence EP driver doesn't support the linkup notification,
remove pci_epf_linkup() from Cadence EP driver.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/controller/pcie-cadence-ep.c | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/drivers/pci/controller/pcie-cadence-ep.c b/drivers/pci/controller/pcie-cadence-ep.c
index 14c2545bb17e..def7820cb824 100644
--- a/drivers/pci/controller/pcie-cadence-ep.c
+++ b/drivers/pci/controller/pcie-cadence-ep.c
@@ -396,18 +396,6 @@ static int cdns_pcie_ep_start(struct pci_epc *epc)
 		cfg |= BIT(epf->func_no);
 	cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, cfg);
 
-	/*
-	 * The PCIe links are automatically established by the controller
-	 * once for all at powerup: the software can neither start nor stop
-	 * those links later at runtime.
-	 *
-	 * Then we only have to notify the EP core that our links are already
-	 * established. However we don't call directly pci_epc_linkup() because
-	 * we've already locked the epc->lock.
-	 */
-	list_for_each_entry(epf, &epc->pci_epf, list)
-		pci_epf_linkup(epf);
-
 	return 0;
 }
 
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 13/26] PCI: rockchip: Remove pci_epf_linkup() from Rockchip EP driver
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (11 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 12/26] PCI: cadence: Remove pci_epf_linkup() from Cadence EP driver Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 14/26] PCI: designware-plat: Remove setting epc->features in Designware plat " Lad Prabhakar
                   ` (13 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1221 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit f1267978457e77ae7ddabe82ad48cf34f54e96fb upstream.

pci_epf_linkup() is intended to be invoked if the EPC supports linkup
notification. Now that pci-epf-test uses get_features callback, which
indicates Rockchip EP driver doesn't support linkup notification, remove
pci_epf_linkup() from Rockchip EP driver.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/controller/pcie-rockchip-ep.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index ab6478334101..d743b0a48988 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -499,9 +499,6 @@ static int rockchip_pcie_ep_start(struct pci_epc *epc)
 
 	rockchip_pcie_write(rockchip, cfg, PCIE_CORE_PHY_FUNC_CFG);
 
-	list_for_each_entry(epf, &epc->pci_epf, list)
-		pci_epf_linkup(epf);
-
 	return 0;
 }
 
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 14/26] PCI: designware-plat: Remove setting epc->features in Designware plat EP driver
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (12 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 13/26] PCI: rockchip: Remove pci_epf_linkup() from Rockchip " Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 15/26] PCI: endpoint: Remove features member in struct pci_epc Lad Prabhakar
                   ` (12 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1489 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 92f2b028418c6f59f92703eed111136ca0d22c39 upstream.

Now that pci-epf-test uses get_features callback and
dw_plat_pcie_epc_features in Designware plat EP driver already indicates
it doesn't support linkup notification and is MSIX capable, remove setting
epc->features which is not used anymore by the endpoint function driver.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/controller/dwc/pcie-designware-plat.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware-plat.c b/drivers/pci/controller/dwc/pcie-designware-plat.c
index bd0516afc86f..3be87126aef3 100644
--- a/drivers/pci/controller/dwc/pcie-designware-plat.c
+++ b/drivers/pci/controller/dwc/pcie-designware-plat.c
@@ -70,14 +70,10 @@ static const struct dw_pcie_ops dw_pcie_ops = {
 static void dw_plat_pcie_ep_init(struct dw_pcie_ep *ep)
 {
 	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
-	struct pci_epc *epc = ep->epc;
 	enum pci_barno bar;
 
 	for (bar = BAR_0; bar <= BAR_5; bar++)
 		dw_pcie_ep_reset_bar(pci, bar);
-
-	epc->features |= EPC_FEATURE_NO_LINKUP_NOTIFIER;
-	epc->features |= EPC_FEATURE_MSIX_AVAILABLE;
 }
 
 static int dw_plat_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
-- 
2.17.1


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* [cip-dev] [PATCH 4.19.y-cip 15/26] PCI: endpoint: Remove features member in struct pci_epc
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (13 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 14/26] PCI: designware-plat: Remove setting epc->features in Designware plat " Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 16/26] PCI: endpoint: Fix a potential NULL pointer dereference Lad Prabhakar
                   ` (11 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1558 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 35ce0d7922d68021062a955407740d262f9ac811 upstream.

Since EPC features are now implemented using pci_epc_features and
all the EPC drivers are moved to using pci_epc_features, remove
features member in struct pci_epc and all the helper macros for
configuring the features.

Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 include/linux/pci-epc.h | 9 ---------
 1 file changed, 9 deletions(-)

diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index dcaecf715b1c..b3a3c0805603 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -102,7 +102,6 @@ struct pci_epc {
 	struct config_group		*group;
 	/* spinlock to protect against concurrent access of EP controller */
 	spinlock_t			lock;
-	unsigned int			features;
 };
 
 /**
@@ -123,14 +122,6 @@ struct pci_epc_features {
 	u64	bar_fixed_size[BAR_5 + 1];
 };
 
-#define EPC_FEATURE_NO_LINKUP_NOTIFIER		BIT(0)
-#define EPC_FEATURE_BAR_MASK			(BIT(1) | BIT(2) | BIT(3))
-#define EPC_FEATURE_MSIX_AVAILABLE		BIT(4)
-#define EPC_FEATURE_SET_BAR(features, bar)	\
-		(features |= (EPC_FEATURE_BAR_MASK & (bar << 1)))
-#define EPC_FEATURE_GET_BAR(features)		\
-		((features & EPC_FEATURE_BAR_MASK) >> 1)
-
 #define to_pci_epc(device) container_of((device), struct pci_epc, dev)
 
 #define pci_epc_create(dev, ops)    \
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 16/26] PCI: endpoint: Fix a potential NULL pointer dereference
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (14 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 15/26] PCI: endpoint: Remove features member in struct pci_epc Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 17/26] PCI: endpoint: Add support to specify alignment for buffers allocated to BARs Lad Prabhakar
                   ` (10 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1174 bytes --]

From: Kangjie Lu <kjlu@umn.edu>

commit 507b820009a457afa78202da337bcb56791fbb12 upstream.

In case alloc_workqueue() fails, return -ENOMEM to avoid
potential NULL pointer dereferences.

Signed-off-by: Kangjie Lu <kjlu@umn.edu>
[lorenzo.pieralisi@arm.com: commit log and code update]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/functions/pci-epf-test.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
index d0b91da49bf4..ed5cd28b9572 100644
--- a/drivers/pci/endpoint/functions/pci-epf-test.c
+++ b/drivers/pci/endpoint/functions/pci-epf-test.c
@@ -591,6 +591,11 @@ static int __init pci_epf_test_init(void)
 
 	kpcitest_workqueue = alloc_workqueue("kpcitest",
 					     WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
+	if (!kpcitest_workqueue) {
+		pr_err("Failed to allocate the kpcitest work queue\n");
+		return -ENOMEM;
+	}
+
 	ret = pci_epf_register_driver(&test_driver);
 	if (ret) {
 		pr_err("Failed to register pci epf test driver --> %d\n", ret);
-- 
2.17.1


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* [cip-dev] [PATCH 4.19.y-cip 17/26] PCI: endpoint: Add support to specify alignment for buffers allocated to BARs
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (15 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 16/26] PCI: endpoint: Fix a potential NULL pointer dereference Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 18/26] PCI: endpoint: Set endpoint controller pointer to NULL Lad Prabhakar
                   ` (9 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 5289 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 2a9a801620efac92885fc9cd53594c0b9aba87a4 upstream.

The address that is allocated using pci_epf_alloc_space() is
directly written to the target address of the Inbound Address
Translation unit (ie the HW component implementing inbound address
decoding) on endpoint controllers.

Designware IP [1] has a configuration parameter (CX_ATU_MIN_REGION_SIZE
[2]) which has 64KB as default value and the lower 16 bits of the Base,
Limit and Target registers of the Inbound ATU are fixed to zero. If the
programmed memory address is not aligned to 64 KB boundary this causes
memory corruption.

Modify pci_epf_alloc_space() API to take alignment size as argument in
order to allocate buffers to be mapped to BARs with an alignment that
suits the platform where they are used.

Add an 'align' parameter to epc_features which can be used by platform
drivers to specify the BAR allocation alignment requirements and use
this while invoking pci_epf_alloc_space().

[1] "I/O and MEM Match Modes" section in DesignWare Cores PCI Express
     Controller Databook version 4.90a
[2]  http://www.ti.com/lit/ug/spruid7c/spruid7c.pdf

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/functions/pci-epf-test.c |  5 +++--
 drivers/pci/endpoint/pci-epf-core.c           | 10 ++++++++--
 include/linux/pci-epc.h                       |  2 ++
 include/linux/pci-epf.h                       |  3 ++-
 4 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
index ed5cd28b9572..27806987e93b 100644
--- a/drivers/pci/endpoint/functions/pci-epf-test.c
+++ b/drivers/pci/endpoint/functions/pci-epf-test.c
@@ -438,7 +438,7 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 	epc_features = epf_test->epc_features;
 
 	base = pci_epf_alloc_space(epf, sizeof(struct pci_epf_test_reg),
-				   test_reg_bar);
+				   test_reg_bar, epc_features->align);
 	if (!base) {
 		dev_err(dev, "Failed to allocated register space\n");
 		return -ENOMEM;
@@ -453,7 +453,8 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 		if (!!(epc_features->reserved_bar & (1 << bar)))
 			continue;
 
-		base = pci_epf_alloc_space(epf, bar_size[bar], bar);
+		base = pci_epf_alloc_space(epf, bar_size[bar], bar,
+					   epc_features->align);
 		if (!base)
 			dev_err(dev, "Failed to allocate space for BAR%d\n",
 				bar);
diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci-epf-core.c
index 8bfdcd291196..fb1306de8f40 100644
--- a/drivers/pci/endpoint/pci-epf-core.c
+++ b/drivers/pci/endpoint/pci-epf-core.c
@@ -109,10 +109,12 @@ EXPORT_SYMBOL_GPL(pci_epf_free_space);
  * pci_epf_alloc_space() - allocate memory for the PCI EPF register space
  * @size: the size of the memory that has to be allocated
  * @bar: the BAR number corresponding to the allocated register space
+ * @align: alignment size for the allocation region
  *
  * Invoke to allocate memory for the PCI EPF register space.
  */
-void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar)
+void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar,
+			  size_t align)
 {
 	void *space;
 	struct device *dev = epf->epc->dev.parent;
@@ -120,7 +122,11 @@ void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar)
 
 	if (size < 128)
 		size = 128;
-	size = roundup_pow_of_two(size);
+
+	if (align)
+		size = ALIGN(size, align);
+	else
+		size = roundup_pow_of_two(size);
 
 	space = dma_alloc_coherent(dev, size, &phys_addr, GFP_KERNEL);
 	if (!space) {
diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index b3a3c0805603..0c12d69dde92 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -112,6 +112,7 @@ struct pci_epc {
  * @reserved_bar: bitmap to indicate reserved BAR unavailable to function driver
  * @bar_fixed_64bit: bitmap to indicate fixed 64bit BARs
  * @bar_fixed_size: Array specifying the size supported by each BAR
+ * @align: alignment size required for BAR buffer allocation
  */
 struct pci_epc_features {
 	unsigned int	linkup_notifier : 1;
@@ -120,6 +121,7 @@ struct pci_epc_features {
 	u8	reserved_bar;
 	u8	bar_fixed_64bit;
 	u64	bar_fixed_size[BAR_5 + 1];
+	size_t	align;
 };
 
 #define to_pci_epc(device) container_of((device), struct pci_epc, dev)
diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h
index ec02f58758c8..2d6f07556682 100644
--- a/include/linux/pci-epf.h
+++ b/include/linux/pci-epf.h
@@ -149,7 +149,8 @@ void pci_epf_destroy(struct pci_epf *epf);
 int __pci_epf_register_driver(struct pci_epf_driver *driver,
 			      struct module *owner);
 void pci_epf_unregister_driver(struct pci_epf_driver *driver);
-void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar);
+void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar,
+			  size_t align);
 void pci_epf_free_space(struct pci_epf *epf, void *addr, enum pci_barno bar);
 int pci_epf_bind(struct pci_epf *epf);
 void pci_epf_unbind(struct pci_epf *epf);
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 18/26] PCI: endpoint: Set endpoint controller pointer to NULL
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (16 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 17/26] PCI: endpoint: Add support to specify alignment for buffers allocated to BARs Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 19/26] PCI: endpoint: Allocate enough space for fixed size BAR Lad Prabhakar
                   ` (8 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1190 bytes --]

From: Alan Mikhak <alan.mikhak@sifive.com>

commit db7a62482d2f6a63f36f30f62c4cbf1e53035719 upstream.

Set endpoint controller pointer to NULL in pci_epc_remove_epf()
to avoid -EBUSY on subsequent call to pci_epc_add_epf().

Add a check for NULL endpoint function pointer.

Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/pci-epc-core.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c
index e4712a0f249c..2091508c1620 100644
--- a/drivers/pci/endpoint/pci-epc-core.c
+++ b/drivers/pci/endpoint/pci-epc-core.c
@@ -519,11 +519,12 @@ void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf)
 {
 	unsigned long flags;
 
-	if (!epc || IS_ERR(epc))
+	if (!epc || IS_ERR(epc) || !epf)
 		return;
 
 	spin_lock_irqsave(&epc->lock, flags);
 	list_del(&epf->list);
+	epf->epc = NULL;
 	spin_unlock_irqrestore(&epc->lock, flags);
 }
 EXPORT_SYMBOL_GPL(pci_epc_remove_epf);
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 19/26] PCI: endpoint: Allocate enough space for fixed size BAR
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (17 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 18/26] PCI: endpoint: Set endpoint controller pointer to NULL Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 20/26] PCI: endpoint: Skip odd BAR when skipping 64bit BAR Lad Prabhakar
                   ` (7 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1652 bytes --]

From: Alan Mikhak <alan.mikhak@sifive.com>

commit f16fb16ed16c7f561e9c41c9ae4107c7f6aa553c upstream.

PCI endpoint test function code should honor the .bar_fixed_size parameter
from underlying endpoint controller drivers or results may be unexpected.

In pci_epf_test_alloc_space(), check if BAR being used for test
register space is a fixed size BAR. If so, allocate the required fixed
size.

Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/functions/pci-epf-test.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
index 27806987e93b..7d41e6684b87 100644
--- a/drivers/pci/endpoint/functions/pci-epf-test.c
+++ b/drivers/pci/endpoint/functions/pci-epf-test.c
@@ -434,10 +434,16 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 	int bar;
 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
 	const struct pci_epc_features *epc_features;
+	size_t test_reg_size;
 
 	epc_features = epf_test->epc_features;
 
-	base = pci_epf_alloc_space(epf, sizeof(struct pci_epf_test_reg),
+	if (epc_features->bar_fixed_size[test_reg_bar])
+		test_reg_size = bar_size[test_reg_bar];
+	else
+		test_reg_size = sizeof(struct pci_epf_test_reg);
+
+	base = pci_epf_alloc_space(epf, test_reg_size,
 				   test_reg_bar, epc_features->align);
 	if (!base) {
 		dev_err(dev, "Failed to allocated register space\n");
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 20/26] PCI: endpoint: Skip odd BAR when skipping 64bit BAR
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (18 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 19/26] PCI: endpoint: Allocate enough space for fixed size BAR Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 21/26] PCI: endpoint: Clear BAR before freeing its space Lad Prabhakar
                   ` (6 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 3278 bytes --]

From: Alan Mikhak <alan.mikhak@sifive.com>

commit 3041a643613a2530ade35a9ae97709a9da4c0c72 upstream.

Always skip odd BAR when skipping 64bit BARs in pci_epf_test_set_bar()
and pci_epf_test_alloc_space() otherwise pci_epf_test_set_bar() will
call pci_epc_set_bar() on an odd loop index when skipping reserved 64bit
BAR.

Moreover, pci_epf_test_alloc_space() will call pci_epf_alloc_space() on
bind for an odd loop index when BAR is 64bit but leaks on subsequent
unbind by not calling pci_epf_free_space().

Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/functions/pci-epf-test.c | 25 +++++++++----------
 1 file changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
index 7d41e6684b87..e8bcc924dbf8 100644
--- a/drivers/pci/endpoint/functions/pci-epf-test.c
+++ b/drivers/pci/endpoint/functions/pci-epf-test.c
@@ -389,7 +389,7 @@ static void pci_epf_test_unbind(struct pci_epf *epf)
 
 static int pci_epf_test_set_bar(struct pci_epf *epf)
 {
-	int bar;
+	int bar, add;
 	int ret;
 	struct pci_epf_bar *epf_bar;
 	struct pci_epc *epc = epf->epc;
@@ -400,8 +400,14 @@ static int pci_epf_test_set_bar(struct pci_epf *epf)
 
 	epc_features = epf_test->epc_features;
 
-	for (bar = BAR_0; bar <= BAR_5; bar++) {
+	for (bar = BAR_0; bar <= BAR_5; bar += add) {
 		epf_bar = &epf->bar[bar];
+		/*
+		 * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64
+		 * if the specific implementation required a 64-bit BAR,
+		 * even if we only requested a 32-bit BAR.
+		 */
+		add = (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 2 : 1;
 
 		if (!!(epc_features->reserved_bar & (1 << bar)))
 			continue;
@@ -413,13 +419,6 @@ static int pci_epf_test_set_bar(struct pci_epf *epf)
 			if (bar == test_reg_bar)
 				return ret;
 		}
-		/*
-		 * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64
-		 * if the specific implementation required a 64-bit BAR,
-		 * even if we only requested a 32-bit BAR.
-		 */
-		if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
-			bar++;
 	}
 
 	return 0;
@@ -431,7 +430,7 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 	struct device *dev = &epf->dev;
 	struct pci_epf_bar *epf_bar;
 	void *base;
-	int bar;
+	int bar, add;
 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
 	const struct pci_epc_features *epc_features;
 	size_t test_reg_size;
@@ -451,8 +450,10 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 	}
 	epf_test->reg[test_reg_bar] = base;
 
-	for (bar = BAR_0; bar <= BAR_5; bar++) {
+	for (bar = BAR_0; bar <= BAR_5; bar += add) {
 		epf_bar = &epf->bar[bar];
+		add = (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 2 : 1;
+
 		if (bar == test_reg_bar)
 			continue;
 
@@ -465,8 +466,6 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
 			dev_err(dev, "Failed to allocate space for BAR%d\n",
 				bar);
 		epf_test->reg[bar] = base;
-		if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
-			bar++;
 	}
 
 	return 0;
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [cip-dev] [PATCH 4.19.y-cip 21/26] PCI: endpoint: Clear BAR before freeing its space
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (19 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 20/26] PCI: endpoint: Skip odd BAR when skipping 64bit BAR Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 22/26] PCI: endpoint: Cast the page number to phys_addr_t Lad Prabhakar
                   ` (5 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1351 bytes --]

From: Alan Mikhak <alan.mikhak@sifive.com>

commit dbb7bbcc8ad248b1ab05bd27dfdb587ef4023dab upstream.

Associated pci_epf_bar structure is needed in pci_epc_clear_bar() to
clear a BAR correctly but it is reset in pci_epf_free_space() (that
is called first) which results in pci_epc_clear_bar() failure.

Reorder the pci_epc_clear_bar()/pci_epf_free_space() calls execution
to fix the issue.

Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com>
[lorenzo.pieralisi@arm.com: reworded the commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/functions/pci-epf-test.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c
index e8bcc924dbf8..1cfe3687a211 100644
--- a/drivers/pci/endpoint/functions/pci-epf-test.c
+++ b/drivers/pci/endpoint/functions/pci-epf-test.c
@@ -381,8 +381,8 @@ static void pci_epf_test_unbind(struct pci_epf *epf)
 		epf_bar = &epf->bar[bar];
 
 		if (epf_test->reg[bar]) {
-			pci_epf_free_space(epf, epf_test->reg[bar], bar);
 			pci_epc_clear_bar(epc, epf->func_no, epf_bar);
+			pci_epf_free_space(epf, epf_test->reg[bar], bar);
 		}
 	}
 }
-- 
2.17.1


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* [cip-dev] [PATCH 4.19.y-cip 22/26] PCI: endpoint: Cast the page number to phys_addr_t
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (20 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 21/26] PCI: endpoint: Clear BAR before freeing its space Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 23/26] PCI: endpoint: Fix clearing start entry in configfs Lad Prabhakar
                   ` (4 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1426 bytes --]

From: Alan Mikhak <alan.mikhak@sifive.com>

commit daee4f4e42c792997f4fee47dcdfa65dd720ec02 upstream.

Modify pci_epc_mem_alloc_addr() to cast the variable 'pageno'
from type 'int' to 'phys_addr_t' before shifting left. This
cast is needed to avoid treating bit 31 of 'pageno' as the
sign bit which would otherwise get sign-extended to produce
a negative value. When added to the base address of PCI memory
space, the negative value would produce an invalid physical
address which falls before the start of the PCI memory space.

Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/pci-epc-mem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/endpoint/pci-epc-mem.c b/drivers/pci/endpoint/pci-epc-mem.c
index 0471643cf536..abfac1109a13 100644
--- a/drivers/pci/endpoint/pci-epc-mem.c
+++ b/drivers/pci/endpoint/pci-epc-mem.c
@@ -136,7 +136,7 @@ void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc,
 	if (pageno < 0)
 		goto ret;
 
-	*phys_addr = mem->phys_base + (pageno << page_shift);
+	*phys_addr = mem->phys_base + ((phys_addr_t)pageno << page_shift);
 	virt_addr = ioremap(*phys_addr, size);
 	if (!virt_addr)
 		bitmap_release_region(mem->bitmap, pageno, order);
-- 
2.17.1


[-- Attachment #2: Type: text/plain, Size: 420 bytes --]


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* [cip-dev] [PATCH 4.19.y-cip 23/26] PCI: endpoint: Fix clearing start entry in configfs
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (21 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 22/26] PCI: endpoint: Cast the page number to phys_addr_t Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 24/26] PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table address Lad Prabhakar
                   ` (3 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 1365 bytes --]

From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

commit f58d5f53c89479c12ad719c1960176442add5aaa upstream.

After an endpoint is started through configfs, if 0 is written to the
configfs entry 'start', the controller stops but the epc_group->start
value remains 1.

A subsequent unlinking of the function from the controller would trigger
a spurious WARN_ON_ONCE() in pci_epc_epf_unlink() despite right
behavior.

Fix it by setting epc_group->start = 0 when a controller is stopped
using configfs.

Fixes: d74679911610 ("PCI: endpoint: Introduce configfs entry for configuring EP functions")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/pci-ep-cfs.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/endpoint/pci-ep-cfs.c b/drivers/pci/endpoint/pci-ep-cfs.c
index d1288a0bd530..4fead88257bb 100644
--- a/drivers/pci/endpoint/pci-ep-cfs.c
+++ b/drivers/pci/endpoint/pci-ep-cfs.c
@@ -58,6 +58,7 @@ static ssize_t pci_epc_start_store(struct config_item *item, const char *page,
 
 	if (!start) {
 		pci_epc_stop(epc);
+		epc_group->start = 0;
 		return len;
 	}
 
-- 
2.17.1


[-- Attachment #2: Type: text/plain, Size: 420 bytes --]


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* [cip-dev] [PATCH 4.19.y-cip 24/26] PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table address
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (22 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 23/26] PCI: endpoint: Fix clearing start entry in configfs Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 25/26] tools: PCI: Exit with error code when test fails Lad Prabhakar
                   ` (2 subsequent siblings)
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 2927 bytes --]

From: Kishon Vijay Abraham I <kishon@ti.com>

commit 6f5e193bfb55963ce5f4f68cc927f371ddb0913b upstream.

commit beb4641a787d ("PCI: dwc: Add MSI-X callbacks handler"),
in order to raise MSI-X interrupt, obtained MSIX table address from
Base Address Register (BAR). However BAR only holds PCI address
programmed by the host whereas the MSI-X table should be in the local
memory.

Store the MSI-X table address (virtual address) as part of ->set_bar()
callback and use that to get the message address and message data
here.

Fixes: beb4641a787d ("PCI: dwc: Add MSI-X callbacks handler")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
[PL: Dropped changes to designware driver]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/endpoint/pci-epf-core.c |  2 ++
 include/linux/pci-epf.h             | 15 +++++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci-epf-core.c
index fb1306de8f40..93ebe916949e 100644
--- a/drivers/pci/endpoint/pci-epf-core.c
+++ b/drivers/pci/endpoint/pci-epf-core.c
@@ -99,6 +99,7 @@ void pci_epf_free_space(struct pci_epf *epf, void *addr, enum pci_barno bar)
 			  epf->bar[bar].phys_addr);
 
 	epf->bar[bar].phys_addr = 0;
+	epf->bar[bar].addr = NULL;
 	epf->bar[bar].size = 0;
 	epf->bar[bar].barno = 0;
 	epf->bar[bar].flags = 0;
@@ -135,6 +136,7 @@ void *pci_epf_alloc_space(struct pci_epf *epf, size_t size, enum pci_barno bar,
 	}
 
 	epf->bar[bar].phys_addr = phys_addr;
+	epf->bar[bar].addr = space;
 	epf->bar[bar].size = size;
 	epf->bar[bar].barno = bar;
 	epf->bar[bar].flags |= upper_32_bits(size) ?
diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h
index 2d6f07556682..bc5ce7afd79a 100644
--- a/include/linux/pci-epf.h
+++ b/include/linux/pci-epf.h
@@ -92,10 +92,12 @@ struct pci_epf_driver {
 /**
  * struct pci_epf_bar - represents the BAR of EPF device
  * @phys_addr: physical address that should be mapped to the BAR
+ * @addr: virtual address corresponding to the @phys_addr
  * @size: the size of the address space present in BAR
  */
 struct pci_epf_bar {
 	dma_addr_t	phys_addr;
+	void		*addr;
 	size_t		size;
 	enum pci_barno	barno;
 	int		flags;
@@ -127,6 +129,19 @@ struct pci_epf {
 	struct list_head	list;
 };
 
+/**
+ * struct pci_epf_msix_tbl - represents the MSIX table entry structure
+ * @msg_addr: Writes to this address will trigger MSIX interrupt in host
+ * @msg_data: Data that should be written to @msg_addr to trigger MSIX interrupt
+ * @vector_ctrl: Identifies if the function is prohibited from sending a message
+ * using this MSIX table entry
+ */
+struct pci_epf_msix_tbl {
+	u64 msg_addr;
+	u32 msg_data;
+	u32 vector_ctrl;
+};
+
 #define to_pci_epf(epf_dev) container_of((epf_dev), struct pci_epf, dev)
 
 #define pci_epf_register_driver(driver)    \
-- 
2.17.1


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* [cip-dev] [PATCH 4.19.y-cip 25/26] tools: PCI: Exit with error code when test fails
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (23 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 24/26] PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table address Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 26/26] tools: PCI: Fix fd leakage Lad Prabhakar
  2020-10-20 20:40 ` [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Pavel Machek
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 968 bytes --]

From: Jean-Jacques Hiblot <jjhiblot@ti.com>

commit b71f0a0b1e3fea212a6a5042ced8b48a81738ac9 upstream.

This makes it easier to use pcitest in automated setups.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 tools/pci/pcitest.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/pci/pcitest.c b/tools/pci/pcitest.c
index 4c5be77c211f..b7e3b6a64956 100644
--- a/tools/pci/pcitest.c
+++ b/tools/pci/pcitest.c
@@ -140,6 +140,7 @@ static int run_test(struct pci_test *test)
 	}
 
 	fflush(stdout);
+	return (ret < 0) ? ret : 1 - ret; /* return 0 if test succeeded */
 }
 
 int main(int argc, char **argv)
@@ -228,6 +229,5 @@ int main(int argc, char **argv)
 		return -EINVAL;
 	}
 
-	run_test(test);
-	return 0;
+	return run_test(test);
 }
-- 
2.17.1


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* [cip-dev] [PATCH 4.19.y-cip 26/26] tools: PCI: Fix fd leakage
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (24 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 25/26] tools: PCI: Exit with error code when test fails Lad Prabhakar
@ 2020-10-20 14:57 ` Lad Prabhakar
  2020-10-20 20:40 ` [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Pavel Machek
  26 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 14:57 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das, Lad Prabhakar

[-- Attachment #1: Type: text/plain, Size: 860 bytes --]

From: Hewenliang <hewenliang4@huawei.com>

commit 3c379a59b4795d7279d38c623e74b9790345a32b upstream.

We should close fd before the return of run_test.

Fixes: 3f2ed8134834 ("tools: PCI: Add a userspace tool to test PCI endpoint")
Signed-off-by: Hewenliang <hewenliang4@huawei.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 tools/pci/pcitest.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/pci/pcitest.c b/tools/pci/pcitest.c
index b7e3b6a64956..9f3d2e584ce4 100644
--- a/tools/pci/pcitest.c
+++ b/tools/pci/pcitest.c
@@ -140,6 +140,7 @@ static int run_test(struct pci_test *test)
 	}
 
 	fflush(stdout);
+	close(fd);
 	return (ret < 0) ? ret : 1 - ret; /* return 0 if test succeeded */
 }
 
-- 
2.17.1


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* Re: [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF
  2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
                   ` (25 preceding siblings ...)
  2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 26/26] tools: PCI: Fix fd leakage Lad Prabhakar
@ 2020-10-20 20:40 ` Pavel Machek
  2020-10-20 21:34   ` Lad Prabhakar
  26 siblings, 1 reply; 29+ messages in thread
From: Pavel Machek @ 2020-10-20 20:40 UTC (permalink / raw)
  To: cip-dev; +Cc: Nobuhiro Iwamatsu, Pavel Machek, Biju Das, Lad Prabhakar


[-- Attachment #1.1: Type: text/plain, Size: 586 bytes --]

Hi!

> This patch series is part of RFC series [1] ("Add PCIe EP support for
> Renesas R-Car Gen3 and RZ/G2x"). For making it more cleaner and easier
> to review series [1] is split up as suggested by Pavel, patches 1-22,
> 30, 32, 49, 50  are included in this set from [1].

Thanks, applied and pushed out.

Our automated testing did not find anything wrong (but I don't think
that means much).

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]

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* Re: [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF
  2020-10-20 20:40 ` [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Pavel Machek
@ 2020-10-20 21:34   ` Lad Prabhakar
  0 siblings, 0 replies; 29+ messages in thread
From: Lad Prabhakar @ 2020-10-20 21:34 UTC (permalink / raw)
  To: Pavel Machek, cip-dev; +Cc: Nobuhiro Iwamatsu, Biju Das

[-- Attachment #1: Type: text/plain, Size: 1088 bytes --]

Hi Pavel,

> -----Original Message-----
> From: Pavel Machek <pavel@denx.de>
> Sent: 20 October 2020 21:41
> To: cip-dev@lists.cip-project.org
> Cc: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das <biju.das.jz@bp.renesas.com>;
> Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF
> 
> Hi!
> 
> > This patch series is part of RFC series [1] ("Add PCIe EP support for
> > Renesas R-Car Gen3 and RZ/G2x"). For making it more cleaner and easier
> > to review series [1] is split up as suggested by Pavel, patches 1-22,
> > 30, 32, 49, 50  are included in this set from [1].
> 
> Thanks, applied and pushed out.
> 
Thank you.

Cheers,
Prabhakar

> Our automated testing did not find anything wrong (but I don't think
> that means much).
> 
> Best regards,
> 								Pavel
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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^ permalink raw reply	[flat|nested] 29+ messages in thread

end of thread, other threads:[~2020-10-20 21:34 UTC | newest]

Thread overview: 29+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-20 14:57 [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 01/26] PCI: endpoint: Add new pci_epc_ops to get EPC features Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 02/26] PCI: dwc: Add ->get_features() callback function to dw_pcie_ep_ops Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 03/26] PCI: designware-plat: Populate ->get_features() dw_pcie_ep_ops Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 04/26] PCI: pci-dra7xx: " Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 05/26] PCI: rockchip: " Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 06/26] PCI: cadence: Populate ->get_features() cdns_pcie_epc_ops Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 07/26] PCI: endpoint: Add helper to get first unreserved BAR Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 08/26] PCI: endpoint: Fix pci_epf_alloc_space() to set correct MEM TYPE flags Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 09/26] PCI: pci-epf-test: Remove setting epf_bar flags in function driver Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 10/26] PCI: pci-epf-test: Do not allocate next BARs memory if current BAR is 64Bit Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 11/26] PCI: pci-epf-test: Use pci_epc_get_features() to get EPC features Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 12/26] PCI: cadence: Remove pci_epf_linkup() from Cadence EP driver Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 13/26] PCI: rockchip: Remove pci_epf_linkup() from Rockchip " Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 14/26] PCI: designware-plat: Remove setting epc->features in Designware plat " Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 15/26] PCI: endpoint: Remove features member in struct pci_epc Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 16/26] PCI: endpoint: Fix a potential NULL pointer dereference Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 17/26] PCI: endpoint: Add support to specify alignment for buffers allocated to BARs Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 18/26] PCI: endpoint: Set endpoint controller pointer to NULL Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 19/26] PCI: endpoint: Allocate enough space for fixed size BAR Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 20/26] PCI: endpoint: Skip odd BAR when skipping 64bit BAR Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 21/26] PCI: endpoint: Clear BAR before freeing its space Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 22/26] PCI: endpoint: Cast the page number to phys_addr_t Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 23/26] PCI: endpoint: Fix clearing start entry in configfs Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 24/26] PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table address Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 25/26] tools: PCI: Exit with error code when test fails Lad Prabhakar
2020-10-20 14:57 ` [cip-dev] [PATCH 4.19.y-cip 26/26] tools: PCI: Fix fd leakage Lad Prabhakar
2020-10-20 20:40 ` [cip-dev] [PATCH 4.19.y-cip 00/26] Fixes and extension to PCIe EPF Pavel Machek
2020-10-20 21:34   ` Lad Prabhakar

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