From: "Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>
Subject: [cip-dev] [PATCH v2 4.4.y-cip 11/11] ARM: dts: r8a77470: Add device node for PRR
Date: Tue, 1 Dec 2020 08:39:38 +0000 [thread overview]
Message-ID: <20201201083938.32688-12-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
In-Reply-To: <20201201083938.32688-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
[-- Attachment #1: Type: text/plain, Size: 935 bytes --]
Add a device node for the Product Register, which provides SoC product
and revision information.
PRR node is added as part of upstream commit 6929dfc591804 ("ARM: dts:
r8a77470: Initial SoC device tree") as this commit includes initial SoC
DTSI PRR node cannot be individually backported hence this new commit.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/boot/dts/r8a77470.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 1057bff76cc8..3bf1a458593b 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -715,6 +715,11 @@
power-domains = <&cpg_clocks>;
};
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
+
cmt0: timer@ffca0000 {
compatible = "renesas,cmt-48-r8a77470",
"renesas,cmt-48-gen2";
--
2.17.1
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next prev parent reply other threads:[~2020-12-01 8:39 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-01 8:39 [cip-dev] [PATCH v2 4.4.y-cip 00/11] Renesas RZ/G1x add SoC detection support Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 01/11] base: soc: Early register bus when needed Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 02/11] dt-bindings: arm: renesas: Convert 'renesas,prr' to json-schema Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 03/11] soc: renesas: Identify SoC and register with the SoC bus Lad Prabhakar
2020-12-01 9:21 ` Pavel Machek
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 04/11] ARM: dts: r8a7743: Add device node for PRR Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 05/11] ARM: dts: r8a7745: " Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 06/11] soc: renesas: Identify RZ/G1N Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 07/11] ARM: dts: r8a7744: Add device node for PRR Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 08/11] soc: renesas: Identify RZ/G1H Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 09/11] ARM: dts: r8a7742: Add device node for PRR Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 10/11] soc: renesas: Identify RZ/G1C Lad Prabhakar
2020-12-01 8:39 ` Lad Prabhakar [this message]
2020-12-01 9:28 ` [cip-dev] [PATCH v2 4.4.y-cip 00/11] Renesas RZ/G1x add SoC detection support Pavel Machek
2020-12-03 2:28 ` Nobuhiro Iwamatsu
2020-12-03 8:55 ` Lad Prabhakar
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