From: "Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>
Subject: [cip-dev] [PATCH v2 4.4.y-cip 06/11] soc: renesas: Identify RZ/G1N
Date: Tue, 1 Dec 2020 08:39:33 +0000 [thread overview]
Message-ID: <20201201083938.32688-7-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
In-Reply-To: <20201201083938.32688-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
[-- Attachment #1: Type: text/plain, Size: 1829 bytes --]
From: Geert Uytterhoeven <geert+renesas@glider.be>
commit cd59de80dd34dd2d1a3ca97d7a6e712c048b135a upstream.
Add support for identifying the RZ/G1N (r8a7744) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[PL: Enabled SOC_BUS config for RZ/G1N]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm/mach-shmobile/Kconfig | 1 +
drivers/soc/renesas/renesas-soc.c | 8 ++++++++
2 files changed, 9 insertions(+)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 3f1e27b76d59..8b84eb630dee 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -78,6 +78,7 @@ config ARCH_R8A7744
bool "RZ/G1N (R8A77440)"
select ARCH_RCAR_GEN2
select ARM_ERRATA_798181 if SMP
+ select SOC_BUS
config ARCH_R8A7745
bool "RZ/G1E (R8A77450)"
diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c
index e36b51a52dfc..2cf62855cc45 100644
--- a/drivers/soc/renesas/renesas-soc.c
+++ b/drivers/soc/renesas/renesas-soc.c
@@ -40,6 +40,11 @@ static const struct renesas_soc soc_rz_g1m __initconst __maybe_unused = {
.id = 0x47,
};
+static const struct renesas_soc soc_rz_g1n __initconst __maybe_unused = {
+ .family = &fam_rzg,
+ .id = 0x4b,
+};
+
static const struct renesas_soc soc_rz_g1e __initconst __maybe_unused = {
.family = &fam_rzg,
.id = 0x4c,
@@ -49,6 +54,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
#ifdef CONFIG_ARCH_R8A7743
{ .compatible = "renesas,r8a7743", .data = &soc_rz_g1m },
#endif
+#ifdef CONFIG_ARCH_R8A7744
+ { .compatible = "renesas,r8a7744", .data = &soc_rz_g1n },
+#endif
#ifdef CONFIG_ARCH_R8A7745
{ .compatible = "renesas,r8a7745", .data = &soc_rz_g1e },
#endif
--
2.17.1
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next prev parent reply other threads:[~2020-12-01 8:39 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-01 8:39 [cip-dev] [PATCH v2 4.4.y-cip 00/11] Renesas RZ/G1x add SoC detection support Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 01/11] base: soc: Early register bus when needed Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 02/11] dt-bindings: arm: renesas: Convert 'renesas,prr' to json-schema Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 03/11] soc: renesas: Identify SoC and register with the SoC bus Lad Prabhakar
2020-12-01 9:21 ` Pavel Machek
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 04/11] ARM: dts: r8a7743: Add device node for PRR Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 05/11] ARM: dts: r8a7745: " Lad Prabhakar
2020-12-01 8:39 ` Lad Prabhakar [this message]
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 07/11] ARM: dts: r8a7744: " Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 08/11] soc: renesas: Identify RZ/G1H Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 09/11] ARM: dts: r8a7742: Add device node for PRR Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 10/11] soc: renesas: Identify RZ/G1C Lad Prabhakar
2020-12-01 8:39 ` [cip-dev] [PATCH v2 4.4.y-cip 11/11] ARM: dts: r8a77470: Add device node for PRR Lad Prabhakar
2020-12-01 9:28 ` [cip-dev] [PATCH v2 4.4.y-cip 00/11] Renesas RZ/G1x add SoC detection support Pavel Machek
2020-12-03 2:28 ` Nobuhiro Iwamatsu
2020-12-03 8:55 ` Lad Prabhakar
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