[cip-dev] [PATCH 4.19.y-cip 0/8] Optimize pinctrl and add QSPI[01] pins for RZ/G2{H,M,N,E}

From: "Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>
Subject: [cip-dev] [PATCH 4.19.y-cip 0/8] Optimize pinctrl and add QSPI[01] pins for RZ/G2{H,M,N,E}
Date: Tue,  5 Jan 2021 15:10:49 +0000	[thread overview]
Message-ID: <20210105151057.12752-1-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)

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Hi All,

This patch series optimizes pinctrl driver for size and adds QSPI[01]
pins for RZ/G2{H,M,N,E} SoC.

All the patches have been cherry picked from v5.11-rc2

Currently the SoC DTSI changes are being upstreamed [1] once this hits -rc
this will be backported to the CIP. This is for users who currently plan to
enable RPC-IF on CIP kernel (using patches from [1] to enable RPC-IF).

[1] https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=408139

Cheers,
Prabhakar

Biju Das (4):
  pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1
  pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1
  pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1
  pinctrl: renesas: r8a77990: Optimize pinctrl image size for R8A774C0

Lad Prabhakar (4):
  pinctrl: renesas: r8a77990: Add QSPI[01] pins, groups and functions
  pinctrl: renesas: r8a77951: Add QSPI[01] pins, groups and functions
  pinctrl: renesas: r8a7796: Add QSPI[01] pins, groups and functions
  pinctrl: renesas: r8a77965: Add QSPI[01] pins, groups and functions

 drivers/pinctrl/sh-pfc/pfc-r8a77951.c | 89 +++++++++++++++++++++++++--
 drivers/pinctrl/sh-pfc/pfc-r8a7796.c  | 87 +++++++++++++++++++++++++-
 drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 87 +++++++++++++++++++++++++-
 drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 87 +++++++++++++++++++++++++-
 4 files changed, 340 insertions(+), 10 deletions(-)

-- 
2.17.1

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