* [Solved] RE: [cip-dev] Is cadence-quadspi working on cyclone V?
@ 2021-03-17 0:42 Takuo Koguchi
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From: Takuo Koguchi @ 2021-03-17 0:42 UTC (permalink / raw)
To: cip-dev
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Hi,
> -----Original Message-----
> From: cip-dev@lists.cip-project.org <cip-dev@lists.cip-project.org> On Behalf Of Nobuhiro Iwamatsu
> Sent: Tuesday, March 16, 2021 3:54 PM
> To: cip-dev@lists.cip-project.org
> Subject: [!]Re: [cip-dev] Is cadence-quadspi working on cyclone V?
>
> Hi,
>
> > -----Original Message-----
> > From: cip-dev@lists.cip-project.org
> > [mailto:cip-dev@lists.cip-project.org] On Behalf Of Takuo Koguchi
> > Sent: Tuesday, March 16, 2021 2:54 PM
> > To: cip-dev@lists.cip-project.org
> > Subject: Re: [cip-dev] Is cadence-quadspi working on cyclone V?
> >
> > Iwamatsu-san,
> >
> > > > It recognizes NOR flash in 5.10.y. How about checking DTS?
> > > > Sodia board uses n25q512a and has the following DT:
> > > > ```
> > > > &qspi {
> > > > status = "okay";
> > > >
> > > > flash0: n25q512a@0 {
> > > > #address-cells = <1>;
> > > > #size-cells = <1>;
> > > > compatible = "n25q512a";
> > > > reg = <0>;
> > > > spi-max-frequency = <100000000>;
> > > >
> > > > m25p,fast-read;
> > > > cdns,page-size = <256>;
> > > > cdns,block-size = <16>;
> > > > cdns,read-delay = <4>;
> > > > cdns,tshsl-ns = <50>;
> > > > cdns,tsd2d-ns = <50>;
> > > > cdns,tchsh-ns = <4>;
> > > > cdns,tslch-ns = <4>;
> > > > };t
> > > > };
> > > > ```
> > > I am going to look into the difference.
> >
> > I confirmed that "n25q512a" in the node name and the compatible string are the only difference.
> > Interestingly, if I used compatible = "n25q512a" instead of compatible
> > = "s25fl128s1" or "s25fl128s", which is the current setting for
> > linux-4.19.177-cip, the kernel prints the following message and is able to detect spi-nor flash as expected.
> >
> > [ 2.701294] spi-nor spi0.0: found s25fl128s1, expected n25q512a
> > [ 2.711093] spi-nor spi0.0: s25fl128s1 (16384 Kbytes)
> >
> > Probably the detect mechanism has been changed by the commit.
> > Apparently setting compatible = "n25q512a" for my board does not make
> > sense. I'd like to find out why compatible = "s25fl128s1" does not work.
>
> Probably because they are not registered as compatible strings in the driver. They seem to be used as chip names rather
> than compatible strings.
> Currently, the implementation is to specify "jedec,spi-nor" for the compatible string.
>
Adding "jedec,spi-nor" to the compatible string has solved the issue.
Now I can confirm that "[a314f6367787ee1d767df9a2120f17e4511144d0] mtd: spi-nor: Convert
cadence-quadspi to use spi-mem framework" is good, and cadence-quadspi is working fine on cyclone V with linux-5.10.y
Thanks!
Takuo Koguchi
> Best regards,
> Nobuhiro
>
> > > -----Original Message-----
> > > From: 小口琢夫 / KOGUCHI，TAKUO
> > > Sent: Monday, March 15, 2021 2:31 PM
> > > To: cip-dev@lists.cip-project.org
> > > Subject: RE: [cip-dev] Is cadence-quadspi working on cyclone V?
> > >
> > > Iwamatsu-san,
> > >
> > > Thank you for the information.
> > > > It recognizes NOR flash in 5.10.y. How about checking DTS?
> > > > Sodia board uses n25q512a and has the following DT:
> > > > ```
> > > > &qspi {
> > > > status = "okay";
> > > >
> > > > flash0: n25q512a@0 {
> > > > #address-cells = <1>;
> > > > #size-cells = <1>;
> > > > compatible = "n25q512a";
> > > > reg = <0>;
> > > > spi-max-frequency = <100000000>;
> > > >
> > > > m25p,fast-read;
> > > > cdns,page-size = <256>;
> > > > cdns,block-size = <16>;
> > > > cdns,read-delay = <4>;
> > > > cdns,tshsl-ns = <50>;
> > > > cdns,tsd2d-ns = <50>;
> > > > cdns,tchsh-ns = <4>;
> > > > cdns,tslch-ns = <4>;
> > > > };
> > > > };
> > > > ```
> > > I am going to look into the difference.
> > >
> > > Takuo Koguchi
> > >
> > > > -----Original Message-----
> > > > From: cip-dev@lists.cip-project.org
> > > > <cip-dev@lists.cip-project.org> On Behalf Of Nobuhiro Iwamatsu
> > > > Sent: Monday, March 15, 2021 2:25 PM
> > > > To: cip-dev@lists.cip-project.org
> > > > Subject: [!]Re: [cip-dev] Is cadence-quadspi working on cyclone V?
> > > >
> > > > Hi Koguchi-san,
> > > >
> > > > > -----Original Message-----
> > > > > From: cip-dev@lists.cip-project.org
> > > > > [mailto:cip-dev@lists.cip-project.org] On Behalf Of Takuo
> > > > > Koguchi
> > > > > Sent: Monday, March 15, 2021 1:33 PM
> > > > > To: cip-dev@lists.cip-project.org
> > > > > Subject: Re: [cip-dev] Is cadence-quadspi working on cyclone V?
> > > > >
> > > > > Hi Pavel,
> > > > >
> > > > > > >> Git bisect has told me the first bad commit is
> > > > > > >> 31fb632b5d43 spi: Move cadence-quadspi driver to
> > > > > > >> drivers/spi/
> > > > > > >
> > > > > > > That's strange.
> > > > > > >
> > > > > > >> Does this change requires device tree modification?
> > > > > > >> Any suggestions or comments would be appreciated.
> > > > > > >
> > > > > > > ...because that particular change does not change any C code.
> > > > > > > But it touches Kconfig bits; can you check that
> > > > > > > CONFIG_SPI_CADENCE_QUADSPI is enabled in the "bad" configuration?
> > > > > > >
> > > > > > > Do you have any local changes in
> > > > > > > drivers/mtd/spi-nor/controllers/cadence-quadspi.c or
> > > > > > > drivers/spi/spi-cadence-quadspi.c ?
> > > > > > I have no local changes to those files.
> > > > > > Maybe I lost CONFIG_SPI_CADENCE_QUADSPI accidentally while bisecting.
> > > > > > I will try bisect and post the result again.
> > > > > >
> > > > >
> > > > > I redo the bisect and get the following result; # first bad commit:
> > > > > [a314f6367787ee1d767df9a2120f17e4511144d0] mtd: spi-nor: Convert
> > > > > cadence-quadspi to use spi-mem framework
> > > > >
> > > > > It contains significant amount of changes;
> > > > >
> > > > > cadence-quadspi.c | 476
> > > > > +++++++++++++++++++++---------------------------------
> > > > > 1 file changed, 191 insertions(+), 285 deletions(-)
> > > > >
> > > > > With this change, cpspi_probe return 0 without any error
> > > > > messages, but it does not detect NOR flash on a custom cyclone V board.
> > > > >
> > > > > Any information will be appreciated.
> > > >
> > > > I checked on a Sodia board with the same SoC.
> > > >
> > > > https://secure-web.cisco.com/1ChOMrKnSBR5QZeejvrNs3Pf4x8__M_QVUHEr
> > > > nB9s
> > > > lV-TAWP3NUwe0LEzsirvM7rr-Oqv
> > > > RKrgxgI3iQo5ITdUehFyDppd2GljkEzx7izv16pERniX0DeDmzwE5h9pUYqtIxO3WA
> > > > FTDu
> > > > H_EG-RNhNFqK4LQakZ90sESF6
> > > > DMvs_jovN55Xj5u9kNOC_ew76pLtAMAOdN3BZSV_fR_n6tcWlhvqJ6OlUEfrpz9xvy
> > > > -gu1
> > > > VHrgcgj1BICaBid9bVUza1-T7rBc
> > > > I2EjECtd0qCMcsvLYZPxvzfZ9-Hu6rFlaCQ0ruhxZVfHuVWEB37eQmm0HLHYJG2_R_
> > > > ousV
> > > > eVDk8bJa2iA/https%3A%2F%2
> > > > Fgit.kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Fcip%2Flinux-c
> > > > ip.g
> > > > it%2Ftree%2Farch%2Farm%2Fboot%2Fd
> > > > ts%2Fsocfpga_cyclone5_sodia.dts%3Fh%3Dlinux-5.10.y-cip
> > > >
> > > > It recognizes NOR flash in 5.10.y. How about checking DTS?
> > > > Sodia board uses n25q512a and has the following DT:
> > > > ```
> > > > &qspi {
> > > > status = "okay";
> > > >
> > > > flash0: n25q512a@0 {
> > > > #address-cells = <1>;
> > > > #size-cells = <1>;
> > > > compatible = "n25q512a";
> > > > reg = <0>;
> > > > spi-max-frequency = <100000000>;
> > > >
> > > > m25p,fast-read;
> > > > cdns,page-size = <256>;
> > > > cdns,block-size = <16>;
> > > > cdns,read-delay = <4>;
> > > > cdns,tshsl-ns = <50>;
> > > > cdns,tsd2d-ns = <50>;
> > > > cdns,tchsh-ns = <4>;
> > > > cdns,tslch-ns = <4>;
> > > > };
> > > > };
> > > > ```
> > > > >
> > > > > Thanks,
> > > > >
> > > > > Takuo Koguchi
> > > > >
> > > >
> > > > Best regards,
> > > > Nobuhiro
> > > >
> > > >
> > > > > > -----Original Message-----
> > > > > > From: 小口琢夫 / KOGUCHI，TAKUO
> > > > > > Sent: Sunday, March 14, 2021 4:37 PM
> > > > > > To: cip-dev@lists.cip-project.org
> > > > > > Subject: Re: [!]Re: [cip-dev] Is cadence-quadspi working on cyclone V?
> > > > > >
> > > > > > Hi Pavel,
> > > > > > Thank you for the response.
> > > > > >
> > > > > > >> Git bisect has told me the first bad commit is
> > > > > > >> 31fb632b5d43 spi: Move cadence-quadspi driver to
> > > > > > >> drivers/spi
> > > > > > >
> > > > > > > That's strange.
> > > > > > >
> > > > > > >> Does this change requires device tree modification?
> > > > > > >> Any suggestions or comments would be appreciated.
> > > > > > >
> > > > > > > ...because that particular change does not change any C code.
> > > > > > > But it touches Kconfig bits; can you check that
> > > > > > > CONFIG_SPI_CADENCE_QUADSPI is enabled in the "bad" configuration?
> > > > > > >
> > > > > > > Do you have any local changes in
> > > > > > > drivers/mtd/spi-nor/controllers/cadence-quadspi.c or
> > > > > > > drivers/spi/spi-cadence-quadspi.c ?
> > > > > > I have no local changes to those files.
> > > > > > Maybe I lost CONFIG_SPI_CADENCE_QUADSPI accidentally while bisecting.
> > > > > > I will try bisect and post the result again.
> > > > > >
> > > > > > Regards,
> > > > > >
> > > > > > Takuo Koguchi
> > > > > >
> > > > > > > 2021/03/13 8:07、Pavel Machek <pavel@denx.de>のメール:
> > > > > > >
> > > > > > > Hi!
> > > > > > >
> > > > > > >> Git bisect has told me the first bad commit is
> > > > > > >> 31fb632b5d43 spi: Move cadence-quadspi driver to
> > > > > > >> drivers/spi/
> > > > > > >
> > > > > > > That's strange.
> > > > > > >
> > > > > > >> Does this change requires device tree modification?
> > > > > > >> Any suggestions or comments would be appreciated.
> > > > > > >
> > > > > > > ...because that particular change does not change any C code.
> > > > > > > But it touches Kconfig bits; can you check that
> > > > > > > CONFIG_SPI_CADENCE_QUADSPI is enabled in the "bad" configuration?
> > > > > > >
> > > > > > > Do you have any local changes in
> > > > > > > drivers/mtd/spi-nor/controllers/cadence-quadspi.c or
> > > > > > > drivers/spi/spi-cadence-quadspi.c ?
> > > > > > >
> > > > > > > Best regards,
> > > > > > > Pavel
> > > > > > > --
> > > > > > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> > > > > > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194
> > > > > > > Groebenzell, Germany
> > > > > > >
> > > > > > >
> > > > > > >
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