All of lore.kernel.org
 help / color / mirror / Atom feed
From: Pratyush Anand <panand@redhat.com>
To: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com
Cc: will.deacon@arm.com, huawei.libin@huawei.com,
	Pratyush Anand <panand@redhat.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Ingo Molnar <mingo@redhat.com>,
	linux-kernel@vger.kernel.org,
	Peter Zijlstra <peterz@infradead.org>
Subject: [PATCH V2 0/4] ARM64: Fix irq generation between breakpoint and step exception
Date: Fri,  7 Jul 2017 17:33:56 +0530	[thread overview]
Message-ID: <cover.1499416107.git.panand@redhat.com> (raw)

v1 was here http://marc.info/?l=linux-arm-kernel&m=149910958418708&w=2

v1 -> v2:
- patch 1 of v1 has been modified to patch 1-3 of v2.
- Introduced a new event attribute step_needed and implemented
  hw_breakpoint_needs_single_step() (patch 1)
- Replaced usage of is_default_overflow_handler() with
  hw_breakpoint_needs_single_step(). (patch 2)
- Modified sample test to set set step_needed bit field (patch 3)

samples/hw_breakpoint/data_breakpoint.c passes with x86_64 but fails with
ARM64. Even though it has been NAKed previously on upstream [1, 2], I have
tried to come up with patches which can resolve it for ARM64 as well.

I noticed that even perf step exception can go into an infinite loop if CPU
receives an interrupt while executing breakpoint/watchpoint handler. So,
event though we are not concerned about above test, we will have to find a
solution for the perf issue.

This patchset attempts to resolve both the issue. Please review.

[1] http://marc.info/?l=linux-arm-kernel&m=149580777524910&w=2
[2] http://lists.infradead.org/pipermail/linux-arm-kernel/2016-April/425266.html

Pratyush Anand (4):
  hw_breakpoint: Add step_needed event attribute
  arm64: use hw_breakpoint_needs_single_step() to decide if step is
    needed
  hw-breakpoint: sample test: set step_needed bit field
  arm64: disable irq between breakpoint and step exception

 arch/arm64/kernel/debug-monitors.c      |  3 +++
 arch/arm64/kernel/hw_breakpoint.c       | 10 +++++-----
 arch/arm64/mm/fault.c                   | 22 ++++++++++++++++++----
 include/linux/hw_breakpoint.h           |  6 ++++++
 include/uapi/linux/perf_event.h         |  3 ++-
 kernel/events/core.c                    |  2 ++
 samples/hw_breakpoint/data_breakpoint.c |  1 +
 tools/include/uapi/linux/perf_event.h   |  3 ++-
 8 files changed, 39 insertions(+), 11 deletions(-)

-- 
2.9.3

WARNING: multiple messages have this Message-ID (diff)
From: panand@redhat.com (Pratyush Anand)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 0/4] ARM64: Fix irq generation between breakpoint and step exception
Date: Fri,  7 Jul 2017 17:33:56 +0530	[thread overview]
Message-ID: <cover.1499416107.git.panand@redhat.com> (raw)

v1 was here http://marc.info/?l=linux-arm-kernel&m=149910958418708&w=2

v1 -> v2:
- patch 1 of v1 has been modified to patch 1-3 of v2.
- Introduced a new event attribute step_needed and implemented
  hw_breakpoint_needs_single_step() (patch 1)
- Replaced usage of is_default_overflow_handler() with
  hw_breakpoint_needs_single_step(). (patch 2)
- Modified sample test to set set step_needed bit field (patch 3)

samples/hw_breakpoint/data_breakpoint.c passes with x86_64 but fails with
ARM64. Even though it has been NAKed previously on upstream [1, 2], I have
tried to come up with patches which can resolve it for ARM64 as well.

I noticed that even perf step exception can go into an infinite loop if CPU
receives an interrupt while executing breakpoint/watchpoint handler. So,
event though we are not concerned about above test, we will have to find a
solution for the perf issue.

This patchset attempts to resolve both the issue. Please review.

[1] http://marc.info/?l=linux-arm-kernel&m=149580777524910&w=2
[2] http://lists.infradead.org/pipermail/linux-arm-kernel/2016-April/425266.html

Pratyush Anand (4):
  hw_breakpoint: Add step_needed event attribute
  arm64: use hw_breakpoint_needs_single_step() to decide if step is
    needed
  hw-breakpoint: sample test: set step_needed bit field
  arm64: disable irq between breakpoint and step exception

 arch/arm64/kernel/debug-monitors.c      |  3 +++
 arch/arm64/kernel/hw_breakpoint.c       | 10 +++++-----
 arch/arm64/mm/fault.c                   | 22 ++++++++++++++++++----
 include/linux/hw_breakpoint.h           |  6 ++++++
 include/uapi/linux/perf_event.h         |  3 ++-
 kernel/events/core.c                    |  2 ++
 samples/hw_breakpoint/data_breakpoint.c |  1 +
 tools/include/uapi/linux/perf_event.h   |  3 ++-
 8 files changed, 39 insertions(+), 11 deletions(-)

-- 
2.9.3

             reply	other threads:[~2017-07-07 12:05 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-07 12:03 Pratyush Anand [this message]
2017-07-07 12:03 ` [PATCH V2 0/4] ARM64: Fix irq generation between breakpoint and step exception Pratyush Anand
2017-07-07 12:03 ` [PATCH V2 1/4] hw_breakpoint: Add step_needed event attribute Pratyush Anand
2017-07-07 12:03   ` Pratyush Anand
2017-07-25 13:27   ` Will Deacon
2017-07-25 13:27     ` Will Deacon
2017-07-25 14:14     ` Peter Zijlstra
2017-07-25 14:14       ` Peter Zijlstra
2017-07-25 16:04       ` Mark Rutland
2017-07-25 16:04         ` Mark Rutland
2017-07-26  5:42     ` Pratyush Anand
2017-07-26  5:42       ` Pratyush Anand
2017-07-26  7:49       ` Peter Zijlstra
2017-07-26  7:49         ` Peter Zijlstra
2017-07-07 12:03 ` [PATCH V2 2/4] arm64: use hw_breakpoint_needs_single_step() to decide if step is needed Pratyush Anand
2017-07-07 12:03   ` Pratyush Anand
2017-07-07 12:03 ` [PATCH V2 3/4] hw-breakpoint: sample test: set step_needed bit field Pratyush Anand
2017-07-07 12:03   ` Pratyush Anand
2017-07-07 12:04 ` [PATCH V2 4/4] arm64: disable irq between breakpoint and step exception Pratyush Anand
2017-07-07 12:04   ` Pratyush Anand
2017-07-25 13:25   ` Will Deacon
2017-07-25 13:25     ` Will Deacon
2017-07-26  5:36     ` Pratyush Anand
2017-07-26  5:36       ` Pratyush Anand
2017-07-17  3:21 ` [PATCH V2 0/4] ARM64: Fix irq generation " Pratyush Anand
2017-07-17  3:21   ` Pratyush Anand

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=cover.1499416107.git.panand@redhat.com \
    --to=panand@redhat.com \
    --cc=acme@kernel.org \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=huawei.libin@huawei.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mingo@redhat.com \
    --cc=peterz@infradead.org \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.