From: Leonard Crestez <leonard.crestez@nxp.com> To: Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org>, Chanwoo Choi <cw00.choi@samsung.com> Cc: "Artur Świgoń" <a.swigon@partner.samsung.com>, "Alexandre Bailon" <abailon@baylibre.com>, "Rafael J. Wysocki" <rafael@kernel.org>, "Jacky Bai" <ping.bai@nxp.com>, "Anson Huang" <Anson.Huang@nxp.com>, "Abel Vesa" <abel.vesa@nxp.com>, "Krzysztof Kozlowski" <krzk@kernel.org>, "MyungJoo Ham" <myungjoo.ham@samsung.com>, "Kyungmin Park" <kyungmin.park@samsung.com>, "Saravana Kannan" <saravanak@google.com>, "Mark Rutland" <mark.rutland@arm.com>, "Viresh Kumar" <viresh.kumar@linaro.org>, "Shawn Guo" <shawnguo@kernel.org>, "Dong Aisheng" <aisheng.dong@nxp.com>, "Fabio Estevam" <fabio.estevam@nxp.com>, "Stephen Boyd" <sboyd@kernel.org>, "Michael Turquette" <mturquette@baylibre.com>, "Matthias Kaehlcke" <mka@chromium.org>, "Angus Ainslie" <angus@akkea.ca>, "Martin Kepplinger" <martink@posteo.de>, linux-pm@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH RFC v5 06/10] interconnect: imx: Add platform driver for imx8mm Date: Fri, 1 Nov 2019 00:52:05 +0200 [thread overview] Message-ID: <d83b0abb1afcfde3f8214d1e6648b0334a3b1835.1572562150.git.leonard.crestez@nxp.com> (raw) In-Reply-To: <cover.1572562150.git.leonard.crestez@nxp.com> In-Reply-To: <cover.1572562150.git.leonard.crestez@nxp.com> Add a platform driver for the i.MX8MM SoC describing bus topology. Bandwidth adjustments is currently only supported on the DDRC and main NOC. Scaling for the vpu/gpu/display NICs could be added in the future. Signed-off-by: Alexandre Bailon <abailon@baylibre.com> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> --- drivers/interconnect/imx/Kconfig | 4 + drivers/interconnect/imx/Makefile | 1 + drivers/interconnect/imx/imx8mm.c | 105 ++++++++++++++++++++++ include/dt-bindings/interconnect/imx8mm.h | 49 ++++++++++ 4 files changed, 159 insertions(+) create mode 100644 drivers/interconnect/imx/imx8mm.c create mode 100644 include/dt-bindings/interconnect/imx8mm.h diff --git a/drivers/interconnect/imx/Kconfig b/drivers/interconnect/imx/Kconfig index 7d81d3c83a61..15671fe7f600 100644 --- a/drivers/interconnect/imx/Kconfig +++ b/drivers/interconnect/imx/Kconfig @@ -1,5 +1,9 @@ config INTERCONNECT_IMX bool "i.MX interconnect drivers" depends on ARCH_MXC || COMPILE_TEST help Generic interconnect driver for i.MX SOCs + +config INTERCONNECT_IMX8MM + def_bool y + depends on INTERCONNECT_IMX diff --git a/drivers/interconnect/imx/Makefile b/drivers/interconnect/imx/Makefile index bb92fd9fe4a5..5f658c1608a6 100644 --- a/drivers/interconnect/imx/Makefile +++ b/drivers/interconnect/imx/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_INTERCONNECT_IMX) += imx.o +obj-$(CONFIG_INTERCONNECT_IMX8MM) += imx8mm.o diff --git a/drivers/interconnect/imx/imx8mm.c b/drivers/interconnect/imx/imx8mm.c new file mode 100644 index 000000000000..acc002153729 --- /dev/null +++ b/drivers/interconnect/imx/imx8mm.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Interconnect framework driver for i.MX SoC + * + * Copyright (c) 2019, BayLibre + * Copyright (c) 2019, NXP + * Author: Alexandre Bailon <abailon@baylibre.com> + * Author: Leonard Crestez <leonard.crestez@nxp.com> + */ + +#include <linux/device.h> +#include <linux/module.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> + +#include <dt-bindings/interconnect/imx8mm.h> + +#include "imx.h" + +static const struct imx_icc_node_adj_desc imx8mm_dram_adj = { + .bw_mul = 1, + .bw_div = 16, +}; + +static const struct imx_icc_node_adj_desc imx8mm_noc_adj = { + .bw_mul = 1, + .bw_div = 16, +}; + +/* + * Describe bus masters, slaves and connections between them + * + * This is a simplified subset of the bus diagram, there are several other + * PL301 nics which are skipped/merged into PL301_MAIN + */ +static struct imx_icc_node_desc nodes[] = { + DEFINE_BUS_INTERCONNECT("NOC", IMX8MM_ICN_NOC, &imx8mm_noc_adj, + IMX8MM_ICS_DRAM, IMX8MM_ICN_MAIN), + + DEFINE_BUS_SLAVE("DRAM", IMX8MM_ICS_DRAM, &imx8mm_dram_adj), + DEFINE_BUS_SLAVE("OCRAM", IMX8MM_ICS_OCRAM, NULL), + DEFINE_BUS_MASTER("A53", IMX8MM_ICM_A53, IMX8MM_ICN_NOC), + + /* VPUMIX */ + DEFINE_BUS_MASTER("VPU H1", IMX8MM_ICM_VPU_H1, IMX8MM_ICN_VIDEO), + DEFINE_BUS_MASTER("VPU G1", IMX8MM_ICM_VPU_G1, IMX8MM_ICN_VIDEO), + DEFINE_BUS_MASTER("VPU G2", IMX8MM_ICM_VPU_G2, IMX8MM_ICN_VIDEO), + DEFINE_BUS_INTERCONNECT("PL301_VIDEO", IMX8MM_ICN_VIDEO, NULL, IMX8MM_ICN_NOC), + + /* GPUMIX */ + DEFINE_BUS_MASTER("GPU 2D", IMX8MM_ICM_GPU2D, IMX8MM_ICN_GPU), + DEFINE_BUS_MASTER("GPU 3D", IMX8MM_ICM_GPU3D, IMX8MM_ICN_GPU), + DEFINE_BUS_INTERCONNECT("PL301_GPU", IMX8MM_ICN_GPU, NULL, IMX8MM_ICN_NOC), + + /* DISPLAYMIX */ + DEFINE_BUS_MASTER("CSI", IMX8MM_ICM_CSI, IMX8MM_ICN_MIPI), + DEFINE_BUS_MASTER("LCDIF", IMX8MM_ICM_LCDIF, IMX8MM_ICN_MIPI), + DEFINE_BUS_INTERCONNECT("PL301_MIPI", IMX8MM_ICN_MIPI, NULL, IMX8MM_ICN_NOC), + + /* HSIO */ + DEFINE_BUS_MASTER("USB1", IMX8MM_ICM_USB1, IMX8MM_ICN_HSIO), + DEFINE_BUS_MASTER("USB2", IMX8MM_ICM_USB2, IMX8MM_ICN_HSIO), + DEFINE_BUS_MASTER("PCIE", IMX8MM_ICM_PCIE, IMX8MM_ICN_HSIO), + DEFINE_BUS_INTERCONNECT("PL301_HSIO", IMX8MM_ICN_HSIO, NULL, IMX8MM_ICN_NOC), + + /* Audio */ + DEFINE_BUS_MASTER("SDMA2", IMX8MM_ICM_SDMA2, IMX8MM_ICN_AUDIO), + DEFINE_BUS_MASTER("SDMA3", IMX8MM_ICM_SDMA3, IMX8MM_ICN_AUDIO), + DEFINE_BUS_INTERCONNECT("PL301_AUDIO", IMX8MM_ICN_AUDIO, NULL, IMX8MM_ICN_MAIN), + + /* Ethernet */ + DEFINE_BUS_MASTER("ENET", IMX8MM_ICM_ENET, IMX8MM_ICN_ENET), + DEFINE_BUS_INTERCONNECT("PL301_ENET", IMX8MM_ICN_ENET, NULL, IMX8MM_ICN_MAIN), + + /* Other */ + DEFINE_BUS_MASTER("SDMA1", IMX8MM_ICM_SDMA1, IMX8MM_ICN_MAIN), + DEFINE_BUS_MASTER("NAND", IMX8MM_ICM_NAND, IMX8MM_ICN_MAIN), + DEFINE_BUS_MASTER("USDHC1", IMX8MM_ICM_USDHC1, IMX8MM_ICN_MAIN), + DEFINE_BUS_MASTER("USDHC2", IMX8MM_ICM_USDHC2, IMX8MM_ICN_MAIN), + DEFINE_BUS_MASTER("USDHC3", IMX8MM_ICM_USDHC3, IMX8MM_ICN_MAIN), + DEFINE_BUS_INTERCONNECT("PL301_MAIN", IMX8MM_ICN_MAIN, NULL, + IMX8MM_ICN_NOC, IMX8MM_ICS_OCRAM), +}; + +static int imx8mm_icc_probe(struct platform_device *pdev) +{ + return imx_icc_register(pdev, nodes, ARRAY_SIZE(nodes)); +} + +static int imx8mm_icc_remove(struct platform_device *pdev) +{ + return imx_icc_unregister(pdev); +} + +static struct platform_driver imx8mm_icc_driver = { + .probe = imx8mm_icc_probe, + .remove = imx8mm_icc_remove, + .driver = { + .name = "imx8mm-interconnect", + }, +}; + +module_platform_driver(imx8mm_icc_driver); +MODULE_AUTHOR("Alexandre Bailon <abailon@baylibre.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/include/dt-bindings/interconnect/imx8mm.h b/include/dt-bindings/interconnect/imx8mm.h new file mode 100644 index 000000000000..5404f2af15c3 --- /dev/null +++ b/include/dt-bindings/interconnect/imx8mm.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Interconnect framework driver for i.MX SoC + * + * Copyright (c) 2019, BayLibre + * Author: Alexandre Bailon <abailon@baylibre.com> + */ + +#ifndef __IMX8MM_ICM_INTERCONNECT_IDS_H +#define __IMX8MM_ICM_INTERCONNECT_IDS_H + +#define IMX8MM_ICN_NOC 1 +#define IMX8MM_ICS_DRAM 2 +#define IMX8MM_ICS_OCRAM 3 +#define IMX8MM_ICM_A53 4 + +#define IMX8MM_ICM_VPU_H1 5 +#define IMX8MM_ICM_VPU_G1 6 +#define IMX8MM_ICM_VPU_G2 7 +#define IMX8MM_ICN_VIDEO 8 + +#define IMX8MM_ICM_GPU2D 9 +#define IMX8MM_ICM_GPU3D 10 +#define IMX8MM_ICN_GPU 11 + +#define IMX8MM_ICM_CSI 12 +#define IMX8MM_ICM_LCDIF 13 +#define IMX8MM_ICN_MIPI 14 + +#define IMX8MM_ICM_USB1 15 +#define IMX8MM_ICM_USB2 16 +#define IMX8MM_ICM_PCIE 17 +#define IMX8MM_ICN_HSIO 18 + +#define IMX8MM_ICM_SDMA2 19 +#define IMX8MM_ICM_SDMA3 20 +#define IMX8MM_ICN_AUDIO 21 + +#define IMX8MM_ICN_ENET 22 +#define IMX8MM_ICM_ENET 23 + +#define IMX8MM_ICN_MAIN 24 +#define IMX8MM_ICM_NAND 25 +#define IMX8MM_ICM_SDMA1 26 +#define IMX8MM_ICM_USDHC1 27 +#define IMX8MM_ICM_USDHC2 28 +#define IMX8MM_ICM_USDHC3 29 + +#endif /* __IMX8MM_ICM_INTERCONNECT_IDS_H */ -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Leonard Crestez <leonard.crestez@nxp.com> To: Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org>, Chanwoo Choi <cw00.choi@samsung.com> Cc: "Mark Rutland" <mark.rutland@arm.com>, "Artur Świgoń" <a.swigon@partner.samsung.com>, "Jacky Bai" <ping.bai@nxp.com>, "Rafael J. Wysocki" <rafael@kernel.org>, "Viresh Kumar" <viresh.kumar@linaro.org>, "Michael Turquette" <mturquette@baylibre.com>, "Angus Ainslie" <angus@akkea.ca>, "MyungJoo Ham" <myungjoo.ham@samsung.com>, "Abel Vesa" <abel.vesa@nxp.com>, "Anson Huang" <Anson.Huang@nxp.com>, "Krzysztof Kozlowski" <krzk@kernel.org>, "Matthias Kaehlcke" <mka@chromium.org>, linux-imx@nxp.com, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, "Martin Kepplinger" <martink@posteo.de>, linux-arm-kernel@lists.infradead.org, "Dong Aisheng" <aisheng.dong@nxp.com>, "Saravana Kannan" <saravanak@google.com>, "Stephen Boyd" <sboyd@kernel.org>, "Kyungmin Park" <kyungmin.park@samsung.com>, kernel@pengutronix.de, "Fabio Estevam" <fabio.estevam@nxp.com>, "Shawn Guo" <shawnguo@kernel.org>, "Alexandre Bailon" <abailon@baylibre.com> Subject: [PATCH RFC v5 06/10] interconnect: imx: Add platform driver for imx8mm Date: Fri, 1 Nov 2019 00:52:05 +0200 [thread overview] Message-ID: <d83b0abb1afcfde3f8214d1e6648b0334a3b1835.1572562150.git.leonard.crestez@nxp.com> (raw) In-Reply-To: <cover.1572562150.git.leonard.crestez@nxp.com> In-Reply-To: <cover.1572562150.git.leonard.crestez@nxp.com> Add a platform driver for the i.MX8MM SoC describing bus topology. Bandwidth adjustments is currently only supported on the DDRC and main NOC. Scaling for the vpu/gpu/display NICs could be added in the future. Signed-off-by: Alexandre Bailon <abailon@baylibre.com> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> --- drivers/interconnect/imx/Kconfig | 4 + drivers/interconnect/imx/Makefile | 1 + drivers/interconnect/imx/imx8mm.c | 105 ++++++++++++++++++++++ include/dt-bindings/interconnect/imx8mm.h | 49 ++++++++++ 4 files changed, 159 insertions(+) create mode 100644 drivers/interconnect/imx/imx8mm.c create mode 100644 include/dt-bindings/interconnect/imx8mm.h diff --git a/drivers/interconnect/imx/Kconfig b/drivers/interconnect/imx/Kconfig index 7d81d3c83a61..15671fe7f600 100644 --- a/drivers/interconnect/imx/Kconfig +++ b/drivers/interconnect/imx/Kconfig @@ -1,5 +1,9 @@ config INTERCONNECT_IMX bool "i.MX interconnect drivers" depends on ARCH_MXC || COMPILE_TEST help Generic interconnect driver for i.MX SOCs + +config INTERCONNECT_IMX8MM + def_bool y + depends on INTERCONNECT_IMX diff --git a/drivers/interconnect/imx/Makefile b/drivers/interconnect/imx/Makefile index bb92fd9fe4a5..5f658c1608a6 100644 --- a/drivers/interconnect/imx/Makefile +++ b/drivers/interconnect/imx/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_INTERCONNECT_IMX) += imx.o +obj-$(CONFIG_INTERCONNECT_IMX8MM) += imx8mm.o diff --git a/drivers/interconnect/imx/imx8mm.c b/drivers/interconnect/imx/imx8mm.c new file mode 100644 index 000000000000..acc002153729 --- /dev/null +++ b/drivers/interconnect/imx/imx8mm.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Interconnect framework driver for i.MX SoC + * + * Copyright (c) 2019, BayLibre + * Copyright (c) 2019, NXP + * Author: Alexandre Bailon <abailon@baylibre.com> + * Author: Leonard Crestez <leonard.crestez@nxp.com> + */ + +#include <linux/device.h> +#include <linux/module.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> + +#include <dt-bindings/interconnect/imx8mm.h> + +#include "imx.h" + +static const struct imx_icc_node_adj_desc imx8mm_dram_adj = { + .bw_mul = 1, + .bw_div = 16, +}; + +static const struct imx_icc_node_adj_desc imx8mm_noc_adj = { + .bw_mul = 1, + .bw_div = 16, +}; + +/* + * Describe bus masters, slaves and connections between them + * + * This is a simplified subset of the bus diagram, there are several other + * PL301 nics which are skipped/merged into PL301_MAIN + */ +static struct imx_icc_node_desc nodes[] = { + DEFINE_BUS_INTERCONNECT("NOC", IMX8MM_ICN_NOC, &imx8mm_noc_adj, + IMX8MM_ICS_DRAM, IMX8MM_ICN_MAIN), + + DEFINE_BUS_SLAVE("DRAM", IMX8MM_ICS_DRAM, &imx8mm_dram_adj), + DEFINE_BUS_SLAVE("OCRAM", IMX8MM_ICS_OCRAM, NULL), + DEFINE_BUS_MASTER("A53", IMX8MM_ICM_A53, IMX8MM_ICN_NOC), + + /* VPUMIX */ + DEFINE_BUS_MASTER("VPU H1", IMX8MM_ICM_VPU_H1, IMX8MM_ICN_VIDEO), + DEFINE_BUS_MASTER("VPU G1", IMX8MM_ICM_VPU_G1, IMX8MM_ICN_VIDEO), + DEFINE_BUS_MASTER("VPU G2", IMX8MM_ICM_VPU_G2, IMX8MM_ICN_VIDEO), + DEFINE_BUS_INTERCONNECT("PL301_VIDEO", IMX8MM_ICN_VIDEO, NULL, IMX8MM_ICN_NOC), + + /* GPUMIX */ + DEFINE_BUS_MASTER("GPU 2D", IMX8MM_ICM_GPU2D, IMX8MM_ICN_GPU), + DEFINE_BUS_MASTER("GPU 3D", IMX8MM_ICM_GPU3D, IMX8MM_ICN_GPU), + DEFINE_BUS_INTERCONNECT("PL301_GPU", IMX8MM_ICN_GPU, NULL, IMX8MM_ICN_NOC), + + /* DISPLAYMIX */ + DEFINE_BUS_MASTER("CSI", IMX8MM_ICM_CSI, IMX8MM_ICN_MIPI), + DEFINE_BUS_MASTER("LCDIF", IMX8MM_ICM_LCDIF, IMX8MM_ICN_MIPI), + DEFINE_BUS_INTERCONNECT("PL301_MIPI", IMX8MM_ICN_MIPI, NULL, IMX8MM_ICN_NOC), + + /* HSIO */ + DEFINE_BUS_MASTER("USB1", IMX8MM_ICM_USB1, IMX8MM_ICN_HSIO), + DEFINE_BUS_MASTER("USB2", IMX8MM_ICM_USB2, IMX8MM_ICN_HSIO), + DEFINE_BUS_MASTER("PCIE", IMX8MM_ICM_PCIE, IMX8MM_ICN_HSIO), + DEFINE_BUS_INTERCONNECT("PL301_HSIO", IMX8MM_ICN_HSIO, NULL, IMX8MM_ICN_NOC), + + /* Audio */ + DEFINE_BUS_MASTER("SDMA2", IMX8MM_ICM_SDMA2, IMX8MM_ICN_AUDIO), + DEFINE_BUS_MASTER("SDMA3", IMX8MM_ICM_SDMA3, IMX8MM_ICN_AUDIO), + DEFINE_BUS_INTERCONNECT("PL301_AUDIO", IMX8MM_ICN_AUDIO, NULL, IMX8MM_ICN_MAIN), + + /* Ethernet */ + DEFINE_BUS_MASTER("ENET", IMX8MM_ICM_ENET, IMX8MM_ICN_ENET), + DEFINE_BUS_INTERCONNECT("PL301_ENET", IMX8MM_ICN_ENET, NULL, IMX8MM_ICN_MAIN), + + /* Other */ + DEFINE_BUS_MASTER("SDMA1", IMX8MM_ICM_SDMA1, IMX8MM_ICN_MAIN), + DEFINE_BUS_MASTER("NAND", IMX8MM_ICM_NAND, IMX8MM_ICN_MAIN), + DEFINE_BUS_MASTER("USDHC1", IMX8MM_ICM_USDHC1, IMX8MM_ICN_MAIN), + DEFINE_BUS_MASTER("USDHC2", IMX8MM_ICM_USDHC2, IMX8MM_ICN_MAIN), + DEFINE_BUS_MASTER("USDHC3", IMX8MM_ICM_USDHC3, IMX8MM_ICN_MAIN), + DEFINE_BUS_INTERCONNECT("PL301_MAIN", IMX8MM_ICN_MAIN, NULL, + IMX8MM_ICN_NOC, IMX8MM_ICS_OCRAM), +}; + +static int imx8mm_icc_probe(struct platform_device *pdev) +{ + return imx_icc_register(pdev, nodes, ARRAY_SIZE(nodes)); +} + +static int imx8mm_icc_remove(struct platform_device *pdev) +{ + return imx_icc_unregister(pdev); +} + +static struct platform_driver imx8mm_icc_driver = { + .probe = imx8mm_icc_probe, + .remove = imx8mm_icc_remove, + .driver = { + .name = "imx8mm-interconnect", + }, +}; + +module_platform_driver(imx8mm_icc_driver); +MODULE_AUTHOR("Alexandre Bailon <abailon@baylibre.com>"); +MODULE_LICENSE("GPL v2"); diff --git a/include/dt-bindings/interconnect/imx8mm.h b/include/dt-bindings/interconnect/imx8mm.h new file mode 100644 index 000000000000..5404f2af15c3 --- /dev/null +++ b/include/dt-bindings/interconnect/imx8mm.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Interconnect framework driver for i.MX SoC + * + * Copyright (c) 2019, BayLibre + * Author: Alexandre Bailon <abailon@baylibre.com> + */ + +#ifndef __IMX8MM_ICM_INTERCONNECT_IDS_H +#define __IMX8MM_ICM_INTERCONNECT_IDS_H + +#define IMX8MM_ICN_NOC 1 +#define IMX8MM_ICS_DRAM 2 +#define IMX8MM_ICS_OCRAM 3 +#define IMX8MM_ICM_A53 4 + +#define IMX8MM_ICM_VPU_H1 5 +#define IMX8MM_ICM_VPU_G1 6 +#define IMX8MM_ICM_VPU_G2 7 +#define IMX8MM_ICN_VIDEO 8 + +#define IMX8MM_ICM_GPU2D 9 +#define IMX8MM_ICM_GPU3D 10 +#define IMX8MM_ICN_GPU 11 + +#define IMX8MM_ICM_CSI 12 +#define IMX8MM_ICM_LCDIF 13 +#define IMX8MM_ICN_MIPI 14 + +#define IMX8MM_ICM_USB1 15 +#define IMX8MM_ICM_USB2 16 +#define IMX8MM_ICM_PCIE 17 +#define IMX8MM_ICN_HSIO 18 + +#define IMX8MM_ICM_SDMA2 19 +#define IMX8MM_ICM_SDMA3 20 +#define IMX8MM_ICN_AUDIO 21 + +#define IMX8MM_ICN_ENET 22 +#define IMX8MM_ICM_ENET 23 + +#define IMX8MM_ICN_MAIN 24 +#define IMX8MM_ICM_NAND 25 +#define IMX8MM_ICM_SDMA1 26 +#define IMX8MM_ICM_USDHC1 27 +#define IMX8MM_ICM_USDHC2 28 +#define IMX8MM_ICM_USDHC3 29 + +#endif /* __IMX8MM_ICM_INTERCONNECT_IDS_H */ -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-10-31 22:52 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-31 22:51 [PATCH RFC v5 00/10] interconnect: Add imx support via devfreq Leonard Crestez 2019-10-31 22:51 ` Leonard Crestez 2019-10-31 22:52 ` [PATCH RFC v5 01/10] dt-bindings: devfreq: Add bindings for generic imx buses Leonard Crestez 2019-10-31 22:52 ` Leonard Crestez 2019-11-04 22:49 ` Rob Herring 2019-11-04 22:49 ` Rob Herring 2019-11-11 22:28 ` Leonard Crestez 2019-11-11 22:28 ` Leonard Crestez 2019-10-31 22:52 ` [PATCH RFC v5 02/10] PM / devfreq: Add generic imx bus driver Leonard Crestez 2019-10-31 22:52 ` Leonard Crestez 2019-10-31 22:52 ` [PATCH RFC v5 03/10] PM / devfreq: imx: Register interconnect device Leonard Crestez 2019-10-31 22:52 ` Leonard Crestez 2019-10-31 22:52 ` [PATCH RFC v5 04/10] PM / devfreq: Add devfreq_get_devfreq_by_node Leonard Crestez 2019-10-31 22:52 ` Leonard Crestez 2019-10-31 22:52 ` [PATCH RFC v5 05/10] interconnect: Add imx core driver Leonard Crestez 2019-10-31 22:52 ` Leonard Crestez 2019-11-12 15:07 ` Georgi Djakov 2019-11-12 15:07 ` Georgi Djakov 2019-11-12 17:25 ` Leonard Crestez 2019-11-12 17:25 ` Leonard Crestez 2019-10-31 22:52 ` Leonard Crestez [this message] 2019-10-31 22:52 ` [PATCH RFC v5 06/10] interconnect: imx: Add platform driver for imx8mm Leonard Crestez 2019-10-31 22:52 ` [PATCH RFC v5 07/10] interconnect: imx: Add platform driver for imx8mq Leonard Crestez 2019-10-31 22:52 ` Leonard Crestez 2019-10-31 22:52 ` [PATCH RFC v5 08/10] interconnect: imx: Add platform driver for imx8mn Leonard Crestez 2019-10-31 22:52 ` Leonard Crestez 2019-10-31 22:52 ` [PATCH RFC v5 09/10] arm64: dts: imx8m: Add NOC nodes Leonard Crestez 2019-10-31 22:52 ` Leonard Crestez 2019-10-31 22:52 ` [PATCH RFC v5 10/10] arm64: dts: imx8m: Add interconnect provider properties Leonard Crestez 2019-10-31 22:52 ` Leonard Crestez
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